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[71.163.245.5]) by smtp.gmail.com with ESMTPSA id u3sm496449qtg.16.2021.05.10.06.23.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 May 2021 06:23:41 -0700 (PDT) Subject: Re: [PATCH v2 16/17] crypto: qce: Defer probe in case interconnect is not yet initialized To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org Cc: Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com References: <20210505213731.538612-1-bhupesh.sharma@linaro.org> <20210505213731.538612-17-bhupesh.sharma@linaro.org> From: Thara Gopinath Message-ID: Date: Mon, 10 May 2021 09:23:39 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210505213731.538612-17-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On 5/5/21 5:37 PM, Bhupesh Sharma wrote: > On some Qualcomm parts the qce crypto driver needs the interconnect between > the crypto block and main memory to be initialized first before the crypto > registers can be accessed. So it makes sense to defer the qce crypto driver > probing in case the interconnect driver is not yet probed. > > This fixes the qce probe failure issues when both qce and > interconnect drivers are compiled as static part of the kernel. > > Cc: Thara Gopinath > Cc: Bjorn Andersson > Cc: Rob Herring > Cc: Andy Gross > Cc: Herbert Xu > Cc: David S. Miller > Cc: Stephen Boyd > Cc: Michael Turquette > Cc: Vinod Koul > Cc: dmaengine@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: bhupesh.linux@gmail.com > Signed-off-by: Bhupesh Sharma > --- > drivers/crypto/qce/core.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c > index 3e742e9911fa..9915b184f780 100644 > --- a/drivers/crypto/qce/core.c > +++ b/drivers/crypto/qce/core.c > @@ -222,6 +222,20 @@ static int qce_crypto_probe(struct platform_device *pdev) > return ret; > > qce->mem_path = of_icc_get(qce->dev, "memory"); > + > + /* Check for NULL return path, which indicates > + * interconnect API is disabled or the "interconnects" > + * DT property is missing. > + */ > + if (!qce->mem_path) > + /* On some qcom parts, the qce crypto block needs interconnect > + * paths to be configured before the registers can be accessed. > + * Check here for the same. > + */ > + if (!strcmp(of_id->compatible, "qcom,ipq6018-qce") || > + !strcmp(of_id->compatible, "qcom,sdm845-qce")) > + return -EPROBE_DEFER; > + Hi Bhupesh, You don't need this here. of_icc_get returns -EPROBE_DEFER if the interconnect provider is not initialized yet. -- Warm Regards Thara > if (IS_ERR(qce->mem_path)) > return PTR_ERR(qce->mem_path); > >