From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B02A0C0650F for ; Thu, 8 Aug 2019 09:21:36 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 38A63217F4 for ; Thu, 8 Aug 2019 09:21:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 38A63217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1EFF01B197; Thu, 8 Aug 2019 11:21:35 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 69C9B1B942 for ; Thu, 8 Aug 2019 11:21:33 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 02:21:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,360,1559545200"; d="scan'208";a="350116881" Received: from dpdk-dipei.sh.intel.com ([10.67.110.224]) by orsmga005.jf.intel.com with ESMTP; 08 Aug 2019 02:21:31 -0700 From: Andy Pei To: dev@dpdk.org Cc: rosen.xu@intel.com Date: Thu, 8 Aug 2019 17:12:20 +0800 Message-Id: <1565255540-308917-1-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/ipn3ke: setup MTU when HW init X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" set up mtu to the minimun in tx mtu, rx mtu and IPN3KE_MAC_FRAME_SIZE_MAX. Signed-off-by: Andy Pei --- drivers/net/ipn3ke/ipn3ke_ethdev.c | 93 ++++++++++++++++++++++++++++++++++++++ drivers/net/ipn3ke/ipn3ke_ethdev.h | 19 ++++++++ 2 files changed, 112 insertions(+) diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c index c226d63..8c56152 100644 --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c @@ -209,6 +209,96 @@ return 0; } +static void ipn3ke_10G_mtu_setup +(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel) +{ + uint32_t tx; + uint32_t rx; + uint32_t tmp; + + (*hw->f_mac_read)(hw, + &tx, + IPN3KE_10G_TX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); + + (*hw->f_mac_read)(hw, + &rx, + IPN3KE_10G_RX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); + + tmp = (tx > rx) ? rx : tx; + tmp = (tmp > IPN3KE_MAC_FRAME_SIZE_MAX) ? + IPN3KE_MAC_FRAME_SIZE_MAX : tmp; + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_10G_TX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_10G_RX_FRAME_MAXLENGTH, + mac_num, + eth_group_sel); +} + +static void ipn3ke_25G_mtu_setup +(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel) +{ + uint32_t tx; + uint32_t rx; + uint32_t tmp; + + (*hw->f_mac_read)(hw, + &tx, + IPN3KE_25G_MAX_TX_SIZE_CONFIG, + mac_num, + eth_group_sel); + + (*hw->f_mac_read)(hw, + &rx, + IPN3KE_25G_MAX_RX_SIZE_CONFIG, + mac_num, + eth_group_sel); + + tmp = (tx > rx) ? rx : tx; + tmp = (tmp > IPN3KE_MAC_FRAME_SIZE_MAX) ? + IPN3KE_MAC_FRAME_SIZE_MAX : tmp; + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_25G_MAX_TX_SIZE_CONFIG, + mac_num, + eth_group_sel); + + (*hw->f_mac_write)(hw, + tmp, + IPN3KE_25G_MAX_RX_SIZE_CONFIG, + mac_num, + eth_group_sel); +} + +static void +ipn3ke_mtu_setup(struct ipn3ke_hw *hw) +{ + int i; + if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { + for (i = 0; i < hw->port_num; i++) { + ipn3ke_10G_mtu_setup(hw, i, 0); + ipn3ke_10G_mtu_setup(hw, i, 1); + } + } else if (hw->retimer.mac_type == + IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { + for (i = 0; i < hw->port_num; i++) { + ipn3ke_25G_mtu_setup(hw, i, 0); + ipn3ke_25G_mtu_setup(hw, i, 1); + } + } +} + static int ipn3ke_hw_init(struct rte_afu_device *afu_dev, struct ipn3ke_hw *hw) @@ -303,6 +393,9 @@ } } + /* init mtu */ + ipn3ke_mtu_setup(hw); + ret = rte_eth_switch_domain_alloc(&hw->switch_domain_id); if (ret) IPN3KE_AFU_PMD_WARN("failed to allocate switch domain for device %d", diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h index c7b336b..6419da3 100644 --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h @@ -654,6 +654,25 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw, #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \ IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT) +/* Additional Feature Register */ +#define ADD_PHY_CTRL 0x0 +#define PHY_RESET BIT(0) +/* registers for 25G/40G mac */ +#define MAC_CONFIG 0x310 +#define MAC_RESET_MASK GENMASK(2, 0) + +#define IPN3KE_MAX_MTU 0xffff + +#define IPN3KE_25G_PHY_PMA_SLOOP 0x313 +#define IPN3KE_25G_TX_FLOW_CTRL 0x640 +#define IPN3KE_25G_MAX_TX_SIZE_CONFIG 0x407 +#define IPN3KE_25G_MAX_RX_SIZE_CONFIG 0x506 + +#define IPN3KE_10G_TX_PAUSE_FRAME_QUANTA 0x0042 +#define IPN3KE_10G_TX_PAUSE_FRAME_HOLDOFF 0x0043 +#define IPN3KE_10G_TX_FRAME_MAXLENGTH 0x002C +#define IPN3KE_10G_RX_FRAME_MAXLENGTH 0x00AE + #define IPN3KE_REGISTER_WIDTH 32 /*Bits[2:0]: Configuration of TX statistics counters: -- 1.8.3.1