From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDF43C433ED for ; Sat, 10 Apr 2021 01:11:45 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id 6BF76610CD for ; Sat, 10 Apr 2021 01:11:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6BF76610CD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AAB6D141169; Sat, 10 Apr 2021 03:11:17 +0200 (CEST) Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) by mails.dpdk.org (Postfix) with ESMTP id 6391C14113A for ; Sat, 10 Apr 2021 03:11:10 +0200 (CEST) Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FHH1X0WndzNvTN for ; Sat, 10 Apr 2021 09:08:16 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.498.0; Sat, 10 Apr 2021 09:11:01 +0800 From: "Min Hu (Connor)" To: CC: Date: Sat, 10 Apr 2021 09:11:20 +0800 Message-ID: <1618017080-50053-8-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618017080-50053-1-git-send-email-humin29@huawei.com> References: <1617963365-41299-1-git-send-email-humin29@huawei.com> <1618017080-50053-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 7/7] net/hns3: fix configure FEC when concurrent with reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang Currently, after the reset is complete, the PMD restores the FEC according to the FEC configuration reserved in the driver. If there is a concurrency between the FEC setup operation and the restore operation after a reset, the FEC status of the last hardware may be unknown. This patch adds the step of obtaining the lock when setting the FEC to avoid concurrency between restore operation and setting operation. Fixes: 9bf2ea8dbc65 ("net/hns3: support FEC") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index edace55..c359efc 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -6411,11 +6411,16 @@ hns3_fec_set(struct rte_eth_dev *dev, uint32_t mode) return -EINVAL; } + rte_spinlock_lock(&hw->lock); ret = hns3_set_fec_hw(hw, mode); - if (ret) + if (ret) { + rte_spinlock_unlock(&hw->lock); return ret; + } pf->fec_mode = mode; + rte_spinlock_unlock(&hw->lock); + return 0; } -- 2.7.4