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From: <pbhagavatula@marvell.com>
To: <jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>,
	"Anatoly Burakov" <anatoly.burakov@intel.com>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH 22/44] event/octeontx2: add device start function
Date: Sun, 2 Jun 2019 00:23:32 +0530
Message-ID: <20190601185355.370-23-pbhagavatula@marvell.com> (raw)
In-Reply-To: <20190601185355.370-1-pbhagavatula@marvell.com>

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/octeontx2/otx2_evdev.c  | 127 +++++++++++++++++++++++++-
 drivers/event/octeontx2/otx2_evdev.h  |   6 ++
 drivers/event/octeontx2/otx2_worker.c |  74 +++++++++++++++
 3 files changed, 206 insertions(+), 1 deletion(-)

diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 906c6c81b..51d1a45c6 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -38,6 +38,41 @@ sso_get_msix_offsets(const struct rte_eventdev *event_dev)
 	return rc;
 }
 
+void
+sso_fastpath_fns_set(struct rte_eventdev *event_dev)
+{
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+
+	event_dev->enqueue			= otx2_ssogws_enq;
+	event_dev->enqueue_burst		= otx2_ssogws_enq_burst;
+	event_dev->enqueue_new_burst		= otx2_ssogws_enq_new_burst;
+	event_dev->enqueue_forward_burst	= otx2_ssogws_enq_fwd_burst;
+
+	event_dev->dequeue			= otx2_ssogws_deq;
+	event_dev->dequeue_burst		= otx2_ssogws_deq_burst;
+	if (dev->is_timeout_deq) {
+		event_dev->dequeue		= otx2_ssogws_deq_timeout;
+		event_dev->dequeue_burst	= otx2_ssogws_deq_timeout_burst;
+	}
+
+	if (dev->dual_ws) {
+		event_dev->enqueue		= otx2_ssogws_dual_enq;
+		event_dev->enqueue_burst	= otx2_ssogws_dual_enq_burst;
+		event_dev->enqueue_new_burst	=
+					otx2_ssogws_dual_enq_new_burst;
+		event_dev->enqueue_forward_burst =
+					otx2_ssogws_dual_enq_fwd_burst;
+		event_dev->dequeue		= otx2_ssogws_dual_deq;
+		event_dev->dequeue_burst	= otx2_ssogws_dual_deq_burst;
+		if (dev->is_timeout_deq) {
+			event_dev->dequeue	= otx2_ssogws_dual_deq_timeout;
+			event_dev->dequeue_burst =
+					otx2_ssogws_dual_deq_timeout_burst;
+		}
+	}
+	rte_mb();
+}
+
 static void
 otx2_sso_info_get(struct rte_eventdev *event_dev,
 		  struct rte_event_dev_info *dev_info)
@@ -884,6 +919,93 @@ otx2_sso_dump(struct rte_eventdev *event_dev, FILE *f)
 	}
 }
 
+static void
+otx2_handle_event(void *arg, struct rte_event event)
+{
+	struct rte_eventdev *event_dev = arg;
+
+	if (event_dev->dev_ops->dev_stop_flush != NULL)
+		event_dev->dev_ops->dev_stop_flush(event_dev->data->dev_id,
+				event, event_dev->data->dev_stop_flush_arg);
+}
+
+static void
+sso_cleanup(struct rte_eventdev *event_dev, uint8_t enable)
+{
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+	uint16_t i;
+
+	for (i = 0; i < dev->nb_event_ports; i++) {
+		if (dev->dual_ws) {
+			struct otx2_ssogws_dual *ws;
+
+			ws = event_dev->data->ports[i];
+			ssogws_reset((struct otx2_ssogws *)&ws->ws_state[0]);
+			ssogws_reset((struct otx2_ssogws *)&ws->ws_state[1]);
+			ws->swtag_req = 0;
+			ws->vws = 0;
+			ws->ws_state[0].cur_grp = 0;
+			ws->ws_state[0].cur_tt = SSO_SYNC_EMPTY;
+			ws->ws_state[1].cur_grp = 0;
+			ws->ws_state[1].cur_tt = SSO_SYNC_EMPTY;
+		} else {
+			struct otx2_ssogws *ws;
+
+			ws = event_dev->data->ports[i];
+			ssogws_reset(ws);
+			ws->swtag_req = 0;
+			ws->cur_grp = 0;
+			ws->cur_tt = SSO_SYNC_EMPTY;
+		}
+	}
+
+	rte_mb();
+	if (dev->dual_ws) {
+		struct otx2_ssogws_dual *ws = event_dev->data->ports[0];
+		struct otx2_ssogws temp_ws;
+
+		memcpy(&temp_ws, &ws->ws_state[0],
+		       sizeof(struct otx2_ssogws_state));
+		for (i = 0; i < dev->nb_event_queues; i++) {
+			/* Consume all the events through HWS0 */
+			ssogws_flush_events(&temp_ws, i, ws->grps_base[i],
+					    otx2_handle_event, event_dev);
+			/* Enable/Disable SSO GGRP */
+			otx2_write64(enable, ws->grps_base[i] +
+				     SSO_LF_GGRP_QCTL);
+		}
+		ws->ws_state[0].cur_grp = 0;
+		ws->ws_state[0].cur_tt = SSO_SYNC_EMPTY;
+	} else {
+		struct otx2_ssogws *ws = event_dev->data->ports[0];
+
+		for (i = 0; i < dev->nb_event_queues; i++) {
+			/* Consume all the events through HWS0 */
+			ssogws_flush_events(ws, i, ws->grps_base[i],
+					    otx2_handle_event, event_dev);
+			/* Enable/Disable SSO GGRP */
+			otx2_write64(enable, ws->grps_base[i] +
+				     SSO_LF_GGRP_QCTL);
+		}
+		ws->cur_grp = 0;
+		ws->cur_tt = SSO_SYNC_EMPTY;
+	}
+
+	/* reset SSO GWS cache */
+	otx2_mbox_alloc_msg_sso_ws_cache_inv(dev->mbox);
+	otx2_mbox_process(dev->mbox);
+}
+
+static int
+otx2_sso_start(struct rte_eventdev *event_dev)
+{
+	sso_func_trace();
+	sso_cleanup(event_dev, 1);
+	sso_fastpath_fns_set(event_dev);
+
+	return 0;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static struct rte_eventdev_ops otx2_sso_ops = {
 	.dev_infos_get    = otx2_sso_info_get,
@@ -903,6 +1025,7 @@ static struct rte_eventdev_ops otx2_sso_ops = {
 	.xstats_get_names = otx2_sso_xstats_get_names,
 
 	.dump             = otx2_sso_dump,
+	.dev_start        = otx2_sso_start,
 };
 
 #define OTX2_SSO_XAE_CNT	"xae_cnt"
@@ -970,8 +1093,10 @@ otx2_sso_init(struct rte_eventdev *event_dev)
 
 	event_dev->dev_ops = &otx2_sso_ops;
 	/* For secondary processes, the primary has done all the work */
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+		sso_fastpath_fns_set(event_dev);
 		return 0;
+	}
 
 	dev = sso_pmd_priv(event_dev);
 
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 1d8eaf29d..1a7a1b0d0 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -217,6 +217,12 @@ uint16_t otx2_ssogws_dual_deq_timeout(void *port, struct rte_event *ev,
 uint16_t otx2_ssogws_dual_deq_timeout_burst(void *port, struct rte_event ev[],
 					    uint16_t nb_events,
 					    uint64_t timeout_ticks);
+void sso_fastpath_fns_set(struct rte_eventdev *event_dev);
+/* Clean up API's */
+typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);
+void ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id,
+			 uintptr_t base, otx2_handle_event_t fn, void *arg);
+void ssogws_reset(struct otx2_ssogws *ws);
 /* Init and Fini API's */
 int otx2_sso_init(struct rte_eventdev *event_dev);
 int otx2_sso_fini(struct rte_eventdev *event_dev);
diff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c
index edc574673..7a6d4cad2 100644
--- a/drivers/event/octeontx2/otx2_worker.c
+++ b/drivers/event/octeontx2/otx2_worker.c
@@ -194,3 +194,77 @@ otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],
 
 	return 1;
 }
+
+void
+ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id, uintptr_t base,
+		    otx2_handle_event_t fn, void *arg)
+{
+	uint64_t cq_ds_cnt = 1;
+	uint64_t aq_cnt = 1;
+	uint64_t ds_cnt = 1;
+	struct rte_event ev;
+	uint64_t enable;
+	uint64_t val;
+
+	enable = otx2_read64(base + SSO_LF_GGRP_QCTL);
+	if (!enable)
+		return;
+
+	val  = queue_id;	/* GGRP ID */
+	val |= BIT_ULL(18);	/* Grouped */
+	val |= BIT_ULL(16);	/* WAIT */
+
+	aq_cnt = otx2_read64(base + SSO_LF_GGRP_AQ_CNT);
+	ds_cnt = otx2_read64(base + SSO_LF_GGRP_MISC_CNT);
+	cq_ds_cnt = otx2_read64(base + SSO_LF_GGRP_INT_CNT);
+	cq_ds_cnt &= 0x3FFF3FFF0000;
+
+	while (aq_cnt || cq_ds_cnt || ds_cnt) {
+		otx2_write64(val, ws->getwrk_op);
+		otx2_ssogws_get_work_empty(ws, &ev);
+		if (fn != NULL && ev.u64 != 0)
+			fn(arg, ev);
+		if (ev.sched_type != SSO_TT_EMPTY)
+			otx2_ssogws_swtag_flush(ws);
+		rte_mb();
+		aq_cnt = otx2_read64(base + SSO_LF_GGRP_AQ_CNT);
+		ds_cnt = otx2_read64(base + SSO_LF_GGRP_MISC_CNT);
+		cq_ds_cnt = otx2_read64(base + SSO_LF_GGRP_INT_CNT);
+		/* Extract cq and ds count */
+		cq_ds_cnt &= 0x3FFF3FFF0000;
+	}
+
+	otx2_write64(0, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
+		     SSOW_LF_GWS_OP_GWC_INVAL);
+	rte_mb();
+}
+
+void
+ssogws_reset(struct otx2_ssogws *ws)
+{
+	uintptr_t base = OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op);
+	uint64_t pend_state;
+	uint8_t pend_tt;
+	uint64_t tag;
+
+	/* Wait till getwork/swtp/waitw/desched completes. */
+	do {
+		pend_state = otx2_read64(base + SSOW_LF_GWS_PENDSTATE);
+		rte_mb();
+	} while (pend_state & (BIT_ULL(63) | BIT_ULL(62) | BIT_ULL(58)));
+
+	tag = otx2_read64(base + SSOW_LF_GWS_TAG);
+	pend_tt = (tag >> 32) & 0x3;
+	if (pend_tt != SSO_TT_EMPTY) { /* Work was pending */
+		if (pend_tt == SSO_SYNC_ATOMIC || pend_tt == SSO_SYNC_ORDERED)
+			otx2_ssogws_swtag_untag(ws);
+		otx2_ssogws_desched(ws);
+	}
+	rte_mb();
+
+	/* Wait for desched to complete. */
+	do {
+		pend_state = otx2_read64(base + SSOW_LF_GWS_PENDSTATE);
+		rte_mb();
+	} while (pend_state & BIT_ULL(58));
+}
-- 
2.21.0


  parent reply index

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-01 18:53 [dpdk-dev] [PATCH 00/44] OCTEON TX2 event device driver pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 01/44] event/octeontx2: add build infra and device probe pbhagavatula
2019-06-17  7:50   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 02/44] event/octeontx2: add init and fini for octeontx2 SSO object pbhagavatula
2019-06-17  7:52   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 03/44] event/octeontx2: add device capabilities function pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 04/44] event/octeontx2: add device configure function pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 05/44] event/octeontx2: add event queue config functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 06/44] event/octeontx2: allocate event inflight buffers pbhagavatula
2019-06-17  7:56   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 07/44] event/octeontx2: add devargs for inflight buffer count pbhagavatula
2019-06-17  7:58   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 08/44] event/octeontx2: add event port config functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 09/44] event/octeontx2: support linking queues to ports pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 10/44] event/octeontx2: support dequeue timeout tick conversion pbhagavatula
2019-06-17  8:01   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 11/44] event/octeontx2: add SSO GWS and GGRP IRQ handlers pbhagavatula
2019-06-17  8:04   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 12/44] event/octeontx2: add register dump functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 13/44] event/octeontx2: add xstats support pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 14/44] event/octeontx2: add SSO HW device operations pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 15/44] event/octeontx2: add worker enqueue functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 16/44] event/octeontx2: add worker dequeue functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 17/44] event/octeontx2: add octeontx2 SSO dual workslot mode pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 18/44] event/octeontx2: add SSO dual GWS HW device operations pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 19/44] event/octeontx2: add worker dual GWS enqueue functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 20/44] event/octeontx2: add worker dual GWS dequeue functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 21/44] event/octeontx2: add devargs to force legacy mode pbhagavatula
2019-06-01 18:53 ` pbhagavatula [this message]
2019-06-01 18:53 ` [dpdk-dev] [PATCH 23/44] event/octeontx2: add devargs to control SSO GGRP QoS pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 24/44] event/octeontx2: add device stop and close functions pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 25/44] event/octeontx2: add SSO selftest pbhagavatula
2019-06-17  8:18   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 26/44] doc: add Marvell OCTEON TX2 event device documentation pbhagavatula
2019-06-17  8:15   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 27/44] event/octeontx2: add event timer support pbhagavatula
2019-06-17  8:20   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 28/44] event/octeontx2: add timer adapter capabilities pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 29/44] event/octeontx2: create and free timer adapter pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 30/44] event/octeontx2: allow TIM to optimize config pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 31/44] event/octeontx2: add devargs to disable NPA pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 32/44] event/octeontx2: add devargs to modify chunk slots pbhagavatula
2019-06-17  8:24   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 33/44] event/octeontx2: add TIM IRQ handlers pbhagavatula
2019-06-17  8:25   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 34/44] event/octeontx2: allow adapters to resize inflight buffers pbhagavatula
2019-06-17  8:27   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 35/44] event/octeontx2: add timer adapter info get function pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 36/44] event/octeontx2: add TIM bucket operations pbhagavatula
2019-06-17  8:31   ` Jerin Jacob Kollanukkaran
2019-06-01 18:53 ` [dpdk-dev] [PATCH 37/44] event/octeontx2: add event timer arm routine pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 38/44] event/octeontx2: add event timer arm timeout burst pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 39/44] event/octeontx2: add event timer cancel function pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 40/44] event/octeontx2: add event timer stats get and reset pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 41/44] event/octeontx2: add even timer adapter start and stop pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 42/44] event/octeontx2: add devargs to limit timer adapters pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 43/44] event/octeontx2: add devargs to control adapter parameters pbhagavatula
2019-06-01 18:53 ` [dpdk-dev] [PATCH 44/44] doc: update Marvell OCTEON TX2 eventdev documentation pbhagavatula

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