From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 887D6C3A5AA for ; Thu, 5 Sep 2019 03:48:13 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 26724206B8 for ; Thu, 5 Sep 2019 03:48:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 26724206B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0F2601EBBF; Thu, 5 Sep 2019 05:46:57 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id C747E1EB73 for ; Thu, 5 Sep 2019 05:46:42 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Sep 2019 20:46:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="207719891" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga004.fm.intel.com with ESMTP; 04 Sep 2019 20:46:41 -0700 From: Qi Zhang To: wenzhuo.lu@intel.com, qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Paul M Stillwell Jr Date: Thu, 5 Sep 2019 11:49:01 +0800 Message-Id: <20190905034909.38287-9-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20190905034909.38287-1-qi.z.zhang@intel.com> References: <20190902035551.16852-1-qi.z.zhang@intel.com> <20190905034909.38287-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 08/16] net/ice/base: remove RSS code as iavf host X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6