From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6C08C43331 for ; Mon, 11 Nov 2019 12:06:08 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 4479121872 for ; Mon, 11 Nov 2019 12:06:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="yJjmb8RU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4479121872 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marvell.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5BC1ADE3; Mon, 11 Nov 2019 13:06:07 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 19F3AB62 for ; Mon, 11 Nov 2019 13:06:05 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xABC5C0N024024; Mon, 11 Nov 2019 04:06:05 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=rDhKlQLCce+mOxM5F2OVrMGwN8h6CL6it8NkQUW2o0I=; b=yJjmb8RUpEncXm5na/31CItopueDTy9U6W8sE36i1j63Ljtm852F6NE+istC1wLsC21Z zimbUsM98r62mTyJKveBHZuOKVqsWWd+qX52CFSROTBGONMhFqpeRfGNVUEdwzq4lKpg ggHM79QUB/CZd1BAMb/F4/jS8KVnq85eD+vhTqdqGjiW4ozVMiGt0W8Bp9UgPaGTVFMD NBywE2wuXjGN1k7Eu9V4AsrxTuSko9egBxTW1gBmEFQxm8iLgrH1knzXcBIpf8NIvdJW DYln5EBWN7RG10GOaTa9JbAPcSY64DiGhuw/nF0wijsTiizoCjN4BsCgBf1tWvsWnoxx +g== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2w5wurp2qr-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 11 Nov 2019 04:06:05 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 11 Nov 2019 04:06:03 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 11 Nov 2019 04:06:03 -0800 Received: from localhost.localdomain (unknown [10.28.34.200]) by maili.marvell.com (Postfix) with ESMTP id 1D9D83F703F; Mon, 11 Nov 2019 04:06:00 -0800 (PST) From: Sunil Kumar Kori To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K , "John McNamara" , Marko Kovacevic CC: , Sunil Kumar Kori Date: Mon, 11 Nov 2019 17:35:57 +0530 Message-ID: <20191111120557.30991-1-skori@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191111081615.21113-1-skori@marvell.com> References: <20191111081615.21113-1-skori@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-11_03:2019-11-11,2019-11-11 signatures=0 Subject: [dpdk-dev] [PATCH v5 1/1] net/octeontx2: add Rx/Tx burst mode get callbacks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Retrieve burst mode information according to the selected Rx/Tx mode and offloads. Signed-off-by: Sunil Kumar Kori --- v5: - Removed redundent code using flag to string mapping. v4: - Review comments incorporated. v3: - Rebased the patch over patches.dpdk.org/patch/62368/ v2: - Rebased the patch on latest commit. - Update feature matrix for the support. doc/guides/nics/features/octeontx2.ini | 1 + drivers/net/octeontx2/otx2_ethdev.c | 2 + drivers/net/octeontx2/otx2_ethdev.h | 4 + drivers/net/octeontx2/otx2_ethdev_ops.c | 111 ++++++++++++++++++++++++ 4 files changed, 118 insertions(+) diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini index 7c59b4383..c2a3f47b0 100644 --- a/doc/guides/nics/features/octeontx2.ini +++ b/doc/guides/nics/features/octeontx2.ini @@ -13,6 +13,7 @@ Link status = Y Link status event = Y Runtime Rx queue setup = Y Runtime Tx queue setup = Y +Burst mode info = Y Fast mbuf free = Y Free Tx mbuf on demand = Y Queue start/stop = Y diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index 62291c698..37b674bcb 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -1978,6 +1978,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = { .xstats_get_names_by_id = otx2_nix_xstats_get_names_by_id, .rxq_info_get = otx2_nix_rxq_info_get, .txq_info_get = otx2_nix_txq_info_get, + .rx_burst_mode_get = otx2_rx_burst_mode_get, + .tx_burst_mode_get = otx2_tx_burst_mode_get, .rx_queue_count = otx2_nix_rx_queue_count, .rx_descriptor_done = otx2_nix_rx_descriptor_done, .rx_descriptor_status = otx2_nix_rx_descriptor_status, diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index 4d9ed4870..fd43789fe 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -388,6 +388,10 @@ void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo); void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); +int otx2_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); +int otx2_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx); int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt); int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset); diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c index fc0fbd9f2..a63a416ef 100644 --- a/drivers/net/octeontx2/otx2_ethdev_ops.c +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c @@ -2,6 +2,7 @@ * Copyright(C) 2019 Marvell International Ltd. */ +#include #include #include "otx2_ethdev.h" @@ -221,6 +222,116 @@ otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id, qinfo->conf.tx_deferred_start = 0; } +int +otx2_rx_burst_mode_get(struct rte_eth_dev *eth_dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ +#define STRING_SIZE 64 + ssize_t bytes = 0, str_size = RTE_ETH_BURST_MODE_INFO_SIZE, rc; + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + const struct burst_info { + uint16_t flags; + char output[STRING_SIZE]; + } rx_offload_map[] = { + {NIX_RX_OFFLOAD_RSS_F, "RSS,"}, + {NIX_RX_OFFLOAD_PTYPE_F, " Ptype,"}, + {NIX_RX_OFFLOAD_CHECKSUM_F, " Checksum,"}, + {NIX_RX_OFFLOAD_VLAN_STRIP_F, " VLAN Strip,"}, + {NIX_RX_OFFLOAD_MARK_UPDATE_F, " Mark Update,"}, + {NIX_RX_OFFLOAD_TSTAMP_F, " Timestamp,"}, + {NIX_RX_MULTI_SEG_F, " Scattered,"} + }; + const char *burst_mode[] = {"Vector Neon", "Scalar"}; + uint32_t i; + + /* Update burst mode info */ + rc = rte_strscpy(mode->info + bytes, burst_mode[dev->scalar_ena], + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + + rc = rte_strscpy(mode->info + bytes, ", Rx Offloads:", + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + + /* Update Rx offload info */ + for (i = 0; i < RTE_DIM(rx_offload_map); i++) { + if (dev->rx_offload_flags & rx_offload_map[i].flags) { + rc = rte_strscpy(mode->info + bytes, + rx_offload_map[i].output, + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + } + } + +done: + return 0; +} + +int +otx2_tx_burst_mode_get(struct rte_eth_dev *eth_dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ +#define STRING_SIZE 64 + ssize_t bytes = 0, str_size = RTE_ETH_BURST_MODE_INFO_SIZE, rc; + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + const struct burst_info { + uint16_t flags; + char output[STRING_SIZE]; + } tx_offload_map[] = { + {NIX_TX_OFFLOAD_L3_L4_CSUM_F, " Inner L3/L4 csum,"}, + {NIX_TX_OFFLOAD_OL3_OL4_CSUM_F, " Outer L3/L4 csum,"}, + {NIX_TX_OFFLOAD_VLAN_QINQ_F, " VLAN Insertion,"}, + {NIX_TX_OFFLOAD_MBUF_NOFF_F, " MBUF free disable,"}, + {NIX_TX_OFFLOAD_TSTAMP_F, " Timestamp,"}, + {NIX_TX_OFFLOAD_TSO_F, " TSO,"}, + {NIX_TX_MULTI_SEG_F, " Scattered,"} + }; + const char *burst_mode[] = {"Vector Neon", "Scalar"}; + uint32_t i; + + /* Update burst mode info */ + rc = rte_strscpy(mode->info + bytes, burst_mode[dev->scalar_ena], + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + + rc = rte_strscpy(mode->info + bytes, ", Tx Offloads:", + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + + /* Update Tx offload info */ + for (i = 0; i < RTE_DIM(tx_offload_map); i++) { + if (dev->tx_offload_flags & tx_offload_map[i].flags) { + rc = rte_strscpy(mode->info + bytes, + tx_offload_map[i].output, + str_size - bytes); + if (rc < 0) + goto done; + + bytes += rc; + } + } + +done: + return 0; +} + static void nix_rx_head_tail_get(struct otx2_eth_dev *dev, uint32_t *head, uint32_t *tail, uint16_t queue_idx) -- 2.17.1