From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52BC4C432C0 for ; Wed, 27 Nov 2019 10:23:35 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id E46C120678 for ; Wed, 27 Nov 2019 10:23:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="AxHxyT7K" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E46C120678 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marvell.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CCC681B948; Wed, 27 Nov 2019 11:23:29 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 9C21B5B32 for ; Wed, 27 Nov 2019 11:23:26 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xARAJhFS015050 for ; Wed, 27 Nov 2019 02:23:26 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=cVjWYi0CYtmKsv7rwN6YhbKELyww7dOdBpJWlm5N1mU=; b=AxHxyT7KYgeGRgqSAy5nLbJUs0b7k2WoyQKheQpYve3kzfyqCkOB5JlK66hDKX30Rlxm h0Boh857kfVIP0QaEo/EZ1AoqthTTNtIVxxAti417X+0+vSeT65ns0tioheF4d+oOv6m AATo598jwuyd5ke3B2WzFs7orMUf0wITOm2ms6prB53GfSj7i8y8TRjyag8k+oCkyjV3 a7yBqBM4Ix7s0h1ToTW933gkaiFgSVP8+KguLDf25tETwq6czW0P8DP6YAgEQbRdnkiz 6iRPGrHG0fzwx/HIFXyNxrdlbSBw/qbdCobPWA3JydRlhS1eDQzJrkfFTt18mcjBeKVE fQ== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2whd08jask-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 27 Nov 2019 02:23:25 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 27 Nov 2019 02:23:24 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 27 Nov 2019 02:23:24 -0800 Received: from localhost.localdomain (unknown [10.28.34.200]) by maili.marvell.com (Postfix) with ESMTP id 2F4293F7040; Wed, 27 Nov 2019 02:23:21 -0800 (PST) From: Sunil Kumar Kori To: Jerin Jacob , Nithin Dabilpuram , Vamsi Attunuru CC: , Sunil Kumar Kori Date: Wed, 27 Nov 2019 15:52:20 +0530 Message-ID: <20191127102222.31940-2-skori@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102222.31940-1-skori@marvell.com> References: <20191126061525.28507-1-skori@marvell.com> <20191127102222.31940-1-skori@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-27_02:2019-11-27,2019-11-27 signatures=0 Subject: [dpdk-dev] [PATCH v2 2/4] common/octeontx2: add interrupt offset to mbox structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" mbox response are triggered at bar2 + RVU_PF_INT or bar2 + RVU_VF_INT, depending upon the device. To process these interrupts different irq handlers are installed. To unify it, added offset field into mbox structure which is initialized with RVU_PF_INT or RVU_VF_INT at the time of otx2_mbox_init. Signed-off-by: Sunil Kumar Kori --- v2: * Rebased patch on 19.11-rc4 drivers/common/octeontx2/otx2_dev.c | 14 ++++++++++---- drivers/common/octeontx2/otx2_mbox.c | 5 +++-- drivers/common/octeontx2/otx2_mbox.h | 5 +++-- 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/common/octeontx2/otx2_dev.c b/drivers/common/octeontx2/otx2_dev.c index 0fc799e4a..6f29d6108 100644 --- a/drivers/common/octeontx2/otx2_dev.c +++ b/drivers/common/octeontx2/otx2_dev.c @@ -900,6 +900,7 @@ otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev) { int up_direction = MBOX_DIR_PFAF_UP; int rc, direction = MBOX_DIR_PFAF; + uint64_t intr_offset = RVU_PF_INT; struct otx2_dev *dev = otx2_dev; uintptr_t bar2, bar4; uint64_t bar4_addr; @@ -924,15 +925,18 @@ otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev) if (otx2_dev_is_vf(dev)) { direction = MBOX_DIR_VFPF; up_direction = MBOX_DIR_VFPF_UP; + intr_offset = RVU_VF_INT; } /* Initialize the local mbox */ - rc = otx2_mbox_init(&dev->mbox_local, bar4, bar2, direction, 1); + rc = otx2_mbox_init(&dev->mbox_local, bar4, bar2, direction, 1, + intr_offset); if (rc) goto error; dev->mbox = &dev->mbox_local; - rc = otx2_mbox_init(&dev->mbox_up, bar4, bar2, up_direction, 1); + rc = otx2_mbox_init(&dev->mbox_up, bar4, bar2, up_direction, 1, + intr_offset); if (rc) goto error; @@ -967,13 +971,15 @@ otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev) } /* Init mbox object */ rc = otx2_mbox_init(&dev->mbox_vfpf, (uintptr_t)hwbase, - bar2, MBOX_DIR_PFVF, pci_dev->max_vfs); + bar2, MBOX_DIR_PFVF, pci_dev->max_vfs, + intr_offset); if (rc) goto iounmap; /* PF -> VF UP messages */ rc = otx2_mbox_init(&dev->mbox_vfpf_up, (uintptr_t)hwbase, - bar2, MBOX_DIR_PFVF_UP, pci_dev->max_vfs); + bar2, MBOX_DIR_PFVF_UP, pci_dev->max_vfs, + intr_offset); if (rc) goto mbox_fini; } diff --git a/drivers/common/octeontx2/otx2_mbox.c b/drivers/common/octeontx2/otx2_mbox.c index c359bf42f..ad8e0c3aa 100644 --- a/drivers/common/octeontx2/otx2_mbox.c +++ b/drivers/common/octeontx2/otx2_mbox.c @@ -59,12 +59,13 @@ otx2_mbox_reset(struct otx2_mbox *mbox, int devid) } int -otx2_mbox_init(struct otx2_mbox *mbox, uintptr_t hwbase, - uintptr_t reg_base, int direction, int ndevs) +otx2_mbox_init(struct otx2_mbox *mbox, uintptr_t hwbase, uintptr_t reg_base, + int direction, int ndevs, uint64_t intr_offset) { struct otx2_mbox_dev *mdev; int devid; + mbox->intr_offset = intr_offset; mbox->reg_base = reg_base; mbox->hwbase = hwbase; diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h index e0e4e2f63..162d12468 100644 --- a/drivers/common/octeontx2/otx2_mbox.h +++ b/drivers/common/octeontx2/otx2_mbox.h @@ -73,6 +73,7 @@ struct otx2_mbox { uint16_t tx_size; /* Size of Tx region */ uint16_t ndevs; /* The number of peers */ struct otx2_mbox_dev *dev; + uint64_t intr_offset; /* offset to interrupt register */ }; /* Header which precedes all mbox messages */ @@ -1562,8 +1563,8 @@ struct tim_enable_rsp { const char *otx2_mbox_id2name(uint16_t id); int otx2_mbox_id2size(uint16_t id); void otx2_mbox_reset(struct otx2_mbox *mbox, int devid); -int otx2_mbox_init(struct otx2_mbox *mbox, uintptr_t hwbase, - uintptr_t reg_base, int direction, int ndevs); +int otx2_mbox_init(struct otx2_mbox *mbox, uintptr_t hwbase, uintptr_t reg_base, + int direction, int ndevsi, uint64_t intr_offset); void otx2_mbox_fini(struct otx2_mbox *mbox); void otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid); int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid); -- 2.17.1