From: Xiaoyun Li <xiaoyun.li@intel.com>
To: jingjing.wu@intel.com
Cc: dev@dpdk.org, Xiaoyun Li <xiaoyun.li@intel.com>, stable@dpdk.org
Subject: [dpdk-dev] [PATCH] doc: fix a typo in ntb guide
Date: Wed, 4 Dec 2019 23:19:31 +0800 [thread overview]
Message-ID: <20191204151931.12657-1-xiaoyun.li@intel.com> (raw)
In prerequisites of ntb guide, the correct flag when loading igb_uio
module should be `wc_activate=1`, not `wc_active=1`.
Fixes: 11b5c7daf019 ("raw/ntb: add enqueue and dequeue functions")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
---
doc/guides/rawdevs/ntb.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/guides/rawdevs/ntb.rst b/doc/guides/rawdevs/ntb.rst
index 58472135f..aa7d80964 100644
--- a/doc/guides/rawdevs/ntb.rst
+++ b/doc/guides/rawdevs/ntb.rst
@@ -52,11 +52,11 @@ NTB PMD needs kernel PCI driver to support write combining (WC) to get
better performance. The difference will be more than 10 times.
To enable WC, there are 2 ways.
-- Insert igb_uio with ``wc_active=1`` flag if use igb_uio driver.
+- Insert igb_uio with ``wc_activate=1`` flag if use igb_uio driver.
.. code-block:: console
- insmod igb_uio.ko wc_active=1
+ insmod igb_uio.ko wc_activate=1
- Enable WC for NTB device's Bar 2 and Bar 4 (Mapped memory) manually.
The reference is https://www.kernel.org/doc/html/latest/x86/mtrr.html
--
2.17.1
next reply other threads:[~2019-12-04 15:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 15:19 Xiaoyun Li [this message]
2019-12-23 2:39 ` [dpdk-dev] [PATCH] doc: fix a typo in ntb guide Wu, Jingjing
2020-01-20 9:14 ` Thomas Monjalon
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