From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB747C54FD0 for ; Mon, 27 Apr 2020 07:59:26 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 4A8682078E for ; Mon, 27 Apr 2020 07:59:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4A8682078E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A05D61C139; Mon, 27 Apr 2020 09:59:25 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id C498A1C132 for ; Mon, 27 Apr 2020 09:59:23 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4762F1FB; Mon, 27 Apr 2020 00:59:23 -0700 (PDT) Received: from net-arm-thunderx2-03.shanghai.arm.com (net-arm-thunderx2-03.shanghai.arm.com [10.169.41.185]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 90ACE3F68F; Mon, 27 Apr 2020 00:59:18 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, stephen@networkplumber.org, david.marchand@redhat.com, mb@smartsharesystems.com, jerinj@marvell.com, bruce.richardson@intel.com, ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com, xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com, zhouguoyang@huawei.com, honnappa.nagarahalli@arm.com, gavin.hu@arm.com, phil.yang@arm.com Cc: nd@arm.com, dev@dpdk.org Date: Mon, 27 Apr 2020 15:58:50 +0800 Message-Id: <20200427075856.12098-1-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> References: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v10 0/6] implement common bit operation APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" v10: Rename the APIs of '_relaxed' suffix to 'rte_bit_relaxed_xx'. v9: 1. Change '*addr = (*addr) | mask' to '*addr = val | mask'. 2. Move 'rte_bitops.h' from 'device' section to 'basic' section in 'doxy-api-index.md'. v8: 1. Change 'rte_pmd_bitops.h' to 'rte_bitops.h' allowing for future extension into other cases other than PMD only. 2. Replace omissive 'unsigned long' with 'uint32_t' to fix compling errors, the reason is the fact that 32-bit and 64-bit systems have different sized 'unsigned long', which caused incompatibility. v7: 1. Change the API's head file to 'rte_pmd_bitops.h' as a common- but-not-public file. 2. Replace C11 atomic operations with 'volatile'. As the use cases are limited to PMDs, a 'volatile' is sufficient. v5,v6: Trim 'unsigned long' in PMDs down to 'uint32_t', as on mainstream 64-bit OS, 'unsigned long' is 64-bit in size, but the 32-bit OS expects 32-bit 'unsigned long' argument. v4: Introduce uint32_t/uint64_t *addr when definiting bit operation APIs. v3: 1. Change the API's head file back to rte_bitops.h, then implement both 32-bit and 64-bit operations with and without C11 atomic memory ordering. 2. Add multi-core test case for bit operations which implemented with memory ordering. 3. Modify the doc of both APIs and test cases. v2: 1. Add doxygen comments for the rte bit operation API. 2. Add test cases for common rte bit operation API. 3. Change the header file to rte_io_bitops.h and the operation to rte_io_set_bit() etc., as the API uses barriers inside and the barriers are only needed for IO operations. 4. Use an well defined uint_NN_t type. Joyce Kong (6): lib/eal: implement the family of common bit operation APIs test/bitops: add bit operation test case net/axgbe: use common rte bit operation APIs instead net/bnx2x: use common rte bit operation APIs instead net/qede: use common rte bit operation APIs instead net/hinic: use common rte bit operation APIs instead MAINTAINERS | 5 + app/test/Makefile | 1 + app/test/autotest_data.py | 6 + app/test/meson.build | 2 + app/test/test_bitops.c | 137 +++++++++++ doc/api/doxy-api-index.md | 3 +- drivers/net/axgbe/axgbe_common.h | 29 +-- drivers/net/axgbe/axgbe_ethdev.c | 14 +- drivers/net/axgbe/axgbe_ethdev.h | 2 +- drivers/net/axgbe/axgbe_mdio.c | 15 +- drivers/net/bnx2x/bnx2x.c | 271 +++++++++++----------- drivers/net/bnx2x/bnx2x.h | 10 +- drivers/net/bnx2x/ecore_sp.c | 68 +++--- drivers/net/bnx2x/ecore_sp.h | 106 ++++----- drivers/net/hinic/Makefile | 1 + drivers/net/hinic/base/hinic_compat.h | 33 +-- drivers/net/hinic/hinic_pmd_ethdev.c | 18 +- drivers/net/hinic/hinic_pmd_ethdev.h | 2 +- drivers/net/hinic/meson.build | 2 + drivers/net/qede/base/bcm_osal.c | 22 +- drivers/net/qede/base/bcm_osal.h | 14 +- drivers/net/qede/base/ecore.h | 6 +- drivers/net/qede/base/ecore_cxt.c | 6 +- drivers/net/qede/base/ecore_dcbx.c | 8 +- drivers/net/qede/base/ecore_dev.c | 38 +-- drivers/net/qede/base/ecore_dev_api.h | 2 +- drivers/net/qede/base/ecore_l2.c | 6 +- drivers/net/qede/base/ecore_mcp.c | 4 +- drivers/net/qede/base/ecore_sp_commands.c | 12 +- drivers/net/qede/base/ecore_spq.c | 2 +- drivers/net/qede/base/ecore_spq.h | 10 +- drivers/net/qede/qede_main.c | 4 +- lib/librte_eal/include/meson.build | 1 + lib/librte_eal/include/rte_bitops.h | 258 ++++++++++++++++++++ 34 files changed, 721 insertions(+), 397 deletions(-) create mode 100644 app/test/test_bitops.c create mode 100644 lib/librte_eal/include/rte_bitops.h -- 2.17.1