From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 856A1C54FD0 for ; Mon, 27 Apr 2020 07:59:40 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 262BD2078E for ; Mon, 27 Apr 2020 07:59:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 262BD2078E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 112DB1C1AF; Mon, 27 Apr 2020 09:59:34 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 3DDD21C1A4 for ; Mon, 27 Apr 2020 09:59:33 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB3D31FB; Mon, 27 Apr 2020 00:59:32 -0700 (PDT) Received: from net-arm-thunderx2-03.shanghai.arm.com (net-arm-thunderx2-03.shanghai.arm.com [10.169.41.185]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6253F3F68F; Mon, 27 Apr 2020 00:59:28 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, stephen@networkplumber.org, david.marchand@redhat.com, mb@smartsharesystems.com, jerinj@marvell.com, bruce.richardson@intel.com, ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com, xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com, zhouguoyang@huawei.com, honnappa.nagarahalli@arm.com, gavin.hu@arm.com, phil.yang@arm.com Cc: nd@arm.com, dev@dpdk.org Date: Mon, 27 Apr 2020 15:58:52 +0800 Message-Id: <20200427075856.12098-3-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200427075856.12098-1-joyce.kong@arm.com> References: <20200427075856.12098-1-joyce.kong@arm.com> In-Reply-To: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> References: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v10 2/6] test/bitops: add bit operation test case X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add test cases for setting bit, clearing bit, testing and setting bit, testing and clearing bit operation. Signed-off-by: Joyce Kong Reviewed-by: Gavin Hu Reviewed-by: Phil Yang --- MAINTAINERS | 1 + app/test/Makefile | 1 + app/test/autotest_data.py | 6 ++ app/test/meson.build | 2 + app/test/test_bitops.c | 137 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+) create mode 100644 app/test/test_bitops.c diff --git a/MAINTAINERS b/MAINTAINERS index c8d4b99a7..cff9f590d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -253,6 +253,7 @@ F: app/test/test_bitmap.c Bitops M: Joyce Kong F: lib/librte_eal/include/rte_bitops.h +F: app/test/test_bitops.c MCSlock - EXPERIMENTAL M: Phil Yang diff --git a/app/test/Makefile b/app/test/Makefile index 4582eca6c..eaad3b71d 100644 --- a/app/test/Makefile +++ b/app/test/Makefile @@ -70,6 +70,7 @@ SRCS-y += test_ticketlock.c SRCS-y += test_memory.c SRCS-y += test_memzone.c SRCS-y += test_bitmap.c +SRCS-y += test_bitops.c SRCS-y += test_reciprocal_division.c SRCS-y += test_reciprocal_division_perf.c SRCS-y += test_fbarray.c diff --git a/app/test/autotest_data.py b/app/test/autotest_data.py index 7b1d01389..fc3fcc159 100644 --- a/app/test/autotest_data.py +++ b/app/test/autotest_data.py @@ -404,6 +404,12 @@ "Func": default_autotest, "Report": None, }, + { + "Name": "Bitops test", + "Command": "bitops_test", + "Func": default_autotest, + "Report": None, + }, { "Name": "Hash multiwriter autotest", "Command": "hash_multiwriter_autotest", diff --git a/app/test/meson.build b/app/test/meson.build index fc60acbe7..fed6dd51b 100644 --- a/app/test/meson.build +++ b/app/test/meson.build @@ -12,6 +12,7 @@ test_sources = files('commands.c', 'test_alarm.c', 'test_atomic.c', 'test_barrier.c', + 'test_bitops.c', 'test_bpf.c', 'test_byteorder.c', 'test_cmdline.c', @@ -171,6 +172,7 @@ fast_tests = [ ['acl_autotest', true], ['alarm_autotest', false], ['atomic_autotest', false], + ['bitops_autotest', true], ['byteorder_autotest', true], ['cmdline_autotest', true], ['common_autotest', true], diff --git a/app/test/test_bitops.c b/app/test/test_bitops.c new file mode 100644 index 000000000..dac92c61e --- /dev/null +++ b/app/test/test_bitops.c @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019 Arm Limited + */ + +#include +#include +#include "test.h" + +uint32_t val32; +uint64_t val64; + +#define MAX_BITS_32 32 +#define MAX_BITS_64 64 +/* + * Bitops functions + * ================ + * + * - The main test function performs several subtests. + * - Check bit operations on one core. + * - Initialize valXX to specified values, then set each bit of valXX + * to 1 one by one in "test_bit_relaxed_set". + * + * - Clear each bit of valXX to 0 one by one in "test_bit_relaxed_clear". + * + * - Function "test_bit_relaxed_test_set_clear" checks whether each bit + * of valXX can do "test and set" and "test and clear" correctly. + */ + +static int +test_bit_relaxed_set(void) +{ + unsigned int i; + + for (i = 0; i < MAX_BITS_32; i++) + rte_bit_relaxed_set32(i, &val32); + + for (i = 0; i < MAX_BITS_32; i++) + if (!rte_bit_relaxed_get32(i, &val32)) { + printf("Failed to set bit in relaxed version.\n"); + return TEST_FAILED; + } + + for (i = 0; i < MAX_BITS_64; i++) + rte_bit_relaxed_set64(i, &val64); + + for (i = 0; i < MAX_BITS_64; i++) + if (!rte_bit_relaxed_get64(i, &val64)) { + printf("Failed to set bit in relaxed version.\n"); + return TEST_FAILED; + } + + return TEST_SUCCESS; +} + +static int +test_bit_relaxed_clear(void) +{ + unsigned int i; + + for (i = 0; i < MAX_BITS_32; i++) + rte_bit_relaxed_clear32(i, &val32); + + for (i = 0; i < MAX_BITS_32; i++) + if (rte_bit_relaxed_get32(i, &val32)) { + printf("Failed to clear bit in relaxed version.\n"); + return TEST_FAILED; + } + + for (i = 0; i < MAX_BITS_64; i++) + rte_bit_relaxed_clear64(i, &val64); + + for (i = 0; i < MAX_BITS_64; i++) + if (rte_bit_relaxed_get64(i, &val64)) { + printf("Failed to clear bit in relaxed version.\n"); + return TEST_FAILED; + } + + return TEST_SUCCESS; +} + +static int +test_bit_relaxed_test_set_clear(void) +{ + unsigned int i; + + for (i = 0; i < MAX_BITS_32; i++) + rte_bit_relaxed_test_and_set32(i, &val32); + + for (i = 0; i < MAX_BITS_32; i++) + if (!rte_bit_relaxed_test_and_clear32(i, &val32)) { + printf("Failed to set and test bit in relaxed version.\n"); + return TEST_FAILED; + } + + for (i = 0; i < MAX_BITS_32; i++) + if (rte_bit_relaxed_get32(i, &val32)) { + printf("Failed to test and clear bit in relaxed version.\n"); + return TEST_FAILED; + } + + for (i = 0; i < MAX_BITS_64; i++) + rte_bit_relaxed_test_and_set64(i, &val64); + + for (i = 0; i < MAX_BITS_64; i++) + if (!rte_bit_relaxed_test_and_clear64(i, &val64)) { + printf("Failed to set and test bit in relaxed version.\n"); + return TEST_FAILED; + } + + for (i = 0; i < MAX_BITS_64; i++) + if (rte_bit_relaxed_get64(i, &val64)) { + printf("Failed to test and clear bit in relaxed version.\n"); + return TEST_FAILED; + } + + return TEST_SUCCESS; +} + +static int +test_bitops(void) +{ + val32 = 0; + val64 = 0; + + if (test_bit_relaxed_set() < 0) + return TEST_FAILED; + + if (test_bit_relaxed_clear() < 0) + return TEST_FAILED; + + if (test_bit_relaxed_test_set_clear() < 0) + return TEST_FAILED; + + return TEST_SUCCESS; +} + +REGISTER_TEST_COMMAND(bitops_autotest, test_bitops); -- 2.17.1