From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48FE8C433DB for ; Tue, 9 Mar 2021 10:57:05 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id B32EE6522B for ; Tue, 9 Mar 2021 10:57:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B32EE6522B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9A56322A4C5; Tue, 9 Mar 2021 11:57:03 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id BBA3822A4C5 for ; Tue, 9 Mar 2021 11:57:01 +0100 (CET) IronPort-SDR: oKJGoCMiprreDotIWyjX4UojxtqHYldL3KdQw0KVjZrs+jZOjqa9acLJN76ILaN9RzpxDH/3w5 zArqorKbu+7A== X-IronPort-AV: E=McAfee;i="6000,8403,9917"; a="249583737" X-IronPort-AV: E=Sophos;i="5.81,234,1610438400"; d="scan'208";a="249583737" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Mar 2021 02:57:00 -0800 IronPort-SDR: E6p0wydvAv9S7WkEFhpigkokV/kyQDgHNWIGwDEHJw1hR5MspIT3tQxViIQd19TuKlV984fF0e sUgxa1OQOibg== X-IronPort-AV: E=Sophos;i="5.81,234,1610438400"; d="scan'208";a="447461132" Received: from bricha3-mobl.ger.corp.intel.com ([10.252.21.187]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 09 Mar 2021 02:56:57 -0800 Date: Tue, 9 Mar 2021 10:56:54 +0000 From: Bruce Richardson To: Juraj =?utf-8?Q?Linke=C5=A1?= Cc: "Ruifeng.Wang@arm.com" , "Honnappa.Nagarahalli@arm.com" , "Phil.Yang@arm.com" , "vcchunga@amazon.com" , "Dharmik.Thakkar@arm.com" , "jerinjacobk@gmail.com" , "hemant.agrawal@nxp.com" , "ajit.khaparde@broadcom.com" , "ferruh.yigit@intel.com" , "aboyer@pensando.io" , "lironh@marvell.com" , "dev@dpdk.org" Message-ID: <20210309105654.GA1127@bricha3-MOBL.ger.corp.intel.com> References: <1610717170-31279-1-git-send-email-juraj.linkes@pantheon.tech> <1612361037-12746-1-git-send-email-juraj.linkes@pantheon.tech> <1612361037-12746-2-git-send-email-juraj.linkes@pantheon.tech> <57b0f0b0b8bb40fda8c87f7eb7ec759b@pantheon.tech> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <57b0f0b0b8bb40fda8c87f7eb7ec759b@pantheon.tech> Subject: Re: [dpdk-dev] [PATCH v16 1/3] build: disable/enable drivers in Arm builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Mar 09, 2021 at 08:58:39AM +0000, Juraj Linkeš wrote: > Honnappa, Thomas, Bruce, Jerin, you've comments in the past. Do you have any further input? > > I think we just need to agree on the allowlist/blocklist mechanism. The current commit allows specifying either an allowlist or a blocklist, but not both. However, it would possible to implement specifying both - first we'll allow what's in allowlist and then we'll remove from that set what's in blocklist. Thoughts? > If we have both, I think limiting to only one is by far the sanest option. I'm not fully convinced by the need to have both, since the blocklist allows wildcarding and exception cases. For example "net/[!i]*" will blocklist all net drivers except those starting with an "i". Admittedly, for usability purposes having an allowlist might work better. One final thought, if we add a driver allowlist for cross files, should we also add one as a top-level meson option also for consistency? /Bruce