From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE755CA9EA0 for ; Fri, 25 Oct 2019 08:43:38 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 738C821D7F for ; Fri, 25 Oct 2019 08:43:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 738C821D7F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D60CB1E8D1; Fri, 25 Oct 2019 10:43:37 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 4C7C01E8D0 for ; Fri, 25 Oct 2019 10:43:34 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Oct 2019 01:43:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,228,1569308400"; d="scan'208";a="349968818" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga004.jf.intel.com with ESMTP; 25 Oct 2019 01:43:33 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 25 Oct 2019 01:43:32 -0700 Received: from shsmsx153.ccr.corp.intel.com (10.239.6.53) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 25 Oct 2019 01:43:32 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.96]) by SHSMSX153.ccr.corp.intel.com ([10.239.6.53]) with mapi id 14.03.0439.000; Fri, 25 Oct 2019 16:43:30 +0800 From: "Pei, Andy" To: "Ye, Xiaolong" CC: "dev@dpdk.org" , "Xu, Rosen" , "Zhang, Tianfei" , "Zhang, Qi Z" , "Yigit, Ferruh" , "Richardson, Bruce" Thread-Topic: [PATCH v13 00/19] add PCIe AER disable and IRQ support for ipn3ke Thread-Index: AQHVitnUVQln3AOhrUq8Ck4heC0k96drCg3g Date: Fri, 25 Oct 2019 08:43:30 +0000 Message-ID: <5941F446C088714A85408FA3132CFCBB01095F7F@SHSMSX105.ccr.corp.intel.com> References: <1571826408-151532-2-git-send-email-andy.pei@intel.com> <1571917119-149534-1-git-send-email-andy.pei@intel.com> <20191025021010.GC2504@intel.com> In-Reply-To: <20191025021010.GC2504@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v13 00/19] add PCIe AER disable and IRQ support for ipn3ke X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi xiaolong I think concerning the using rte_exit in driver issue we should have a more= detailed discuss with you and Rosen Xu. -----Original Message----- From: Ye, Xiaolong=20 Sent: Friday, October 25, 2019 10:10 AM To: Pei, Andy Cc: dev@dpdk.org; Xu, Rosen ; Zhang, Tianfei ; Zhang, Qi Z ; Yigit, Ferruh ; Richardson, Bruce Subject: Re: [PATCH v13 00/19] add PCIe AER disable and IRQ support for ipn= 3ke Please fix the patchwork warnings for patch 10/11/12. Thanks, Xiaolong On 10/24, Andy Pei wrote: >This patch set adds PCIe AER disable and FPGA interrupt support for=20 >ipn3ke. It also provides a small rework for port bonding between FPGA=20 >line side port and I40e PF port. > >What is the PCI Express AER(Advanced Error Reporting)? >Advanced Error Reporting capability is implemented with a PCI Express=20 >advanced error reporting extended capability structure providing more=20 >robust error reporting. It's also one of PCI Express error reporting=20 >paradigms. AER is supported by most of PCIe devices. > >In PAC N3000 card, some uncertainty errors will cause FPGA reload, such=20 >as temperature is higher than threshold. From Software point of view,=20 >FPGA reload means FPGA unplug and plug. For avoiding system crash we=20 >need to clear AER register before these errors occur. > >Currently PAC N3000 card FME and AFU all provide interrupts, in ifpga=20 >rawdev driver, we implement a FME interrupt function to notify errors=20 >reported by FME. Besides this, OPAE share code also provide a common=20 >AFU interrupt API for users to register their own interrupt functions. > >v13 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- fix meson build issue. > >v12 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- fix meson build issue. >=20 >v11 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- move symbol ifpga_rawdev_ge to the EXPERIMENTAL section of > drivers/raw/ifpga/rte_rawdev_ifpga_version.map > >v10 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- introducing new irq API >- fix meson build issue > >v9 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- Add mutex lock on do_transaction() function for SPI driver to avoid=20 >race > condition. > >v8 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- add multiple cards support. > >v7 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >- rename function i40e_set_switch_dev to rte_pmd_i40e_set_switch_dev > and move it to rte_pmd_i40e.c since it is declared at rte_pmd_i40e.h >- function rte_pmd_i40e_set_switch_dev works as an external API, > use port_id but not rte_eth_dev as parameter. >- add doxygen header here for the new API. >- update the rte_pmd_i40e_version.map. >- fix coding style issue. >- enable CONFIG_RTE_EAL_VFIO in linux environment to build irq support. >- for functions with a lot of similarity, extract out common function=20 >to reduce > duplication. > >v6 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D >- correct author information. >- correct typo in commit message and remove Gerrit Change-Id's before > submitting upstream > >v5 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >- add lightweight fpga image support. in lightweight fpga image mode, > ipn3ke representor will not be probed. > >v4 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >- align with new naming standard. > >v3 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >- Add FPGA network side port MTU configuration > >v2 updates: >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >- Add AUX feature support > >Andy Pei (2): > net/i40e: i40e support ipn3ke FPGA port bonding > raw/ifpga: add lightweight fpga image support > >Rosen Xu (3): > raw/ifpga: add SEU error handler > raw/ifpga: add PCIe BDF devices tree scan > net/ipn3ke: remove configuration for i40e port bonding > >Tianfei zhang (14): > raw/ifpga/base: add irq support > raw/ifpga/base: clear pending bit > raw/ifpga/base: add SEU error support > raw/ifpga/base: add device tree support > raw/ifpga/base: align the send buffer for SPI > raw/ifpga/base: add sensor support > raw/ifpga/base: introducing sensor APIs > raw/ifpga/base: update SEU register definition > raw/ifpga/base: add secure support > raw/ifpga/base: configure FEC mode > raw/ifpga/base: clean fme errors > raw/ifpga/base: add new API get board info > raw/ifpga/base: add multiple cards support > raw/ifpga: introducing new irq API > > config/common_base | 4 +- > config/common_linux | 6 + > drivers/meson.build | 6 +- > drivers/net/i40e/base/i40e_type.h | 3 + > drivers/net/i40e/i40e_ethdev.c | 6 + > drivers/net/i40e/rte_pmd_i40e.c | 21 + > drivers/net/i40e/rte_pmd_i40e.h | 18 + > drivers/net/i40e/rte_pmd_i40e_version.map | 8 +- > drivers/net/ipn3ke/Makefile | 2 + > drivers/net/ipn3ke/ipn3ke_ethdev.c | 289 +------- > drivers/net/ipn3ke/ipn3ke_representor.c | 8 +- > drivers/net/ipn3ke/meson.build | 24 +- > drivers/raw/ifpga/base/ifpga_api.c | 21 + > drivers/raw/ifpga/base/ifpga_defines.h | 75 +- > drivers/raw/ifpga/base/ifpga_feature_dev.c | 59 ++ > drivers/raw/ifpga/base/ifpga_feature_dev.h | 3 + > drivers/raw/ifpga/base/ifpga_fme.c | 166 ++++- > drivers/raw/ifpga/base/ifpga_fme_error.c | 74 +- > drivers/raw/ifpga/base/ifpga_hw.h | 2 +- > drivers/raw/ifpga/base/ifpga_port.c | 18 + > drivers/raw/ifpga/base/ifpga_port_error.c | 19 + > drivers/raw/ifpga/base/meson.build | 2 +- > drivers/raw/ifpga/base/opae_debug.c | 3 + > drivers/raw/ifpga/base/opae_hw_api.c | 137 ++++ > drivers/raw/ifpga/base/opae_hw_api.h | 26 + > drivers/raw/ifpga/base/opae_i2c.c | 44 +- > drivers/raw/ifpga/base/opae_i2c.h | 3 +- > drivers/raw/ifpga/base/opae_ifpga_hw_api.h | 2 + > drivers/raw/ifpga/base/opae_intel_max10.c | 599 +++++++++++++++- > drivers/raw/ifpga/base/opae_intel_max10.h | 157 ++++- > drivers/raw/ifpga/base/opae_osdep.h | 7 +- > drivers/raw/ifpga/base/opae_spi.c | 5 - > drivers/raw/ifpga/base/opae_spi.h | 26 +- > drivers/raw/ifpga/base/opae_spi_transaction.c | 84 ++- > drivers/raw/ifpga/ifpga_rawdev.c | 903 ++++++++++++++++++++= ++++- > drivers/raw/ifpga/ifpga_rawdev.h | 30 + > drivers/raw/ifpga/meson.build | 25 +- > drivers/raw/ifpga/rte_rawdev_ifpga_version.map | 3 + > mk/rte.app.mk | 2 +- > 39 files changed, 2448 insertions(+), 442 deletions(-) > >-- >1.8.3.1 >