From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58970C43613 for ; Mon, 24 Jun 2019 14:46:18 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id E417C20674 for ; Mon, 24 Jun 2019 14:46:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E417C20674 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B85E91BEE1; Mon, 24 Jun 2019 16:46:16 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id D7B621BE99 for ; Mon, 24 Jun 2019 16:46:15 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Jun 2019 07:46:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,412,1557212400"; d="scan'208";a="166351524" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga006.jf.intel.com with ESMTP; 24 Jun 2019 07:46:14 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 24 Jun 2019 07:46:13 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.149]) by FMSMSX152.amr.corp.intel.com ([169.254.6.192]) with mapi id 14.03.0439.000; Mon, 24 Jun 2019 07:46:13 -0700 From: "Eads, Gage" To: Phil Yang , "dev@dpdk.org" CC: "thomas@monjalon.net" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "Honnappa.Nagarahalli@arm.com" , "gavin.hu@arm.com" , "nd@arm.com" Thread-Topic: [PATCH v2 1/3] eal/arm64: add 128-bit atomic compare exchange Thread-Index: AQHVKXIAYzoR+JpNeEmvSmaBOAiuUaaq4kbw Date: Mon, 24 Jun 2019 14:46:13 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E68D00D96@FMSMSX108.amr.corp.intel.com> References: <1561257671-10316-1-git-send-email-phil.yang@arm.com> <1561259746-12611-1-git-send-email-phil.yang@arm.com> In-Reply-To: <1561259746-12611-1-git-send-email-phil.yang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTI1OGRhZjAtMzg2MS00MjdjLWIyOTUtYjEzMGI0ZDdkNzc3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiS2ZXNjl2YlJNd0dZZ3Z0VVVEZldOS09yWE4wS2lNblNtOHJPR1ViQUFXZmIwaFl4THpiVjlEOEhXVlZKbys5TCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/3] eal/arm64: add 128-bit atomic compare exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Phil, > diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h > b/lib/librte_eal/common/include/generic/rte_atomic.h > index 9958543..7dd1aa4 100644 > --- a/lib/librte_eal/common/include/generic/rte_atomic.h > +++ b/lib/librte_eal/common/include/generic/rte_atomic.h > @@ -1081,6 +1081,18 @@ static inline void > rte_atomic64_clear(rte_atomic64_t *v) >=20 > /*------------------------ 128 bit atomic operations -------------------= ------*/ >=20 > +/** > + * 128-bit integer structure. > + */ > +RTE_STD_C11 > +typedef struct { > + RTE_STD_C11 > + union { > + uint64_t val[2]; > + __extension__ __int128 int128; > + }; > +} __rte_aligned(16) rte_int128_t; > + > #ifdef __DOXYGEN__ >=20 This change breaks 32-bit x86 builds*. A couple ways to resolve this are 1)= with RTE_ARCH_* ifdefs, or 2) keep duplicate definitions of the struct in = the aarch64 and x86 header files. Thanks, Gage *http://mails.dpdk.org/archives/test-report/2019-June/086586.html