From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C159C0650F for ; Fri, 9 Aug 2019 02:44:33 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 2CBBB204EC for ; Fri, 9 Aug 2019 02:44:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2CBBB204EC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 59EDE2B95; Fri, 9 Aug 2019 04:44:32 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id EF9D92B8C; Fri, 9 Aug 2019 04:44:30 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 19:44:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,363,1559545200"; d="scan'208";a="175035635" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga008.fm.intel.com with ESMTP; 08 Aug 2019 19:44:29 -0700 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 19:44:29 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 19:44:28 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.80]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.139]) with mapi id 14.03.0439.000; Fri, 9 Aug 2019 10:44:27 +0800 From: "Xing, Beilei" To: "Zhang, Xiao" , "dev@dpdk.org" CC: "Zhang, Qi Z" , "stable@dpdk.org" Thread-Topic: [v2] net/i40e: fix vf runtime queues rss config Thread-Index: AQHVTGmqrurtq2BN00+0Wray4Mvv66bw8T6AgAEsmwA= Date: Fri, 9 Aug 2019 02:44:26 +0000 Message-ID: <94479800C636CB44BD422CB454846E013CE222D5@SHSMSX101.ccr.corp.intel.com> References: <1565136542-7652-1-git-send-email-xiao.zhang@intel.com> <1565282473-35661-1-git-send-email-xiao.zhang@intel.com> In-Reply-To: <1565282473-35661-1-git-send-email-xiao.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [v2] net/i40e: fix vf runtime queues rss config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Zhang, Xiao > Sent: Friday, August 9, 2019 12:41 AM > To: dev@dpdk.org > Cc: Xing, Beilei ; Zhang, Qi Z ; > Zhang, Xiao ; stable@dpdk.org > Subject: [v2] net/i40e: fix vf runtime queues rss config >=20 > I40evf queue can not work properly with kernel pf driver. Eg. when config= ure > 8 queues pair, only 4 queues can receive packets, and half packets will b= e lost > if using 2 queues pair. > This issue is caused by misconfiguration of look up table, use aq command= to > setup the lut to make it work properly. >=20 > Fixes: cea7a51c1750 ("i40evf: support RSS") > Cc: stable@dpdk.org >=20 > Signed-off-by: Xiao Zhang > --- > v2 change for loop format to avoid build patch issue. > --- > drivers/net/i40e/i40e_ethdev_vf.c | 36 +++++++++++++++++++++++++++++--- > ---- > 1 file changed, 29 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c > b/drivers/net/i40e/i40e_ethdev_vf.c > index 308fb98..2d3cf3e 100644 > --- a/drivers/net/i40e/i40e_ethdev_vf.c > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > @@ -2574,6 +2574,26 @@ i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct > rte_eth_rss_conf *rss_conf) > if (ret) > return ret; >=20 > + if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) { > + uint8_t *lut; > + uint32_t rss_lut_size =3D (I40E_VFQF_HLUT1_MAX_INDEX + 1) * > 4; > + uint32_t i; > + lut =3D rte_zmalloc("i40e_rss_lut", rss_lut_size, 0); > + if (!lut) { > + PMD_DRV_LOG(ERR, "No memory can be allocated"); > + return -ENOMEM; > + } > + > + for (i =3D 0; i < rss_lut_size; i++) > + lut[i] =3D i % vf->num_queue_pairs; > + > + ret =3D i40evf_set_rss_lut(&vf->vsi, lut, > + rss_lut_size); > + rte_free(lut); > + if (ret) > + return ret; > + } > + Why not moving the LUT configuration to the following i40evf_config_rss fun= ction? > hena =3D i40e_config_hena(vf->adapter, rss_conf->rss_hf); > i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena); > i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32)); > @@ -2607,13 +2627,15 @@ i40evf_config_rss(struct i40e_vf *vf) > } >=20 > num =3D RTE_MIN(vf->dev_data->nb_rx_queues, > I40E_MAX_QP_NUM_PER_VF); > - /* Fill out the look up table */ > - for (i =3D 0, j =3D 0; i < nb_q; i++, j++) { > - if (j >=3D num) > - j =3D 0; > - lut =3D (lut << 8) | j; > - if ((i & 3) =3D=3D 3) > - I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut); > + if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) { > + /* Fill out the look up table */ > + for (i =3D 0, j =3D 0; i < nb_q; i++, j++) { > + if (j >=3D num) > + j =3D 0; > + lut =3D (lut << 8) | j; > + if ((i & 3) =3D=3D 3) > + I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> > 2), lut); > + } > } >=20 > rss_conf =3D vf->dev_data->dev_conf.rx_adv_conf.rss_conf; > -- > 2.7.4