From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 828F5C31E44 for ; Mon, 17 Jun 2019 08:23:30 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id EC21D21E71 for ; Mon, 17 Jun 2019 08:23:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC21D21E71 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BC0791BE4A; Mon, 17 Jun 2019 10:23:28 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 9A34D1BE26 for ; Mon, 17 Jun 2019 10:23:27 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jun 2019 01:23:26 -0700 X-ExtLoop1: 1 Received: from pgsmsx114.gar.corp.intel.com ([10.108.55.203]) by fmsmga004.fm.intel.com with ESMTP; 17 Jun 2019 01:23:25 -0700 Received: from pgsmsx103.gar.corp.intel.com ([169.254.2.96]) by pgsmsx114.gar.corp.intel.com ([169.254.4.160]) with mapi id 14.03.0439.000; Mon, 17 Jun 2019 16:23:25 +0800 From: "Zhao1, Wei" To: "Xing, Beilei" , "Yang, Qiming" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter Thread-Index: AQHVIPPdU1J/6sy0M06ZNgNITQs6Aqae0qQAgAC2f/A= Date: Mon, 17 Jun 2019 08:23:24 +0000 Message-ID: References: <1559552722-8970-1-git-send-email-qiming.yang@intel.com> <20190612075029.109914-1-qiming.yang@intel.com> <20190612075029.109914-2-qiming.yang@intel.com> <94479800C636CB44BD422CB454846E013CDE5B2E@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <94479800C636CB44BD422CB454846E013CDE5B2E@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [172.30.20.206] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, beilei > -----Original Message----- > From: Xing, Beilei > Sent: Monday, June 17, 2019 1:27 PM > To: Yang, Qiming ; dev@dpdk.org > Cc: Zhao1, Wei > Subject: RE: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter >=20 >=20 >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qiming Yang > > Sent: Wednesday, June 12, 2019 3:50 PM > > To: dev@dpdk.org > > Cc: Zhao1, Wei > > Subject: [dpdk-dev] [PATCH v2 1/3] net/ice: enable switch filter > > > > From: wei zhao > > > > The patch enables the backend of rte_flow. It transfers rte_flow_xxx > > to device specific data structure and configures packet process > > engine's binary classifier > > (switch) properly. > > > > Signed-off-by: Wei Zhao > > --- > > drivers/net/ice/Makefile | 1 + > > drivers/net/ice/ice_ethdev.h | 6 + > > drivers/net/ice/ice_switch_filter.c | 502 > > ++++++++++++++++++++++++++++++++++++ > > drivers/net/ice/ice_switch_filter.h | 28 ++ > > drivers/net/ice/meson.build | 3 +- > > 5 files changed, 539 insertions(+), 1 deletion(-) create mode 100644 > > drivers/net/ice/ice_switch_filter.c > > create mode 100644 drivers/net/ice/ice_switch_filter.h > > > > diff --git a/drivers/net/ice/Makefile b/drivers/net/ice/Makefile index > > 0e5c55e..b10d826 100644 > > --- a/drivers/net/ice/Makefile > > +++ b/drivers/net/ice/Makefile > > @@ -60,6 +60,7 @@ ifeq ($(CONFIG_RTE_ARCH_X86), y) > > SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) +=3D ice_rxtx_vec_sse.c endif > > > > +SRCS-$(CONFIG_RTE_LIBRTE_ICE_PMD) +=3D ice_switch_filter.c > > ifeq ($(findstring > > RTE_MACHINE_CPUFLAG_AVX2,$(CFLAGS)),RTE_MACHINE_CPUFLAG_AVX2) > > CC_AVX2_SUPPORT=3D1 > > else > > diff --git a/drivers/net/ice/ice_ethdev.h > > b/drivers/net/ice/ice_ethdev.h index 1385afa..67a358a 100644 > > --- a/drivers/net/ice/ice_ethdev.h > > +++ b/drivers/net/ice/ice_ethdev.h > > @@ -234,6 +234,12 @@ struct ice_vsi { > > bool offset_loaded; > > }; > > > > +/* Struct to store flow created. */ > > +struct rte_flow { > > + TAILQ_ENTRY(rte_flow) node; > > +void *rule; > > +}; > > + > > struct ice_pf { > > struct ice_adapter *adapter; /* The adapter this PF associate to */ > > struct ice_vsi *main_vsi; /* pointer to main VSI structure */ diff > > --git a/drivers/net/ice/ice_switch_filter.c > > b/drivers/net/ice/ice_switch_filter.c > > new file mode 100644 > > index 0000000..e679675 > > --- /dev/null > > +++ b/drivers/net/ice/ice_switch_filter.c > > @@ -0,0 +1,502 @@ > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "ice_logs.h" > > +#include "base/ice_type.h" > > +#include "ice_switch_filter.h" > > + > > +static int > > +ice_parse_switch_filter( > > + const struct rte_flow_item pattern[], > > + const struct rte_flow_action actions[], > > + struct rte_flow_error *error, > > + struct ice_adv_rule_info *rule_info, > > + struct ice_adv_lkup_elem **lkup_list, > > + uint16_t *lkups_num) > > +{ > > + const struct rte_flow_item *item =3D pattern; > > + enum rte_flow_item_type item_type; > > + const struct rte_flow_item_eth *eth_spec, *eth_mask; > > + const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask; > > + const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask; > > + const struct rte_flow_item_tcp *tcp_spec, *tcp_mask; > > + const struct rte_flow_item_udp *udp_spec, *udp_mask; > > + const struct rte_flow_item_sctp *sctp_spec, *sctp_mask; > > + const struct rte_flow_item_nvgre *nvgre_spec, *nvgre_mask; > > + const struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask; > > + struct ice_adv_lkup_elem *list; > > + uint16_t i, j, t =3D 0; > > + uint16_t item_num =3D 0; > > + enum ice_sw_tunnel_type tun_type =3D ICE_NON_TUN; > > + > > + for (; item->type !=3D RTE_FLOW_ITEM_TYPE_END; item++) { > > + if (item->type =3D=3D RTE_FLOW_ITEM_TYPE_ETH || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_IPV4 || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_IPV6 || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_UDP || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_TCP || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_SCTP || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_VXLAN || > > + item->type =3D=3D RTE_FLOW_ITEM_TYPE_NVGRE) > > + item_num++; > > + } >=20 > I think the pattern is verified in generic flow framework, so how about > removing the condition here? This is not verfy, just get the number of item_num to malloc memory for lis= t >=20 > ... >=20 > > + > > +/* By now ice switch filter action code implement only > > +* supports QUEUE or DROP. > > +*/ > > +static int > > +ice_parse_switch_action(struct ice_pf *pf, > > + const struct rte_flow_action *actions, > > + struct rte_flow_error *error, > > + struct ice_adv_rule_info *rule_info) { > > + struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + struct ice_vsi *vsi =3D pf->main_vsi; > > + const struct rte_flow_action *act; > > + const struct rte_flow_action_queue *act_q; > > + uint16_t base_queue, index =3D 0; > > + uint32_t reg; > > + > > + /* Check if the first non-void action is QUEUE or DROP. */ > > + NEXT_ITEM_OF_ACTION(act, actions, index); > > + if (act->type !=3D RTE_FLOW_ACTION_TYPE_QUEUE && > > + act->type !=3D RTE_FLOW_ACTION_TYPE_DROP) { > > + rte_flow_error_set(error, EINVAL, > > RTE_FLOW_ERROR_TYPE_ACTION, > > + act, "Not supported action."); > > + return -rte_errno; > > + } > > + reg =3D ICE_READ_REG(hw, PFLAN_RX_QALLOC); > > + if (reg & PFLAN_RX_QALLOC_VALID_M) { > > + base_queue =3D reg & PFLAN_RX_QALLOC_FIRSTQ_M; > > + } else { > > + rte_flow_error_set(error, EINVAL, > > + RTE_FLOW_ERROR_TYPE_ACTION, > > + act, "Invalid queue register"); > > + return -rte_errno; > > + } > > + if (act->type =3D=3D RTE_FLOW_ACTION_TYPE_QUEUE) { > > + act_q =3D act->conf; > > + rule_info->sw_act.fltr_act =3D ICE_FWD_TO_Q; > > + rule_info->sw_act.fwd_id.q_id =3D base_queue + act_q->index; > > + if (act_q->index >=3D pf->dev_data->nb_rx_queues) { > > + rte_flow_error_set(error, EINVAL, > > + RTE_FLOW_ERROR_TYPE_ACTION, > > + act, "Invalid queue ID for" > > + " switch filter."); > > + return -rte_errno; > > + } > > + } else { > > + rule_info->sw_act.fltr_act =3D ICE_DROP_PACKET; > > + } > > + > > + rule_info->sw_act.vsi_handle =3D vsi->idx; > > + rule_info->rx =3D 1; > > + rule_info->sw_act.src =3D vsi->idx; > > + > > + /* Check if the next non-void item is END */ > > + index++; > > + NEXT_ITEM_OF_ACTION(act, actions, index); > > + if (act->type !=3D RTE_FLOW_ACTION_TYPE_END) { > > + rte_flow_error_set(error, EINVAL, > > RTE_FLOW_ERROR_TYPE_ACTION, > > + act, "Not supported action."); > > + return -rte_errno; > > + } > > + > > + return 0; > > +} >=20 >=20 > How about use supported array to replace NEXT_ITEM_OF_ACTION? Just like > pattern. Ok, updated in v3 >=20 >=20 > > + > > +static int > > +ice_switch_rule_set(struct ice_pf *pf, > > + struct ice_adv_lkup_elem *list, > > + uint16_t lkups_cnt, > > + struct ice_adv_rule_info *rule_info, > > + struct rte_flow *flow) > > +{ > > + struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + int ret; > > + struct ice_rule_query_data rule_added =3D {0}; > > + struct ice_rule_query_data *filter_ptr; > > + > > + if (lkups_cnt > ICE_MAX_CHAIN_WORDS) { > > + PMD_DRV_LOG(ERR, "item number too large for rule"); > > + return -ENOTSUP; > > + } > > + if (!list) { > > + PMD_DRV_LOG(ERR, "lookup list should not be NULL"); > > + return -ENOTSUP; > > + } > > + > > + ret =3D ice_add_adv_rule(hw, list, lkups_cnt, rule_info, &rule_added)= ; > > + > > + if (!ret) { > > + filter_ptr =3D rte_zmalloc("ice_switch_filter", > > + sizeof(struct ice_rule_query_data), 0); > > + if (!filter_ptr) { > > + PMD_DRV_LOG(ERR, "failed to allocate memory"); > > + return -EINVAL; > > + } > > + flow->rule =3D filter_ptr; > > + rte_memcpy(filter_ptr, > > + &rule_added, > > + sizeof(struct ice_rule_query_data)); > > + } > > + > > + return ret; > > +} > > + > > +int > > +ice_create_switch_filter(struct ice_pf *pf, > > + const struct rte_flow_item pattern[], > > + const struct rte_flow_action actions[], > > + struct rte_flow *flow, > > + struct rte_flow_error *error) > > +{ > > + int ret =3D 0; > > + struct ice_adv_rule_info rule_info =3D {0}; > > + struct ice_adv_lkup_elem *list =3D NULL; > > + uint16_t lkups_num =3D 0; > > + > > + ret =3D ice_parse_switch_filter(pattern, actions, error, > > + &rule_info, &list, &lkups_num); > > + if (ret) > > + goto out; > > + > > + ret =3D ice_parse_switch_action(pf, actions, error, &rule_info); > > + if (ret) > > + goto out; > > + > > + ret =3D ice_switch_rule_set(pf, list, lkups_num, &rule_info, flow); > > + if (ret) > > + goto out; > > + > > + rte_free(list); >=20 > Why allocate list is not in the function? Because I don't know the size, just as the comment before. >=20 > > + return 0; > > + > > +out: > > + rte_free(list); > > + > > + return -rte_errno; > > +} > > + > > +int > > +ice_destroy_switch_filter(struct ice_pf *pf, > > + struct rte_flow *flow) > > +{ > > + struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + int ret; > > + struct ice_rule_query_data *filter_ptr; > > + struct ice_rule_query_data rule_added; > > + > > + filter_ptr =3D (struct ice_rule_query_data *) > > + flow->rule; > > + rte_memcpy(&rule_added, filter_ptr, > > + sizeof(struct ice_rule_query_data)); > > + > > + if (!filter_ptr) { > > + PMD_DRV_LOG(ERR, "no such flow" > > + " create by switch filter"); > > + return -EINVAL; > > + } >=20 > How about add struct rte_flow_error *error as the parameter, and use > rte_flow_error_set here? Ok, updated in v3 >=20 > > + > > + ret =3D ice_rem_adv_rule_by_id(hw, &rule_added); > > + > > + rte_free(filter_ptr); > > + > > + return ret; > > +} > > + > > +void > > +ice_free_switch_filter_rule(void *rule) { > > + struct ice_rule_query_data *filter_ptr; > > + > > + filter_ptr =3D (struct ice_rule_query_data *)rule; > > + > > + rte_free(filter_ptr); > > +} > > diff --git a/drivers/net/ice/ice_switch_filter.h > > b/drivers/net/ice/ice_switch_filter.h > > new file mode 100644 > > index 0000000..957d0d1 > > --- /dev/null > > +++ b/drivers/net/ice/ice_switch_filter.h > > @@ -0,0 +1,28 @@ > > +#ifndef _ICE_SWITCH_FILTER_H_ > > +#define _ICE_SWITCH_FILTER_H_ > > + > > +#include "base/ice_switch.h" > > +#include "base/ice_type.h" > > +#include "ice_ethdev.h" > > + > > +#define NEXT_ITEM_OF_ACTION(act, actions, index) = \ > > + do { \ > > + act =3D actions + index; \ > > + while (act->type =3D=3D RTE_FLOW_ACTION_TYPE_VOID) { \ > > + index++; \ > > + act =3D actions + index; \ > > + } \ > > + } while (0) > > + > > +int > > +ice_create_switch_filter(struct ice_pf *pf, > > + const struct rte_flow_item pattern[], > > + const struct rte_flow_action actions[], > > + struct rte_flow *flow, > > + struct rte_flow_error *error); > > +int > > +ice_destroy_switch_filter(struct ice_pf *pf, > > + struct rte_flow *flow); > > +void > > +ice_free_switch_filter_rule(void *rule); #endif /* > > +_ICE_SWITCH_FILTER_H_ */ > > diff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build > > index > > 2bec688..8697676 100644 > > --- a/drivers/net/ice/meson.build > > +++ b/drivers/net/ice/meson.build > > @@ -6,7 +6,8 @@ objs =3D [base_objs] > > > > sources =3D files( > > 'ice_ethdev.c', > > - 'ice_rxtx.c' > > + 'ice_rxtx.c', > > + 'ice_switch_filter.c' > > ) > > > > deps +=3D ['hash'] > > -- > > 2.9.5