From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shreyansh Jain Subject: Re: [PATCH V2 2/5] Add Intel FPGA BUS Probe Code Date: Wed, 21 Mar 2018 14:37:54 +0530 Message-ID: References: <1521618694-140757-1-git-send-email-rosen.xu@intel.com> <1521618694-140757-3-git-send-email-rosen.xu@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Cc: dev@dpdk.org, declan.doherty@intel.com, Bruce Richardson , tianfei.zhang@intel.com, hao.wu@intel.com, gaetan.rivet@6wind.com To: Rosen Xu Return-path: Received: from EUR02-AM5-obe.outbound.protection.outlook.com (mail-eopbgr00053.outbound.protection.outlook.com [40.107.0.53]) by dpdk.org (Postfix) with ESMTP id 8E327728E for ; Wed, 21 Mar 2018 10:08:30 +0100 (CET) Received: by mail-wr0-f176.google.com with SMTP id 80so3288917wrb.2 for ; Wed, 21 Mar 2018 02:08:29 -0700 (PDT) In-Reply-To: <1521618694-140757-3-git-send-email-rosen.xu@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hello Rosen, On Wed, Mar 21, 2018 at 1:21 PM, Rosen Xu wrote: > Signed-off-by: Rosen Xu > --- > lib/librte_eal/common/eal_common_bus.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/lib/librte_eal/common/eal_common_bus.c b/lib/librte_eal/common/eal_common_bus.c > index 3e022d5..e3bcebe 100644 > --- a/lib/librte_eal/common/eal_common_bus.c > +++ b/lib/librte_eal/common/eal_common_bus.c > @@ -87,7 +87,7 @@ struct rte_bus_list rte_bus_list = > rte_bus_probe(void) > { > int ret; > - struct rte_bus *bus, *vbus = NULL; > + struct rte_bus *bus, *vbus = NULL, *ifpga_bus = NULL; > > TAILQ_FOREACH(bus, &rte_bus_list, next) { > if (!strcmp(bus->name, "vdev")) { > @@ -95,6 +95,11 @@ struct rte_bus_list rte_bus_list = > continue; > } > > + if (!strcmp(bus->name, "ifpga")) { > + ifpga_bus = bus; > + continue; > + } > + > ret = bus->probe(); > if (ret) > RTE_LOG(ERR, EAL, "Bus (%s) probe failed.\n", > @@ -108,6 +113,13 @@ struct rte_bus_list rte_bus_list = > vbus->name); > } > > + if (ifpga_bus) { > + ret = ifpga_bus->probe(); > + if (ret) > + RTE_LOG(ERR, EAL, "Scan for (%s) bus failed.\n", > + ifpga_bus->name); > + } > + Just like my comment on RFC, I still think this is not the right thing to do. I understand you want a case where IFPGA bus gets probed only after PCI bus is probed. There can be multiple ways. Two of them which I can quickly list without much deliberation: 1. A framework which can 'defer probing' So, a bus can register for defer probe and its check_if_probe_available() function callback is called through rte_bus_probe() If it returns OK, its probe is called, else it is added to a defer list which is called once all first register buses are probed. 2. Modify the priority in RTE_REGISTER_BUS and make it as an argument or a new variant which can take an argument. It is not ok to change this function specifically for a bus is because this method is not scalable. Is there some specific reason you would like to stick to this approach? [...] - Shreyansh