From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9711C4321A for ; Fri, 28 Jun 2019 15:03:40 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 7481420828 for ; Fri, 28 Jun 2019 15:03:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b="K+aI2UNF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7481420828 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=semihalf.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 068141E20; Fri, 28 Jun 2019 17:03:39 +0200 (CEST) Received: from mail-ed1-f65.google.com (mail-ed1-f65.google.com [209.85.208.65]) by dpdk.org (Postfix) with ESMTP id AC2FBDED for ; Fri, 28 Jun 2019 17:03:37 +0200 (CEST) Received: by mail-ed1-f65.google.com with SMTP id p15so11210062eds.8 for ; Fri, 28 Jun 2019 08:03:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=b3P8mksRiR1hO8fdwpiHodYAacu5roGbWH8/vhyCWGA=; b=K+aI2UNF2ZSgE9/Y9m/TPTmgOK4pSgRcnqsS+H+tNpJuUflgOLB74n5tgmibbBoPZm hc5lqTqKosnjGzsFtVb4Bc9tutJRx97EmmPvJNIQdL+HYsju9nGftlWaFD5YBB58s1I6 jubi/pUVjT59Wr8jgyWPZ21PrRjYNhMPTSlr2xeQHI2Lrv1MawPka1blHGuSAmKwBF8L Txbzu+BlzMlGAIvwCcSRDjHk1q+nw+tN46NlguxseDl9CClhpO2usZsuhDl8/fgwgZoA KF4uKkArtsW39o5n7qqCwNZQRHT4eZii0sC+Fz+4tHJvTdl3GeSDoo2V+Vn26eiwBXns BBHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=b3P8mksRiR1hO8fdwpiHodYAacu5roGbWH8/vhyCWGA=; b=lOvuX/z/DXWz5iwoDaLz9q3+DtugHM7czdoaqVbWxEvb2eWktuqotBELBiK9toHfhq PJPOiYsvUm9z+WHOSq8qMEta7TVoiKAEe08/CsDU067eeQccLNlpWCIhYUh1MjsYvWaY jAqeIKzWIHaCYPq7oibQg38P86C2cBkxK21rquW3i6yUghZ7FmwneGs35ArBNYa+sviP xXFNzC+8dxzgi+YjM4xd8UraamfSzvBzmfTrzmyyJQJSpt2OcsZSOURTKWED4/xjXZtf 0b6y/emefQ3zbXaF3ZKU4IN6MwqoLOa9YiU8VhKQn+w/JSA6nFUZz94TWXVvNOfdC2JW 3sHg== X-Gm-Message-State: APjAAAW/Y6Dd3sxzuqjHIeBLJBdxIH0G3hTcAG3ANRG4pcQh4x4Mb7Uu V/EzgEoN9qhP1GOVdH2F7K5Z33LIACJJXz85wqRiVw== X-Google-Smtp-Source: APXvYqwQUEMGcTbvkEWbN0m2su5OKX25P8sO2NG4FTrwlvvd1qFQxbVQmwgMnvDFgYk8KqAzp4h8Cmeli2+7kRr1SkQ= X-Received: by 2002:a05:6402:1557:: with SMTP id p23mr11734193edx.207.1561734217328; Fri, 28 Jun 2019 08:03:37 -0700 (PDT) MIME-Version: 1.0 References: <20190529210139.26766-1-dharton@cisco.com> In-Reply-To: <20190529210139.26766-1-dharton@cisco.com> From: =?UTF-8?Q?Micha=C5=82_Krawczyk?= Date: Fri, 28 Jun 2019 17:03:26 +0200 Message-ID: To: David Harton Cc: dev@dpdk.org, Marcin Wojtas , "Tzalik, Guy" , "Schmeilin, Evgeny" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH] net/ena: Fix admin cq polling for 32-bit apps X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, sorry for the late reply. =C5=9Br., 29 maj 2019 o 23:01 David Harton napisa=C5=82= (a): > > Recent modifications to admin command queue polling logic > did not support 32-bit applications. Updated the driver to > work for 32 or 64 bit applications as well as avoiding > roll-over possibility. > > Fixes: 3adcba9a89 ("net/ena: update HAL to the newer version") > > Signed-off-by: David Harton > --- > drivers/net/ena/base/ena_com.c | 10 +++++++--- > drivers/net/ena/base/ena_plat_dpdk.h | 6 +----- > 2 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_co= m.c > index b688067f7..b96adde3c 100644 > --- a/drivers/net/ena/base/ena_com.c > +++ b/drivers/net/ena/base/ena_com.c > @@ -547,10 +547,13 @@ static int ena_com_wait_and_process_admin_cq_pollin= g(struct ena_comp_ctx *comp_c > struct ena_com_admin= _queue *admin_queue) > { > unsigned long flags =3D 0; > - unsigned long timeout; > + u32 timeout_ms; > int ret; > > - timeout =3D ENA_GET_SYSTEM_TIMEOUT(admin_queue->completion_timeou= t); > + /* Calculate ms granularity timeout from us completion_timeout > + * making sure we retry once if we have at least 1ms > + */ > + timeout_ms =3D (admin_queue->completion_timeout / 1000) + (ENA_PO= LL_MS - 1); > > while (1) { > ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags); > @@ -560,7 +563,7 @@ static int ena_com_wait_and_process_admin_cq_polling(= struct ena_comp_ctx *comp_c > if (comp_ctx->status !=3D ENA_CMD_SUBMITTED) > break; > > - if (ENA_TIME_EXPIRE(timeout)) { > + if (timeout_ms < ENA_POLL_MS) { > ena_trc_err("Wait for completion (polling) timeou= t\n"); > /* ENA didn't have any completion */ > ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags); > @@ -573,6 +576,7 @@ static int ena_com_wait_and_process_admin_cq_polling(= struct ena_comp_ctx *comp_c > } > > ENA_MSLEEP(ENA_POLL_MS); > + timeout_ms -=3D ENA_POLL_MS; This part can be problematic at the very overloaded systems - in that case the ENA_MSLEEP can take a much longer than ENA_POLL_MS and in this situation the time spent in this function can't be determined. That's why we were checking time spent in sleep every ENA_TIME_EXPIRE macro. The issue can be observed especially in the kernel drivers, and ena_com is common file for all ENA drivers.