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* [dpdk-dev] [PATCH 1/2] net/ipn3ke: add new register address
@ 2019-06-03  6:31 Andy Pei
  2019-06-03  6:31 ` [dpdk-dev] [PATCH 2/2] net/ipn3ke: implementation of statistics Andy Pei
  0 siblings, 1 reply; 47+ messages in thread
From: Andy Pei @ 2019-06-03  6:31 UTC (permalink / raw)
  To: dev; +Cc: rosen.xu, tianfei.zhang, andy.pei, dan.wei, jia.hu

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC
register address for statistics.
This patch implemente statistics registers
for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c |  27 +-
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 572 +++++++++++++++++++++----------------
 2 files changed, 354 insertions(+), 245 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..73ece8d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -247,10 +247,20 @@
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
 			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
 			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear all TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear all RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
 		}
 	}
 
@@ -294,10 +304,19 @@
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
 			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear all RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear all TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
 
 			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..0984603 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
 	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR    0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
-
-/*tx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
-
-/*rx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
-
-/*tx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
-
-/*rx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
-
-/*tx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
-
-/*rx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
-
-/*tx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
-
-/*rx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
-
-/*tx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
-
-/*rx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
-
-/*tx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
-
-/*rx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
-
-/*tx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
-
-/*rx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
-
-/*tx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
-
-/*rx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
-
-/*tx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
-
-/*rx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
-
-/*tx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
-
-/*rx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
-
-/*tx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x0164
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
-
-/*rx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x01E4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
-
-/*tx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x0166
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
-
-/*rx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x01E6
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
-
-/*tx_stats_etherStatsPkts256to511Octet*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI  0x0168
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
-
-/*rx_stats_etherStatsPkts256to511Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI  0x01E8
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
-
-/*tx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x016A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
-
-/*rx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x01EA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
-
-/*tx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x016C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
-
-/*rx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x01EC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
-
-/*tx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x016E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
-
-/*rx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x01EE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
-
-/*rx_stats_etherStatsFragments*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
-
-/*rx_stats_etherStatsJabbers*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
-
-/*rx_stats_etherStatsCRCErr*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
-
-/*tx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
-
-/*rx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
-
-/*tx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
-
-/*rx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
-
-/*tx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
-
-/*rx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
-
-/*tx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
-
-/*rx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
+#define IPN3KE_REGISTER_WIDTH                                        32
+
+/*Bits[2:0]: Configuration of TX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *TX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot at
+ *the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP core
+ *clears the parity bit CNTR_TX_STATUS[0]. This bit
+ *(CNTR_TX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the TX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved
+ */
+#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
+#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the TX statistics registers are paused (while
+ *CNTR_TX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *TX statistics counters.
+ *Bits[31:2] are Reserved.
+ */
+#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
+#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
+#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
+#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
+#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
+#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
+#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
+#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
+#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
+#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
+#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
+#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
+#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
+#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
+#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
+#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
+#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
+#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
+#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
+#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
+#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
+#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
+#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
+#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
+
+/*Bits[2:0]: Configuration of RX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *RX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot
+ *at the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP
+ *core clears the parity bit CNTR_RX_STATUS[0]. This bit
+ *(CNTR_RX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the RX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved.
+ */
+#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
+#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the RX statistics registers are paused
+ *(while CNTR_RX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *RX statistics counters.
+ *Bits [31:2] are Reserved
+ */
+#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
+#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
+#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
+#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
+#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
+#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
+#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
+#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
+#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
+#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
+#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
+#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
+#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
+#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
+#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
+#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
+#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
+#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
+#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
+#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
+#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
+#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
+#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
+#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
+
+#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
+
+#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
+#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
+#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
+#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x014A
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x014B
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x01CA
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x01CB
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO                      0x014E
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO                      0x01CE
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI                      0x01CF
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO                     0x0150
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI                     0x0151
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO                     0x01D0
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI                     0x01D1
+#define IPN3KE_10G_TX_STATS_MULTiCAST_FRAME_OK_LO                    0x0152
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI                    0x0153
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO                    0x01D2
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI                    0x01D3
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO                   0x0154
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI                   0x0155
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO                   0x01D4
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI                   0x01D5
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO                    0x0156
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI                    0x0157
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO                    0x01D6
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI                    0x01D7
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO                   0x0158
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI                   0x0159
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO                   0x01D8
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI                   0x01D9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO                    0x015A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI                    0x015B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO                    0x01DA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI                    0x01DB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x015E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x015F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x01DE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x01DF
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x0160
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x0161
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x01E1
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x0162
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x0163
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x01E3
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x0164
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x0165
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x01E5
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x0166
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x0167
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x01E6
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x01E7
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x0168
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x0169
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x01E8
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x01E9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x016A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x016B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x01EA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x01EB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x016C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x016D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x01EC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x01ED
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x016E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x016F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x01EE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x01EF
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO                 0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI                 0x01F1
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO                   0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI                   0x01F3
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO                   0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI                   0x01F5
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x0176
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x0177
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x01F6
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x01F7
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x0178
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x0179
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x01F8
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x01F9
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x017A
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x017B
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x01FA
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x01FB
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x017C
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x017D
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x01FC
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x01FD
 
 static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
 		uint32_t mac_num, uint32_t eth_group_sel)
@@ -945,31 +1004,62 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct ipn3ke_hw *hw,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
 #define IPN3KE_XMAC_TX_CLR_STCS (1 & \
-	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
+	(IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK))
 
 	(*hw->f_mac_write)(hw,
 					IPN3KE_XMAC_TX_CLR_STCS,
-					IPN3KE_MAC_TX_STATS_CLR,
+					IPN3KE_10G_TX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_rx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
 #define IPN3KE_XMAC_RX_CLR_STCS (1 & \
-	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
+	(IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK))
 
 	(*hw->f_mac_write)(hw,
 					IPN3KE_XMAC_RX_CLR_STCS,
-					IPN3KE_MAC_RX_STATS_CLR,
+					IPN3KE_10G_RX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
+static inline void ipn3ke_xmac_tx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_TX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
+
+static inline void ipn3ke_xmac_rx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_RX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
 
 #endif /* _IPN3KE_ETHDEV_H_ */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH 2/2] net/ipn3ke: implementation of statistics
  2019-06-03  6:31 [dpdk-dev] [PATCH 1/2] net/ipn3ke: add new register address Andy Pei
@ 2019-06-03  6:31 ` Andy Pei
  2019-06-11  9:48   ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Andy Pei
  0 siblings, 1 reply; 47+ messages in thread
From: Andy Pei @ 2019-06-03  6:31 UTC (permalink / raw)
  To: dev; +Cc: rosen.xu, tianfei.zhang, andy.pei, dan.wei, jia.hu

This patch implemente statistics read and reset
function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_representor.c | 3339 ++++++++++++++++++++++++++++++-
 1 file changed, 3328 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index f4529f6..6454f71 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include <stdint.h>
+#include <unistd.h>
 
 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -160,10 +161,17 @@
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
 		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
 		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear all TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear all RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
@@ -278,31 +286,3340 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+	uint64_t tx_bytes;               /* gotc */
+	uint64_t tx_multicast;           /* mptc */
+	uint64_t tx_broadcast;           /* bptc */
+	uint64_t tx_unicast;             /* uptc */
+	uint64_t tx_discards;            /* tdpc */
+	uint64_t tx_errors;              /* tepc */
+	uint64_t rx_bytes;               /* gorc */
+	uint64_t rx_multicast;           /* mprc */
+	uint64_t rx_broadcast;           /* bprc */
+	uint64_t rx_unicast;             /* uprc */
+	uint64_t rx_discards;            /* rdpc */
+	uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+	char name[RTE_ETH_XSTATS_NAME_SIZE];
+	unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_multicast)},
+	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_broadcast)},
+	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_unicast)},
+	{"tx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_discards)},
+	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_multicast)},
+	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_broadcast)},
+	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unicast)},
+	{"rx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_discards)},
+	{"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+		sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+	/* eth stats collected by the port */
+	struct ipn3ke_rpst_eth_stats eth;
+
+	/* additional port specific stats */
+	uint64_t tx_dropped_link_down;
+	uint64_t crc_errors;
+	uint64_t illegal_bytes;
+	uint64_t error_bytes;
+	uint64_t mac_local_faults;
+	uint64_t mac_remote_faults;
+	uint64_t rx_length_errors;
+	uint64_t link_xon_rx;
+	uint64_t link_xoff_rx;
+	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t link_xon_tx;
+	uint64_t link_xoff_tx;
+	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t rx_size_64;
+	uint64_t rx_size_65_127;
+	uint64_t rx_size_128_255;
+	uint64_t rx_size_256_511;
+	uint64_t rx_size_512_1023;
+	uint64_t rx_size_1024_1518;
+	uint64_t rx_size_big;
+	uint64_t rx_undersize;
+	uint64_t rx_fragments;
+	uint64_t rx_oversize;
+	uint64_t rx_jabber;
+	uint64_t tx_size_64;
+	uint64_t tx_size_65_127;
+	uint64_t tx_size_128_255;
+	uint64_t tx_size_256_511;
+	uint64_t tx_size_512_1023;
+	uint64_t tx_size_1024_1518;
+	uint64_t tx_size_1519_to_max;
+	uint64_t mac_short_packet_dropped;
+	uint64_t checksum_error;
+	/* flow director stats */
+	uint64_t fd_atr_match;
+	uint64_t fd_sb_match;
+	uint64_t fd_atr_tunnel_match;
+	uint32_t fd_atr_status;
+	uint32_t fd_sb_status;
+	/* EEE LPI */
+	uint32_t tx_lpi_status;
+	uint32_t rx_lpi_status;
+	uint64_t tx_lpi_count;
+	uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+	{"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+						tx_dropped_link_down)},
+	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+						crc_errors)},
+	{"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+						illegal_bytes)},
+	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						error_bytes)},
+	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_local_faults)},
+	{"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_remote_faults)},
+	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_length_errors)},
+	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_tx)},
+	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_rx)},
+	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_tx)},
+	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_rx)},
+	{"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_64)},
+	{"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_65_127)},
+	{"rx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_128_255)},
+	{"rx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_256_511)},
+	{"rx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_512_1023)},
+	{"rx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_1024_1518)},
+	{"rx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_big)},
+	{"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_undersize)},
+	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_oversize)},
+	{"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       mac_short_packet_dropped)},
+	{"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_fragments)},
+	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_jabber)},
+	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_size_64)},
+	{"tx_size_65_to_127_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_65_127)},
+	{"tx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_128_255)},
+	{"tx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_256_511)},
+	{"tx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_512_1023)},
+	{"tx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1024_1518)},
+	{"tx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1519_to_max)},
+	{"rx_flow_director_atr_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_atr_match)},
+	{"rx_flow_director_sb_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_sb_match)},
+	{"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_status)},
+	{"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_status)},
+	{"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_count)},
+	{"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_count)},
+};
+
+#define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
+		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_rxq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_rx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_rx)},
+};
+
+#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_txq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_tx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_tx)},
+	{"xon_to_xoff_packets",       offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_2_xoff)},
+};
+
+#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
+
+static uint32_t
+ipn3ke_rpst_xstats_calc_num(void)
+{
+	return IPN3KE_RPST_ETH_XSTATS_CNT
+		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
+		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT)
+		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT);
+}
+
 static int
-ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
-	__rte_unused struct rte_eth_stats *stats)
+ipn3ke_read_25G_NICside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		1);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		1);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		1);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		1);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		1);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of 64-byte transmitted frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_64B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_64B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 += statistics;
+
+	/* Number of transmitted frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_65_127B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_65_127B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 += statistics;
+
+	/* Number of transmitted frames between 128 and 255 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_128_255B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_128_255B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 += statistics;
+
+	/* Number of transmitted frames between 256 and 511 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_256_511B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_256_511B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 += statistics;
+
+	/* Number of transmitted frames between 512 and 1023 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_512_1023B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_512_1023B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 += statistics;
+
+	/* Number of transmitted frames between 1024 and 1518 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 += statistics;
+
+	/*Number of transmitted frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max += statistics;
+
+	/*Number of oversized frames (frames with more bytes than the
+	 *number specified in the MAX_TX_SIZE_CONFIG register)
+	 *transmitted
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/* Number of valid pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted runt packets. The IP core does not
+	 *transmit frames of length less than nine bytes.
+	 *The IP core pads frames of length nine bytes to 64 bytes to
+	 *extend them to 64 bytes. Therefore, this counter does not
+	 *increment in normal operating conditions.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_RUNT_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_RUNT_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the TX MAC (bit[1]
+	 *of the TX_MAC_CONTROL register at offset 0x40A has
+	 *the value of 1), the IP core counts the VLAN header bytes
+	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
+	 *as payload bytes. This register is compliant with
+	 *the requirements for aOctetsTransmittedOK in section
+	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_bytes += statistics;
+
+	/*Number of transmitted bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors. This register is
+	 *compliant with the requirements for ifOutOctets in RFC3635
+	 *(Managed Objects for Ethernet-like Interface Types)
+	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
+	 *Management Information Base (RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/* Number of received oversized frames reporting a CRC error */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_JABBERS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/*Number of received packets with FCS errors.
+	 *This register maintains a count of the number of pulses
+	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FCS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FCS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of received frames with a frame of length at least 64
+	 *with CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_CRCERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_CRCERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored multicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored broadcast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored unicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored pause frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of 64-byte received frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_64B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_64B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 += statistics;
+
+	/*Number of received frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_65_127B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_65_127B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 += statistics;
+
+	/*Number of received frames between 128 and 255 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_128_255B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_128_255B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 += statistics;
+
+	/*Number of received frames between 256 and 511 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_256_511B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_256_511B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 += statistics;
+
+	/*Number of received frames between 512 and 1023 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_512_1023B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_512_1023B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 += statistics;
+
+	/*Number of received frames between 1024 and 1518 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 += statistics;
+
+	/*Number of received frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big += statistics;
+
+	/*Number of oversized frames (frames with more bytes
+	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
+	 *received
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_jabber += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of received pause frames, with or without error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received runt packets. A runt is a packet of size
+	 *less than 64 bytes but greater than eight bytes.
+	 *If a packet is eight bytes or smaller, it is considered
+	 *a decoding error and not a runt frame, and the IP core
+	 *does not flag it nor count it as a runt.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_RUNT_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_RUNT_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
+	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
+	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
+	 *8 bytes for stacked VLAN) as payload bytes.
+	 *This register is compliant with the requirements for
+	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
+	 *802.3-2008
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_bytes += statistics;
+
+	/*Number of received bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors.
+	 *This register is compliant with the requirements for
+	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
+	 *Interface Types) and RX etherStatsOctets in RFC2819
+	 *(Remote Network Monitoring Management Information Base
+	 *(RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*resume Tx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	/*resume Rx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,
-	__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned int n)
+ipn3ke_read_10G_NICside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats,
+struct rte_eth_stats *stats)
 {
+	uint32_t statistics_lo = 0;
+	uint32_t statistics_hi = 0;
+	uint64_t statistics = 0;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+	memset(stats, 0, sizeof(*stats));
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully transmitted, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->opackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully received, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ipackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->oerrors = statistics;
+	hw_stats->eth.tx_errors = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ierrors = statistics;
+	hw_stats->eth.rx_discards = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of RX frames with CRC error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->crc_errors = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *transmitted.
+	 *If the tx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the TX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->obytes = statistics;
+	hw_stats->eth.tx_bytes = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *received.
+	 *If the rx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the RX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ibytes = statistics;
+	hw_stats->eth.rx_bytes = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTiCAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *multicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number
+	 *of multicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of broadcast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *broadcast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets transmitted.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets received.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized TX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized RX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_undersize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_oversize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte TX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte RX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field but
+	 *excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good,
+	 *errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big = statistics;
+
+	/*36-bit statistics counter that collects the total number of
+	 *RX frames with length less than 64 bytes and CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *oversized RX frames with CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames with CRC error,
+	 *whose length is between 64 and the maximum frame length
+	 *specified in the register.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
+{
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
+		return;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
+		return;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
+		return;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_rpst_25G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_NICside_RX_stats_reset(hw, port_id);
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
+		ipn3ke_rpst_10G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_NICside_RX_stats_reset(hw, port_id);
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
-		__rte_unused struct rte_eth_xstat_name *xstats_names,
-		__rte_unused unsigned int limit)
+ipn3ke_rpst_stats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
 {
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	int i = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+	if (!stats) {
+		IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_NICside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+
+		stats->ipackets  = hw_stats.rx_size_64
+					+ hw_stats.rx_size_65_127
+					+ hw_stats.rx_size_128_255
+					+ hw_stats.rx_size_256_511
+					+ hw_stats.rx_size_512_1023
+					+ hw_stats.rx_size_1024_1518
+					+ hw_stats.rx_size_big
+					+ hw_stats.rx_undersize
+					+ hw_stats.rx_fragments
+					+ hw_stats.rx_oversize
+					+ hw_stats.rx_jabber;
+		stats->opackets  = hw_stats.tx_size_64
+					+ hw_stats.tx_size_65_127
+					+ hw_stats.tx_size_128_255
+					+ hw_stats.tx_size_256_511
+					+ hw_stats.tx_size_512_1023
+					+ hw_stats.tx_size_1024_1518
+					+ hw_stats.tx_size_1519_to_max;
+		stats->ibytes    = hw_stats.eth.rx_bytes;
+		stats->obytes    = hw_stats.eth.tx_bytes;
+		stats->imissed   = 0;
+		stats->ierrors   = hw_stats.eth.rx_discards
+					+ hw_stats.eth.rx_unknown_protocol;
+		stats->oerrors   = hw_stats.eth.tx_discards
+					+ hw_stats.eth.tx_errors;
+		stats->rx_nombuf = 0;
+		for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
+			stats->q_ipackets[i] = 0;
+			stats->q_opackets[i] = 0;
+			stats->q_ibytes[i] = 0;
+			stats->q_obytes[i] = 0;
+			stats->q_errors[i] = 0;
+		}
+	} else {
+		ipn3ke_read_10G_NICside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							stats);
+	}
+
 	return 0;
 }
 
-static void
-ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)
+static int
+ipn3ke_rpst_xstats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
 {
+	uint16_t port_id = 0;
+	char *ch = NULL;
+	int cnt = 0;
+	unsigned int i, count, prio;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+	struct rte_eth_stats stats;
+
+	if (!xstats)
+		return 0;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	count = ipn3ke_rpst_xstats_calc_num();
+	if (n < count)
+		return count;
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_NICside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+	} else {
+		ipn3ke_read_10G_NICside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							&stats);
+	}
+
+	count = 0;
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
+			+ ipn3ke_rpst_stats_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
+			ipn3ke_rpst_hw_port_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_rxq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_txq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	return count;
+}
+
+static int
+ipn3ke_rpst_xstats_get_names
+(__rte_unused struct rte_eth_dev *dev,
+struct rte_eth_xstat_name *xstats_names,
+__rte_unused unsigned int limit)
+{
+	unsigned int count = 0;
+	unsigned int i, prio;
+
+	if (!xstats_names)
+		return ipn3ke_rpst_xstats_calc_num();
+
+	/* Note: limit checked in rte_eth_xstats_names() */
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_stats_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_hw_port_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "rx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_rxq_prio_strings[i].name);
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "tx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_txq_prio_strings[i].name);
+			count++;
+		}
+	}
+	return count;
 }
 
 static void
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address
  2019-06-03  6:31 ` [dpdk-dev] [PATCH 2/2] net/ipn3ke: implementation of statistics Andy Pei
@ 2019-06-11  9:48   ` Andy Pei
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
                       ` (3 more replies)
  0 siblings, 4 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-11  9:48 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC register address for statistics.
This patch implemente statistics registers for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 572 +++++++++++++++++++++----------------
 1 file changed, 331 insertions(+), 241 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..5c84eff 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
 	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR    0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
-
-/*tx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
-
-/*rx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
-
-/*tx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
-
-/*rx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
-
-/*tx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
-
-/*rx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
-
-/*tx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
-
-/*rx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
-
-/*tx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
-
-/*rx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
-
-/*tx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
-
-/*rx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
-
-/*tx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
-
-/*rx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
-
-/*tx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
-
-/*rx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
-
-/*tx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
-
-/*rx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
-
-/*tx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
-
-/*rx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
-
-/*tx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x0164
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
-
-/*rx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x01E4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
-
-/*tx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x0166
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
-
-/*rx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x01E6
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
-
-/*tx_stats_etherStatsPkts256to511Octet*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI  0x0168
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
-
-/*rx_stats_etherStatsPkts256to511Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI  0x01E8
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
-
-/*tx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x016A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
-
-/*rx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x01EA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
-
-/*tx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x016C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
-
-/*rx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x01EC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
-
-/*tx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x016E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
-
-/*rx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x01EE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
-
-/*rx_stats_etherStatsFragments*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
-
-/*rx_stats_etherStatsJabbers*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
-
-/*rx_stats_etherStatsCRCErr*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
-
-/*tx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
-
-/*rx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
-
-/*tx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
-
-/*rx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
-
-/*tx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
-
-/*rx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
-
-/*tx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
-
-/*rx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
+#define IPN3KE_REGISTER_WIDTH                                        32
+
+/*Bits[2:0]: Configuration of TX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *TX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot at
+ *the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP core
+ *clears the parity bit CNTR_TX_STATUS[0]. This bit
+ *(CNTR_TX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the TX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved
+ */
+#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
+#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the TX statistics registers are paused (while
+ *CNTR_TX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *TX statistics counters.
+ *Bits[31:2] are Reserved.
+ */
+#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
+#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
+#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
+#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
+#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
+#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
+#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
+#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
+#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
+#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
+#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
+#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
+#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
+#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
+#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
+#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
+#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
+#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
+#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
+#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
+#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
+#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
+#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
+#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
+
+/*Bits[2:0]: Configuration of RX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *RX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot
+ *at the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP
+ *core clears the parity bit CNTR_RX_STATUS[0]. This bit
+ *(CNTR_RX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the RX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved.
+ */
+#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
+#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the RX statistics registers are paused
+ *(while CNTR_RX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *RX statistics counters.
+ *Bits [31:2] are Reserved
+ */
+#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
+#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
+#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
+#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
+#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
+#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
+#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
+#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
+#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
+#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
+#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
+#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
+#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
+#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
+#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
+#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
+#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
+#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
+#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
+#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
+#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
+#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
+#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
+#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
+
+#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
+
+#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
+#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
+#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
+#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x014A
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x014B
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x01CA
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x01CB
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO                      0x014E
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO                      0x01CE
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI                      0x01CF
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO                     0x0150
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI                     0x0151
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO                     0x01D0
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI                     0x01D1
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO                    0x0152
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI                    0x0153
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO                    0x01D2
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI                    0x01D3
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO                   0x0154
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI                   0x0155
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO                   0x01D4
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI                   0x01D5
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO                    0x0156
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI                    0x0157
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO                    0x01D6
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI                    0x01D7
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO                   0x0158
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI                   0x0159
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO                   0x01D8
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI                   0x01D9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO                    0x015A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI                    0x015B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO                    0x01DA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI                    0x01DB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x015E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x015F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x01DE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x01DF
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x0160
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x0161
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x01E1
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x0162
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x0163
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x01E3
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x0164
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x0165
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x01E5
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x0166
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x0167
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x01E6
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x01E7
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x0168
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x0169
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x01E8
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x01E9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x016A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x016B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x01EA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x01EB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x016C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x016D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x01EC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x01ED
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x016E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x016F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x01EE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x01EF
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO                 0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI                 0x01F1
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO                   0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI                   0x01F3
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO                   0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI                   0x01F5
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x0176
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x0177
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x01F6
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x01F7
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x0178
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x0179
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x01F8
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x01F9
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x017A
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x017B
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x01FA
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x01FB
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x017C
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x017D
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x01FC
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x01FD
 
 static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
 		uint32_t mac_num, uint32_t eth_group_sel)
@@ -945,31 +1004,62 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct ipn3ke_hw *hw,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
 #define IPN3KE_XMAC_TX_CLR_STCS (1 & \
-	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
+	(IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK))
 
 	(*hw->f_mac_write)(hw,
 					IPN3KE_XMAC_TX_CLR_STCS,
-					IPN3KE_MAC_TX_STATS_CLR,
+					IPN3KE_10G_TX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_rx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
 #define IPN3KE_XMAC_RX_CLR_STCS (1 & \
-	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
+	(IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK))
 
 	(*hw->f_mac_write)(hw,
 					IPN3KE_XMAC_RX_CLR_STCS,
-					IPN3KE_MAC_RX_STATS_CLR,
+					IPN3KE_10G_RX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
+static inline void ipn3ke_xmac_tx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_TX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
+
+static inline void ipn3ke_xmac_rx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_RX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
 
 #endif /* _IPN3KE_ETHDEV_H_ */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask
  2019-06-11  9:48   ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Andy Pei
@ 2019-06-11  9:48     ` Andy Pei
  2019-06-12  1:17       ` Xu, Rosen
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
                       ` (2 subsequent siblings)
  3 siblings, 1 reply; 47+ messages in thread
From: Andy Pei @ 2019-06-11  9:48 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

original code is compatible with older device,
whose mac register address is no more than 10 bits.
Now we have mac register address longer than 10 bits,
so we just delete the mask here.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..8d3084d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -48,7 +48,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = RCMD | target_addr << 32;
@@ -86,7 +85,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = WCMD | target_addr << 32 | wr_data;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev
  2019-06-11  9:48   ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
@ 2019-06-11  9:48     ` Andy Pei
  2019-06-12  1:17       ` Xu, Rosen
  2019-06-19  8:49       ` [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2019-06-12  1:17     ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Xu, Rosen
  3 siblings, 2 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-11  9:48 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

clear line side and NIC side statistics registers
when HW init and uinit, and when dev start.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59 ++++++++++++++++++++++++++++-----
 drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
 2 files changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 8d3084d..27ebfb5 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -244,11 +244,33 @@
 			/* Enable the RX path */
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 
@@ -291,11 +313,32 @@
 			/* Disable the RX path */
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index f4529f6..b166b8f 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -159,11 +159,30 @@
 		/* Enable the RX path */
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
-		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
-		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics
  2019-06-11  9:48   ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
@ 2019-06-11  9:48     ` Andy Pei
  2019-06-12  1:17       ` Xu, Rosen
  2019-06-18 11:59       ` Ferruh Yigit
  2019-06-12  1:17     ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Xu, Rosen
  3 siblings, 2 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-11  9:48 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

This patch implemente statistics read and reset
function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_representor.c | 6118 ++++++++++++++++++++++++++++++-
 1 file changed, 6110 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index b166b8f..5602ae2 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include <stdint.h>
+#include <unistd.h>
 
 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -297,31 +298,6132 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+	uint64_t tx_bytes;               /* gotc */
+	uint64_t tx_multicast;           /* mptc */
+	uint64_t tx_broadcast;           /* bptc */
+	uint64_t tx_unicast;             /* uptc */
+	uint64_t tx_discards;            /* tdpc */
+	uint64_t tx_errors;              /* tepc */
+	uint64_t rx_bytes;               /* gorc */
+	uint64_t rx_multicast;           /* mprc */
+	uint64_t rx_broadcast;           /* bprc */
+	uint64_t rx_unicast;             /* uprc */
+	uint64_t rx_discards;            /* rdpc */
+	uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+	char name[RTE_ETH_XSTATS_NAME_SIZE];
+	unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_multicast)},
+	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_broadcast)},
+	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_unicast)},
+	{"tx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_discards)},
+	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_multicast)},
+	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_broadcast)},
+	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unicast)},
+	{"rx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_discards)},
+	{"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+		sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+	/* eth stats collected by the port */
+	struct ipn3ke_rpst_eth_stats eth;
+
+	/* additional port specific stats */
+	uint64_t tx_dropped_link_down;
+	uint64_t crc_errors;
+	uint64_t illegal_bytes;
+	uint64_t error_bytes;
+	uint64_t mac_local_faults;
+	uint64_t mac_remote_faults;
+	uint64_t rx_length_errors;
+	uint64_t link_xon_rx;
+	uint64_t link_xoff_rx;
+	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t link_xon_tx;
+	uint64_t link_xoff_tx;
+	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t rx_size_64;
+	uint64_t rx_size_65_127;
+	uint64_t rx_size_128_255;
+	uint64_t rx_size_256_511;
+	uint64_t rx_size_512_1023;
+	uint64_t rx_size_1024_1518;
+	uint64_t rx_size_big;
+	uint64_t rx_undersize;
+	uint64_t rx_fragments;
+	uint64_t rx_oversize;
+	uint64_t rx_jabber;
+	uint64_t tx_size_64;
+	uint64_t tx_size_65_127;
+	uint64_t tx_size_128_255;
+	uint64_t tx_size_256_511;
+	uint64_t tx_size_512_1023;
+	uint64_t tx_size_1024_1518;
+	uint64_t tx_size_1519_to_max;
+	uint64_t mac_short_packet_dropped;
+	uint64_t checksum_error;
+	/* flow director stats */
+	uint64_t fd_atr_match;
+	uint64_t fd_sb_match;
+	uint64_t fd_atr_tunnel_match;
+	uint32_t fd_atr_status;
+	uint32_t fd_sb_status;
+	/* EEE LPI */
+	uint32_t tx_lpi_status;
+	uint32_t rx_lpi_status;
+	uint64_t tx_lpi_count;
+	uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+	{"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+						tx_dropped_link_down)},
+	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+						crc_errors)},
+	{"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+						illegal_bytes)},
+	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						error_bytes)},
+	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_local_faults)},
+	{"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_remote_faults)},
+	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_length_errors)},
+	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_tx)},
+	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_rx)},
+	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_tx)},
+	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_rx)},
+	{"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_64)},
+	{"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_65_127)},
+	{"rx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_128_255)},
+	{"rx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_256_511)},
+	{"rx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_512_1023)},
+	{"rx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_1024_1518)},
+	{"rx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_big)},
+	{"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_undersize)},
+	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_oversize)},
+	{"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       mac_short_packet_dropped)},
+	{"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_fragments)},
+	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_jabber)},
+	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_size_64)},
+	{"tx_size_65_to_127_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_65_127)},
+	{"tx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_128_255)},
+	{"tx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_256_511)},
+	{"tx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_512_1023)},
+	{"tx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1024_1518)},
+	{"tx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1519_to_max)},
+	{"rx_flow_director_atr_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_atr_match)},
+	{"rx_flow_director_sb_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_sb_match)},
+	{"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_status)},
+	{"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_status)},
+	{"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_count)},
+	{"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_count)},
+};
+
+#define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
+		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_rxq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_rx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_rx)},
+};
+
+#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_txq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_tx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_tx)},
+	{"xon_to_xoff_packets",       offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_2_xoff)},
+};
+
+#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
+
+static uint32_t
+ipn3ke_rpst_xstats_calc_num(void)
+{
+	return IPN3KE_RPST_ETH_XSTATS_CNT
+		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
+		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT)
+		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT);
+}
+
+#if 0
+
 static int
-ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
-	__rte_unused struct rte_eth_stats *stats)
+ipn3ke_read_25G_NICside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		1);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		1);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		1);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		1);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		1);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of 64-byte transmitted frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_64B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_64B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 += statistics;
+
+	/* Number of transmitted frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_65_127B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_65_127B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 += statistics;
+
+	/* Number of transmitted frames between 128 and 255 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_128_255B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_128_255B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 += statistics;
+
+	/* Number of transmitted frames between 256 and 511 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_256_511B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_256_511B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 += statistics;
+
+	/* Number of transmitted frames between 512 and 1023 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_512_1023B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_512_1023B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 += statistics;
+
+	/* Number of transmitted frames between 1024 and 1518 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 += statistics;
+
+	/*Number of transmitted frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max += statistics;
+
+	/*Number of oversized frames (frames with more bytes than the
+	 *number specified in the MAX_TX_SIZE_CONFIG register)
+	 *transmitted
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/* Number of valid pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted runt packets. The IP core does not
+	 *transmit frames of length less than nine bytes.
+	 *The IP core pads frames of length nine bytes to 64 bytes to
+	 *extend them to 64 bytes. Therefore, this counter does not
+	 *increment in normal operating conditions.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_RUNT_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_RUNT_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the TX MAC (bit[1]
+	 *of the TX_MAC_CONTROL register at offset 0x40A has
+	 *the value of 1), the IP core counts the VLAN header bytes
+	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
+	 *as payload bytes. This register is compliant with
+	 *the requirements for aOctetsTransmittedOK in section
+	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_bytes += statistics;
+
+	/*Number of transmitted bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors. This register is
+	 *compliant with the requirements for ifOutOctets in RFC3635
+	 *(Managed Objects for Ethernet-like Interface Types)
+	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
+	 *Management Information Base (RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/* Number of received oversized frames reporting a CRC error */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_JABBERS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/*Number of received packets with FCS errors.
+	 *This register maintains a count of the number of pulses
+	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FCS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FCS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of received frames with a frame of length at least 64
+	 *with CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_CRCERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_CRCERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored multicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored broadcast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored unicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored pause frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of 64-byte received frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_64B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_64B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 += statistics;
+
+	/*Number of received frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_65_127B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_65_127B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 += statistics;
+
+	/*Number of received frames between 128 and 255 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_128_255B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_128_255B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 += statistics;
+
+	/*Number of received frames between 256 and 511 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_256_511B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_256_511B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 += statistics;
+
+	/*Number of received frames between 512 and 1023 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_512_1023B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_512_1023B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 += statistics;
+
+	/*Number of received frames between 1024 and 1518 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 += statistics;
+
+	/*Number of received frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big += statistics;
+
+	/*Number of oversized frames (frames with more bytes
+	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
+	 *received
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_jabber += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of received pause frames, with or without error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received runt packets. A runt is a packet of size
+	 *less than 64 bytes but greater than eight bytes.
+	 *If a packet is eight bytes or smaller, it is considered
+	 *a decoding error and not a runt frame, and the IP core
+	 *does not flag it nor count it as a runt.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_RUNT_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_RUNT_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
+	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
+	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
+	 *8 bytes for stacked VLAN) as payload bytes.
+	 *This register is compliant with the requirements for
+	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
+	 *802.3-2008
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_bytes += statistics;
+
+	/*Number of received bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors.
+	 *This register is compliant with the requirements for
+	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
+	 *Interface Types) and RX etherStatsOctets in RFC2819
+	 *(Remote Network Monitoring Management Information Base
+	 *(RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*resume Tx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	/*resume Rx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
 	return 0;
 }
 
+#endif
+
+static void
+ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+#if 0
+
 static int
-ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,
-	__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned int n)
+ipn3ke_read_10G_NICside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats,
+struct rte_eth_stats *stats)
 {
+	uint32_t statistics_lo = 0;
+	uint32_t statistics_hi = 0;
+	uint64_t statistics = 0;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+	memset(stats, 0, sizeof(*stats));
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully transmitted, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->opackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully received, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ipackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->oerrors = statistics;
+	hw_stats->eth.tx_errors = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ierrors = statistics;
+	hw_stats->eth.rx_discards = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of RX frames with CRC error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->crc_errors = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *transmitted.
+	 *If the tx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the TX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->obytes = statistics;
+	hw_stats->eth.tx_bytes = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *received.
+	 *If the rx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the RX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ibytes = statistics;
+	hw_stats->eth.rx_bytes = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *multicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number
+	 *of multicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of broadcast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *broadcast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets transmitted.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets received.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			1);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized TX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized RX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_undersize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_oversize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte TX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte RX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field but
+	 *excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good,
+	 *errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big = statistics;
+
+	/*36-bit statistics counter that collects the total number of
+	 *RX frames with length less than 64 bytes and CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *oversized RX frames with CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames with CRC error,
+	 *whose length is between 64 and the maximum frame length
+	 *specified in the register.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			1);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
 	return 0;
 }
 
+#endif
+
+static void
+ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+}
+
 static int
-ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
-		__rte_unused struct rte_eth_xstat_name *xstats_names,
-		__rte_unused unsigned int limit)
+ipn3ke_read_25G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		0);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of 64-byte transmitted frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 += statistics;
+
+	/* Number of transmitted frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 += statistics;
+
+	/* Number of transmitted frames between 128 and 255 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 += statistics;
+
+	/* Number of transmitted frames between 256 and 511 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 += statistics;
+
+	/* Number of transmitted frames between 512 and 1023 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 += statistics;
+
+	/* Number of transmitted frames between 1024 and 1518 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 += statistics;
+
+	/*Number of transmitted frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max += statistics;
+
+	/*Number of oversized frames (frames with more bytes than the
+	 *number specified in the MAX_TX_SIZE_CONFIG register)
+	 *transmitted
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/* Number of valid pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted runt packets. The IP core does not
+	 *transmit frames of length less than nine bytes.
+	 *The IP core pads frames of length nine bytes to 64 bytes to
+	 *extend them to 64 bytes. Therefore, this counter does not
+	 *increment in normal operating conditions.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the TX MAC (bit[1]
+	 *of the TX_MAC_CONTROL register at offset 0x40A has
+	 *the value of 1), the IP core counts the VLAN header bytes
+	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
+	 *as payload bytes. This register is compliant with
+	 *the requirements for aOctetsTransmittedOK in section
+	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_bytes += statistics;
+
+	/*Number of transmitted bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors. This register is
+	 *compliant with the requirements for ifOutOctets in RFC3635
+	 *(Managed Objects for Ethernet-like Interface Types)
+	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
+	 *Management Information Base (RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/* Number of received oversized frames reporting a CRC error */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/*Number of received packets with FCS errors.
+	 *This register maintains a count of the number of pulses
+	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of received frames with a frame of length at least 64
+	 *with CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored multicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored broadcast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored unicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored pause frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of 64-byte received frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 += statistics;
+
+	/*Number of received frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 += statistics;
+
+	/*Number of received frames between 128 and 255 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 += statistics;
+
+	/*Number of received frames between 256 and 511 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 += statistics;
+
+	/*Number of received frames between 512 and 1023 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 += statistics;
+
+	/*Number of received frames between 1024 and 1518 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 += statistics;
+
+	/*Number of received frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big += statistics;
+
+	/*Number of oversized frames (frames with more bytes
+	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
+	 *received
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_jabber += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of received pause frames, with or without error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received runt packets. A runt is a packet of size
+	 *less than 64 bytes but greater than eight bytes.
+	 *If a packet is eight bytes or smaller, it is considered
+	 *a decoding error and not a runt frame, and the IP core
+	 *does not flag it nor count it as a runt.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
+	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
+	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
+	 *8 bytes for stacked VLAN) as payload bytes.
+	 *This register is compliant with the requirements for
+	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
+	 *802.3-2008
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_bytes += statistics;
+
+	/*Number of received bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors.
+	 *This register is compliant with the requirements for
+	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
+	 *Interface Types) and RX etherStatsOctets in RFC2819
+	 *(Remote Network Monitoring Management Information Base
+	 *(RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*resume Tx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	/*resume Rx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	return 0;
+}
+
+static void
+ipn3ke_rpst_25G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static int
+ipn3ke_read_10G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats,
+struct rte_eth_stats *stats)
+{
+	uint32_t statistics_lo = 0;
+	uint32_t statistics_hi = 0;
+	uint64_t statistics = 0;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+	memset(stats, 0, sizeof(*stats));
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully transmitted, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->opackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully received, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ipackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->oerrors = statistics;
+	hw_stats->eth.tx_errors = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ierrors = statistics;
+	hw_stats->eth.rx_discards = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of RX frames with CRC error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->crc_errors = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *transmitted.
+	 *If the tx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the TX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->obytes = statistics;
+	hw_stats->eth.tx_bytes = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *received.
+	 *If the rx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the RX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ibytes = statistics;
+	hw_stats->eth.rx_bytes = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *multicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number
+	 *of multicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of broadcast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *broadcast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets transmitted.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets received.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized TX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized RX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_undersize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_oversize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte TX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte RX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field but
+	 *excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good,
+	 *errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big = statistics;
+
+	/*36-bit statistics counter that collects the total number of
+	 *RX frames with length less than 64 bytes and CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *oversized RX frames with CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames with CRC error,
+	 *whose length is between 64 and the maximum frame length
+	 *specified in the register.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
 	return 0;
 }
 
 static void
-ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)
+ipn3ke_rpst_10G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_10G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
+{
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
+		return;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
+		return;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
+		return;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_rpst_25G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_RX_stats_reset(hw, port_id);
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
+		ipn3ke_rpst_10G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_RX_stats_reset(hw, port_id);
+	}
+}
+
+static int
+ipn3ke_rpst_stats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
 {
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	int i = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+	if (!stats) {
+		IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+
+		stats->ipackets  = hw_stats.rx_size_64
+					+ hw_stats.rx_size_65_127
+					+ hw_stats.rx_size_128_255
+					+ hw_stats.rx_size_256_511
+					+ hw_stats.rx_size_512_1023
+					+ hw_stats.rx_size_1024_1518
+					+ hw_stats.rx_size_big
+					+ hw_stats.rx_undersize
+					+ hw_stats.rx_fragments
+					+ hw_stats.rx_oversize
+					+ hw_stats.rx_jabber;
+		stats->opackets  = hw_stats.tx_size_64
+					+ hw_stats.tx_size_65_127
+					+ hw_stats.tx_size_128_255
+					+ hw_stats.tx_size_256_511
+					+ hw_stats.tx_size_512_1023
+					+ hw_stats.tx_size_1024_1518
+					+ hw_stats.tx_size_1519_to_max;
+		stats->ibytes    = hw_stats.eth.rx_bytes;
+		stats->obytes    = hw_stats.eth.tx_bytes;
+		stats->imissed   = 0;
+		stats->ierrors   = hw_stats.eth.rx_discards
+					+ hw_stats.eth.rx_unknown_protocol;
+		stats->oerrors   = hw_stats.eth.tx_discards
+					+ hw_stats.eth.tx_errors;
+		stats->rx_nombuf = 0;
+		for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
+			stats->q_ipackets[i] = 0;
+			stats->q_opackets[i] = 0;
+			stats->q_ibytes[i] = 0;
+			stats->q_obytes[i] = 0;
+			stats->q_errors[i] = 0;
+		}
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							stats);
+	}
+
+	return 0;
+}
+
+static int
+ipn3ke_rpst_xstats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
+{
+	uint16_t port_id = 0;
+	char *ch = NULL;
+	int cnt = 0;
+	unsigned int i, count, prio;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+	struct rte_eth_stats stats;
+
+	if (!xstats)
+		return 0;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	count = ipn3ke_rpst_xstats_calc_num();
+	if (n < count)
+		return count;
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							&stats);
+	}
+
+	count = 0;
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
+			+ ipn3ke_rpst_stats_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
+			ipn3ke_rpst_hw_port_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_rxq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_txq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	return count;
+}
+
+static int
+ipn3ke_rpst_xstats_get_names
+(__rte_unused struct rte_eth_dev *dev,
+struct rte_eth_xstat_name *xstats_names,
+__rte_unused unsigned int limit)
+{
+	unsigned int count = 0;
+	unsigned int i, prio;
+
+	if (!xstats_names)
+		return ipn3ke_rpst_xstats_calc_num();
+
+	/* Note: limit checked in rte_eth_xstats_names() */
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_stats_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_hw_port_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "rx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_rxq_prio_strings[i].name);
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "tx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_txq_prio_strings[i].name);
+			count++;
+		}
+	}
+	return count;
 }
 
 static void
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address
  2019-06-11  9:48   ` [dpdk-dev] [PATCH v2 1/4] net/ipn3ke: add new register address Andy Pei
                       ` (2 preceding siblings ...)
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics Andy Pei
@ 2019-06-12  1:17     ` Xu, Rosen
  3 siblings, 0 replies; 47+ messages in thread
From: Xu, Rosen @ 2019-06-12  1:17 UTC (permalink / raw)
  To: Pei, Andy, dev



> -----Original Message-----
> From: Pei, Andy
> Sent: Tuesday, June 11, 2019 17:49
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Xu, Rosen <rosen.xu@intel.com>
> Subject: [PATCH v2 1/4] net/ipn3ke: add new register address
> 
> ipn3ke can work on 10G mode and 25G mode.
> 10G mode and 25G mode has different MAC register address for statistics.
> This patch implemente statistics registers for 10G mode and 25G mode.
> 
> Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
> Cc: rosen.xu@intel.com
> 
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_ethdev.h | 572 +++++++++++++++++++++-----------
> -----
>  1 file changed, 331 insertions(+), 241 deletions(-)
> 
> diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h
> b/drivers/net/ipn3ke/ipn3ke_ethdev.h
> index af2da05..5c84eff 100644
> --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
> +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
> @@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct
> ipn3ke_hw *hw,  #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
>  	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
> 
> -#define IPN3KE_MAC_TX_STATS_CLR    0x0140
> -#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
> -#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
> -	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
> -
> -#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
> -#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
> -#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
> -	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
> -
> -/*tx_stats_framesOK*/
> -#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142 -#define
> IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
> -
> -/*rx_stats_framesOK*/
> -#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2 -#define
> IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
> -
> -/*tx_stats_framesErr*/
> -#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144 -#define
> IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
> -
> -/*rx_stats_framesErr*/
> -#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4 -#define
> IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
> -
> -/*rx_stats_framesCRCErr*/
> -#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6 -#define
> IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
> -
> -/*tx_stats_octetsOK 64b*/
> -#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148 -#define
> IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
> -
> -/*rx_stats_octetsOK 64b*/
> -#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8 -#define
> IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
> -
> -/*tx_stats_pauseMACCtrl_Frames*/
> -#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A -
> #define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
> -
> -/*rx_stats_pauseMACCtrl_Frames*/
> -#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA -
> #define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
> -
> -/*tx_stats_ifErrors*/
> -#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C -#define
> IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
> -
> -/*rx_stats_ifErrors*/
> -#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC -#define
> IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
> -
> -/*tx_stats_unicast_FramesOK*/
> -#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E -#define
> IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
> -
> -/*rx_stats_unicast_FramesOK*/
> -#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE -#define
> IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
> -
> -/*tx_stats_unicast_FramesErr*/
> -#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150 -#define
> IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
> -
> -/*rx_stats_unicast_FramesErr*/
> -#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0 -#define
> IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
> -
> -/*tx_stats_multicast_FramesOK*/
> -#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152 -
> #define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
> -
> -/*rx_stats_multicast_FramesOK*/
> -#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2 -
> #define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
> -
> -/*tx_stats_multicast_FramesErr*/
> -#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154 -
> #define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
> -
> -/*rx_stats_multicast_FramesErr*/
> -#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4 -
> #define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
> -
> -/*tx_stats_broadcast_FramesOK*/
> -#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156 -
> #define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
> -
> -/*rx_stats_broadcast_FramesOK*/
> -#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6 -
> #define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
> -
> -/*tx_stats_broadcast_FramesErr*/
> -#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158 -
> #define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
> -
> -/*rx_stats_broadcast_FramesErr*/
> -#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8 -
> #define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
> -
> -/*tx_stats_etherStatsOctets 64b*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
> -
> -/*rx_stats_etherStatsOctets 64b*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
> -
> -/*tx_stats_etherStatsPkts*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
> -
> -/*rx_stats_etherStatsPkts*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
> -
> -/*tx_stats_etherStatsUndersizePkts*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E -
> #define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
> -
> -/*rx_stats_etherStatsUndersizePkts*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE -
> #define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
> -
> -/*tx_stats_etherStatsOversizePkts*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160 -
> #define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
> -
> -/*rx_stats_etherStatsOversizePkts*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0 -
> #define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
> -
> -/*tx_stats_etherStatsPkts64Octets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162 -
> #define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
> -
> -/*rx_stats_etherStatsPkts64Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2 -
> #define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
> -
> -/*tx_stats_etherStatsPkts65to127Octets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI
> 0x0164 -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
> -
> -/*rx_stats_etherStatsPkts65to127Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI
> 0x01E4 -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
> -
> -/*tx_stats_etherStatsPkts128to255Octets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI
> 0x0166 -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
> -
> -/*rx_stats_etherStatsPkts128to255Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI
> 0x01E6 -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
> -
> -/*tx_stats_etherStatsPkts256to511Octet*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI
> 0x0168 -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
> -
> -/*rx_stats_etherStatsPkts256to511Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI
> 0x01E8 -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
> -
> -/*tx_stats_etherStatsPkts512to1023Octets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI
> 0x016A -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
> -
> -/*rx_stats_etherStatsPkts512to1023Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI
> 0x01EA -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
> -
> -/*tx_stats_etherStatPkts1024to1518Octets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI
> 0x016C -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
> -
> -/*rx_stats_etherStatPkts1024to1518Octets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI
> 0x01EC -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
> -
> -/*tx_stats_etherStatsPkts1519toXOctets*/
> -#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI
> 0x016E -#define
> IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
> -
> -/*rx_stats_etherStatsPkts1519toXOctets*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI
> 0x01EE -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
> -
> -/*rx_stats_etherStatsFragments*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0 -
> #define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
> -
> -/*rx_stats_etherStatsJabbers*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2 -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
> -
> -/*rx_stats_etherStatsCRCErr*/
> -#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4 -#define
> IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
> -
> -/*tx_stats_unicastMACCtrlFrames*/
> -#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176 -
> #define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
> -
> -/*rx_stats_unicastMACCtrlFrames*/
> -#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6 -
> #define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
> -
> -/*tx_stats_multicastMACCtrlFrames*/
> -#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178 -
> #define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
> -
> -/*rx_stats_multicastMACCtrlFrames*/
> -#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8 -
> #define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
> -
> -/*tx_stats_broadcastMACCtrlFrames*/
> -#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A -
> #define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
> -
> -/*rx_stats_broadcastMACCtrlFrames*/
> -#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA -
> #define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
> -
> -/*tx_stats_PFCMACCtrlFrames*/
> -#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C -#define
> IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
> -
> -/*rx_stats_PFCMACCtrlFrames*/
> -#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC -#define
> IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
> +#define IPN3KE_REGISTER_WIDTH                                        32
> +
> +/*Bits[2:0]: Configuration of TX statistics counters:
> + *Bit[2]: Shadow request (active high): When set to the value of 1,
> +*TX statistics collection is paused. The underlying counters  *continue
> +to operate, but the readable values reflect a snapshot at  *the time
> +the pause flag was activated. Write a 0 to release.
> + *Bit[1]: Parity-error clear. When software sets this bit, the IP core
> +*clears the parity bit CNTR_TX_STATUS[0]. This bit
> + *(CNTR_TX_CONFIG[1]) is self-clearing.
> + *Bit[0]: Software can set this bit to the value of 1 to reset all of
> +*the TX statistics registers at the same time. This bit is selfclearing.
> + *Bits[31:3] are Reserved
> + */
> +#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
> +#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK
> 0x00000004
> +
> +/*Bit[1]: Indicates that the TX statistics registers are paused (while
> +*CNTR_TX_CONFIG[2] is asserted).
> + *Bit[0]: Indicates the presence of at least one parity error in the
> +*TX statistics counters.
> + *Bits[31:2] are Reserved.
> + */
> +#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
> +#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK
> 0x00000002
> +
> +#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
> +#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
> +#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
> +#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
> +#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
> +#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
> +#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
> +#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
> +#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
> +#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
> +#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
> +#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
> +#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
> +#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
> +#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
> +#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
> +#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
> +#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
> +#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
> +#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
> +#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
> +#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
> +#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
> +#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
> +#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
> +#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
> +#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
> +#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
> +#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
> +#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
> +#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
> +#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
> +#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
> +#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
> +#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
> +#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
> +#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
> +#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
> +#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
> +#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
> +#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
> +#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
> +#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
> +#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
> +#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
> +#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
> +#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
> +#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
> +#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
> +#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
> +#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
> +#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
> +#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
> +#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
> +#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
> +#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
> +#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
> +#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
> +
> +/*Bits[2:0]: Configuration of RX statistics counters:
> + *Bit[2]: Shadow request (active high): When set to the value of 1,
> +*RX statistics collection is paused. The underlying counters  *continue
> +to operate, but the readable values reflect a snapshot  *at the time
> +the pause flag was activated. Write a 0 to release.
> + *Bit[1]: Parity-error clear. When software sets this bit, the IP
> +*core clears the parity bit CNTR_RX_STATUS[0]. This bit
> + *(CNTR_RX_CONFIG[1]) is self-clearing.
> + *Bit[0]: Software can set this bit to the value of 1 to reset all of
> +*the RX statistics registers at the same time. This bit is selfclearing.
> + *Bits[31:3] are Reserved.
> + */
> +#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
> +#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK
> 0x00000004
> +
> +/*Bit[1]: Indicates that the RX statistics registers are paused
> +*(while CNTR_RX_CONFIG[2] is asserted).
> + *Bit[0]: Indicates the presence of at least one parity error in the
> +*RX statistics counters.
> + *Bits [31:2] are Reserved
> + */
> +#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
> +#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK
> 0x00000002
> +
> +#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
> +#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
> +#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
> +#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
> +#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
> +#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
> +#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
> +#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
> +#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
> +#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
> +#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
> +#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
> +#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
> +#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
> +#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
> +#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
> +#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
> +#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
> +#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
> +#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
> +#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
> +#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
> +#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
> +#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
> +#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
> +#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
> +#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
> +#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
> +#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
> +#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
> +#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
> +#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
> +#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
> +#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
> +#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
> +#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
> +#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
> +#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
> +#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
> +#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
> +#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
> +#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
> +#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
> +#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
> +#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
> +#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
> +#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
> +#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
> +#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
> +#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
> +#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
> +#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
> +#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
> +#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
> +#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
> +#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
> +#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
> +#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
> +
> +#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
> +
> +#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
> +#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
> +#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
> +	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
> +
> +#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
> +#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
> +#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
> +	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
> +
> +#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
> +#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
> +#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
> +#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
> +#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
> +#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
> +#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
> +#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
> +#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
> +#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
> +#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
> +#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
> +#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
> +#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
> +#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO
> 0x014A
> +#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI
> 0x014B
> +#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO
> 0x01CA
> +#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI
> 0x01CB
> +#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
> +#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
> +#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
> +#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
> +#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO
> 0x014E
> +#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
> +#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO
> 0x01CE
> +#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI
> 0x01CF
> +#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO
> 0x0150
> +#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI
> 0x0151
> +#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO
> 0x01D0
> +#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI
> 0x01D1
> +#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO
> 0x0152
> +#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI
> 0x0153
> +#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO
> 0x01D2
> +#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI
> 0x01D3
> +#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO
> 0x0154
> +#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI
> 0x0155
> +#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO
> 0x01D4
> +#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI
> 0x01D5
> +#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO
> 0x0156
> +#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI
> 0x0157
> +#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO
> 0x01D6
> +#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI
> 0x01D7
> +#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO
> 0x0158
> +#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI
> 0x0159
> +#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO
> 0x01D8
> +#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI
> 0x01D9
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO
> 0x015A
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI
> 0x015B
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO
> 0x01DA
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI
> 0x01DB
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO
> 0x015E
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI
> 0x015F
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO
> 0x01DE
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI
> 0x01DF
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO
> 0x0160
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI
> 0x0161
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO
> 0x01E0
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI
> 0x01E1
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO
> 0x0162
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI
> 0x0163
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO
> 0x01E2
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI
> 0x01E3
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO
> 0x0164
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI
> 0x0165
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO
> 0x01E4
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI
> 0x01E5
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO
> 0x0166
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI
> 0x0167
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO
> 0x01E6
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI
> 0x01E7
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO
> 0x0168
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI
> 0x0169
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO
> 0x01E8
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI
> 0x01E9
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO
> 0x016A
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI
> 0x016B
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO
> 0x01EA
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI
> 0x01EB
> +#define
> IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO
> 0x016C
> +#define
> IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI
> 0x016D
> +#define
> IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO
> 0x01EC
> +#define
> IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI
> 0x01ED
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO
> 0x016E
> +#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI
> 0x016F
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO
> 0x01EE
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI
> 0x01EF
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO
> 0x01E0
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI
> 0x01F1
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO
> 0x01E2
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI
> 0x01F3
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO
> 0x01E4
> +#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI
> 0x01F5
> +#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO
> 0x0176
> +#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI
> 0x0177
> +#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO
> 0x01F6
> +#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI
> 0x01F7
> +#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO
> 0x0178
> +#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI
> 0x0179
> +#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO
> 0x01F8
> +#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI
> 0x01F9
> +#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO
> 0x017A
> +#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI
> 0x017B
> +#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO
> 0x01FA
> +#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI
> 0x01FB
> +#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO
> 0x017C
> +#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI
> 0x017D
> +#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO
> 0x01FC
> +#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI
> 0x01FD
> 
>  static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
>  		uint32_t mac_num, uint32_t eth_group_sel) @@ -945,31
> +1004,62 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct
> ipn3ke_hw *hw,
>  					eth_group_sel);
>  }
> 
> -static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
> -	uint32_t mac_num, uint32_t eth_group_sel)
> +static inline void ipn3ke_xmac_tx_clr_10G_stcs (struct ipn3ke_hw *hw,
> +uint32_t mac_num, uint32_t eth_group_sel)
>  {
>  #define IPN3KE_XMAC_TX_CLR_STCS (1 & \
> -	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
> +	(IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK))
> 
>  	(*hw->f_mac_write)(hw,
>  					IPN3KE_XMAC_TX_CLR_STCS,
> -					IPN3KE_MAC_TX_STATS_CLR,
> +					IPN3KE_10G_TX_STATS_CLR,
>  					mac_num,
>  					eth_group_sel);
>  }
> 
> -static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
> -	uint32_t mac_num, uint32_t eth_group_sel)
> +static inline void ipn3ke_xmac_rx_clr_10G_stcs (struct ipn3ke_hw *hw,
> +uint32_t mac_num, uint32_t eth_group_sel)
>  {
>  #define IPN3KE_XMAC_RX_CLR_STCS (1 & \
> -	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
> +	(IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK))
> 
>  	(*hw->f_mac_write)(hw,
>  					IPN3KE_XMAC_RX_CLR_STCS,
> -					IPN3KE_MAC_RX_STATS_CLR,
> +					IPN3KE_10G_RX_STATS_CLR,
>  					mac_num,
>  					eth_group_sel);
>  }
> 
> +static inline void ipn3ke_xmac_tx_clr_25G_stcs (struct ipn3ke_hw *hw,
> +uint32_t mac_num, uint32_t eth_group_sel) {
> +	uint32_t tmp = 0x00000001;
> +
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the TX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +					tmp,
> +					IPN3KE_25G_TX_STATISTICS_CONFIG,
> +					mac_num,
> +					eth_group_sel);
> +}
> +
> +static inline void ipn3ke_xmac_rx_clr_25G_stcs (struct ipn3ke_hw *hw,
> +uint32_t mac_num, uint32_t eth_group_sel) {
> +	uint32_t tmp = 0x00000001;
> +
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the RX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +					tmp,
> +					IPN3KE_25G_RX_STATISTICS_CONFIG,
> +					mac_num,
> +					eth_group_sel);
> +}
> 
>  #endif /* _IPN3KE_ETHDEV_H_ */
> --
> 1.8.3.1

Acked-by: Rosen Xu <rosen.xu@intel.com>

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
@ 2019-06-12  1:17       ` Xu, Rosen
  0 siblings, 0 replies; 47+ messages in thread
From: Xu, Rosen @ 2019-06-12  1:17 UTC (permalink / raw)
  To: Pei, Andy, dev



> -----Original Message-----
> From: Pei, Andy
> Sent: Tuesday, June 11, 2019 17:49
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Xu, Rosen <rosen.xu@intel.com>
> Subject: [PATCH v2 2/4] net/ipn3ke: delete MAC register address mask
> 
> original code is compatible with older device, whose mac register address is
> no more than 10 bits.
> Now we have mac register address longer than 10 bits, so we just delete the
> mask here.
> 
> Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
> Cc: rosen.xu@intel.com
> 
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_ethdev.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> index 9079b57..8d3084d 100644
> --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> @@ -48,7 +48,6 @@
>  	if (eth_group_sel != 0 && eth_group_sel != 1)
>  		return -1;
> 
> -	addr &= 0x3FF;
>  	target_addr = addr | dev_sel << 17;
> 
>  	indirect_value = RCMD | target_addr << 32; @@ -86,7 +85,6 @@
>  	if (eth_group_sel != 0 && eth_group_sel != 1)
>  		return -1;
> 
> -	addr &= 0x3FF;
>  	target_addr = addr | dev_sel << 17;
> 
>  	indirect_value = WCMD | target_addr << 32 | wr_data;
> --
> 1.8.3.1

Acked-by: Rosen Xu <rosen.xu@intel.com>

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
@ 2019-06-12  1:17       ` Xu, Rosen
  2019-06-19  8:49       ` [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address Andy Pei
  1 sibling, 0 replies; 47+ messages in thread
From: Xu, Rosen @ 2019-06-12  1:17 UTC (permalink / raw)
  To: Pei, Andy, dev



> -----Original Message-----
> From: Pei, Andy
> Sent: Tuesday, June 11, 2019 17:49
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Xu, Rosen <rosen.xu@intel.com>
> Subject: [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev
> 
> clear line side and NIC side statistics registers when HW init and uinit, and
> when dev start.
> 
> Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
> Cc: rosen.xu@intel.com
> 
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59
> ++++++++++++++++++++++++++++-----
>  drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
>  2 files changed, 74 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> index 8d3084d..27ebfb5 100644
> --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
> +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
> @@ -244,11 +244,33 @@
>  			/* Enable the RX path */
>  			ipn3ke_xmac_rx_enable(hw, i, 1);
> 
> -			/* Clear all TX statistics counters */
> -			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
> +			/* Clear NIC side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
> 
> -			/* Clear all RX statistics counters */
> -			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
> +			/* Clear NIC side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
> +
> +			/* Clear line side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
> +
> +			/* Clear line RX statistics counters */
> +			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
> +		}
> +	} else if (hw->retimer.mac_type ==
> +			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI)
> {
> +		/* Enable inter connect channel */
> +		for (i = 0; i < hw->port_num; i++) {
> +			/* Clear NIC side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
> +
> +			/* Clear NIC side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
> +
> +			/* Clear line side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
> +
> +			/* Clear line side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
>  		}
>  	}
> 
> @@ -291,11 +313,32 @@
>  			/* Disable the RX path */
>  			ipn3ke_xmac_rx_disable(hw, i, 1);
> 
> -			/* Clear all TX statistics counters */
> -			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
> +			/* Clear NIC side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
> +
> +			/* Clear NIC side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
> +
> +			/* Clear line side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
> +
> +			/* Clear line side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
> +		}
> +	} else if (hw->retimer.mac_type ==
> +			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI)
> {
> +		for (i = 0; i < hw->port_num; i++) {
> +			/* Clear NIC side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
> +
> +			/* Clear NIC side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
> +
> +			/* Clear line side TX statistics counters */
> +			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
> 
> -			/* Clear all RX statistics counters */
> -			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
> +			/* Clear line side RX statistics counters */
> +			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
>  		}
>  	}
>  }
> diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c
> b/drivers/net/ipn3ke/ipn3ke_representor.c
> index f4529f6..b166b8f 100644
> --- a/drivers/net/ipn3ke/ipn3ke_representor.c
> +++ b/drivers/net/ipn3ke/ipn3ke_representor.c
> @@ -159,11 +159,30 @@
>  		/* Enable the RX path */
>  		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
> 
> -		/* Clear all TX statistics counters */
> -		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
> +		/* Clear line side TX statistics counters */
> +		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
> 
> -		/* Clear all RX statistics counters */
> -		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
> +		/* Clear line side RX statistics counters */
> +		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
> +
> +		/* Clear NIC side TX statistics counters */
> +		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
> +
> +		/* Clear NIC side RX statistics counters */
> +		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
> +	} else if (hw->retimer.mac_type ==
> +
> 	IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
> +		/* Clear line side TX statistics counters */
> +		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
> +
> +		/* Clear line side RX statistics counters */
> +		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
> +
> +		/* Clear NIC side TX statistics counters */
> +		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
> +
> +		/* Clear NIC side RX statistics counters */
> +		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
>  	}
> 
>  	ipn3ke_rpst_link_update(dev, 0);
> --
> 1.8.3.1
Acked-by: Rosen Xu <rosen.xu@intel.com>

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics Andy Pei
@ 2019-06-12  1:17       ` Xu, Rosen
  2019-06-18 11:59       ` Ferruh Yigit
  1 sibling, 0 replies; 47+ messages in thread
From: Xu, Rosen @ 2019-06-12  1:17 UTC (permalink / raw)
  To: Pei, Andy, dev



> -----Original Message-----
> From: Pei, Andy
> Sent: Tuesday, June 11, 2019 17:49
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Xu, Rosen <rosen.xu@intel.com>
> Subject: [PATCH v2 4/4] net/ipn3ke: implementation of statistics
> 
> This patch implemente statistics read and reset
> function for ipn3ke.
> 
> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
> Cc: rosen.xu@intel.com
> 
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_representor.c | 6118
> ++++++++++++++++++++++++++++++-
>  1 file changed, 6110 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c
> b/drivers/net/ipn3ke/ipn3ke_representor.c
> index b166b8f..5602ae2 100644
> --- a/drivers/net/ipn3ke/ipn3ke_representor.c
> +++ b/drivers/net/ipn3ke/ipn3ke_representor.c
> @@ -3,6 +3,7 @@
>   */
> 
>  #include <stdint.h>
> +#include <unistd.h>
> 
>  #include <rte_bus_pci.h>
>  #include <rte_ethdev.h>
> @@ -297,31 +298,6132 @@
>  {
>  }
> 
> +/* Statistics collected by each port, VSI, VEB, and S-channel */
> +struct ipn3ke_rpst_eth_stats {
> +	uint64_t tx_bytes;               /* gotc */
> +	uint64_t tx_multicast;           /* mptc */
> +	uint64_t tx_broadcast;           /* bptc */
> +	uint64_t tx_unicast;             /* uptc */
> +	uint64_t tx_discards;            /* tdpc */
> +	uint64_t tx_errors;              /* tepc */
> +	uint64_t rx_bytes;               /* gorc */
> +	uint64_t rx_multicast;           /* mprc */
> +	uint64_t rx_broadcast;           /* bprc */
> +	uint64_t rx_unicast;             /* uprc */
> +	uint64_t rx_discards;            /* rdpc */
> +	uint64_t rx_unknown_protocol;    /* rupp */
> +};
> +
> +/* store statistics names and its offset in stats structure */
> +struct ipn3ke_rpst_xstats_name_offset {
> +	char name[RTE_ETH_XSTATS_NAME_SIZE];
> +	unsigned int offset;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_stats_strings[] = {
> +	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
> +							tx_multicast)},
> +	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
> +							tx_broadcast)},
> +	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
> +							tx_unicast)},
> +	{"tx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
> +							tx_discards)},
> +	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
> +							rx_multicast)},
> +	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
> +							rx_broadcast)},
> +	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
> +							rx_unicast)},
> +	{"rx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
> +							rx_discards)},
> +	{"rx_unknown_protocol_packets", offsetof(struct
> ipn3ke_rpst_eth_stats,
> +
> 	rx_unknown_protocol)},
> +};
> +
> +#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) /
> \
> +		sizeof(ipn3ke_rpst_stats_strings[0]))
> +
> +#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
> +
> +/* Statistics collected by the MAC */
> +struct ipn3ke_rpst_hw_port_stats {
> +	/* eth stats collected by the port */
> +	struct ipn3ke_rpst_eth_stats eth;
> +
> +	/* additional port specific stats */
> +	uint64_t tx_dropped_link_down;
> +	uint64_t crc_errors;
> +	uint64_t illegal_bytes;
> +	uint64_t error_bytes;
> +	uint64_t mac_local_faults;
> +	uint64_t mac_remote_faults;
> +	uint64_t rx_length_errors;
> +	uint64_t link_xon_rx;
> +	uint64_t link_xoff_rx;
> +	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +	uint64_t link_xon_tx;
> +	uint64_t link_xoff_tx;
> +	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +	uint64_t rx_size_64;
> +	uint64_t rx_size_65_127;
> +	uint64_t rx_size_128_255;
> +	uint64_t rx_size_256_511;
> +	uint64_t rx_size_512_1023;
> +	uint64_t rx_size_1024_1518;
> +	uint64_t rx_size_big;
> +	uint64_t rx_undersize;
> +	uint64_t rx_fragments;
> +	uint64_t rx_oversize;
> +	uint64_t rx_jabber;
> +	uint64_t tx_size_64;
> +	uint64_t tx_size_65_127;
> +	uint64_t tx_size_128_255;
> +	uint64_t tx_size_256_511;
> +	uint64_t tx_size_512_1023;
> +	uint64_t tx_size_1024_1518;
> +	uint64_t tx_size_1519_to_max;
> +	uint64_t mac_short_packet_dropped;
> +	uint64_t checksum_error;
> +	/* flow director stats */
> +	uint64_t fd_atr_match;
> +	uint64_t fd_sb_match;
> +	uint64_t fd_atr_tunnel_match;
> +	uint32_t fd_atr_status;
> +	uint32_t fd_sb_status;
> +	/* EEE LPI */
> +	uint32_t tx_lpi_status;
> +	uint32_t rx_lpi_status;
> +	uint64_t tx_lpi_count;
> +	uint64_t rx_lpi_count;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_hw_port_strings[] = {
> +	{"tx_link_down_dropped",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +						tx_dropped_link_down)},
> +	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						crc_errors)},
> +	{"rx_illegal_byte_errors",    offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +						illegal_bytes)},
> +	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						error_bytes)},
> +	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						mac_local_faults)},
> +	{"mac_remote_errors",         offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +						mac_remote_faults)},
> +	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						rx_length_errors)},
> +	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						link_xon_tx)},
> +	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						link_xon_rx)},
> +	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						link_xoff_tx)},
> +	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
> +						link_xoff_rx)},
> +	{"rx_size_64_packets",        offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +						rx_size_64)},
> +	{"rx_size_65_to_127_packets", offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +						rx_size_65_127)},
> +	{"rx_size_128_to_255_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 rx_size_128_255)},
> +	{"rx_size_256_to_511_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 rx_size_256_511)},
> +	{"rx_size_512_to_1023_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 rx_size_512_1023)},
> +	{"rx_size_1024_to_1518_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 rx_size_1024_1518)},
> +	{"rx_size_1519_to_max_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 rx_size_big)},
> +	{"rx_undersized_errors",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       rx_undersize)},
> +	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       rx_oversize)},
> +	{"rx_mac_short_dropped",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       mac_short_packet_dropped)},
> +	{"rx_fragmented_errors",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       rx_fragments)},
> +	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       rx_jabber)},
> +	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       tx_size_64)},
> +	{"tx_size_65_to_127_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_65_127)},
> +	{"tx_size_128_to_255_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_128_255)},
> +	{"tx_size_256_to_511_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_256_511)},
> +	{"tx_size_512_to_1023_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_512_1023)},
> +	{"tx_size_1024_to_1518_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_1024_1518)},
> +	{"tx_size_1519_to_max_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 tx_size_1519_to_max)},
> +	{"rx_flow_director_atr_match_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 fd_atr_match)},
> +	{"rx_flow_director_sb_match_packets",
> +				offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					 fd_sb_match)},
> +	{"tx_low_power_idle_status",  offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       tx_lpi_status)},
> +	{"rx_low_power_idle_status",  offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       rx_lpi_status)},
> +	{"tx_low_power_idle_count",   offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       tx_lpi_count)},
> +	{"rx_low_power_idle_count",   offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       rx_lpi_count)},
> +};
> +
> +#define IPN3KE_RPST_HW_PORT_XSTATS_CNT
> (sizeof(ipn3ke_rpst_hw_port_strings) \
> +		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_rxq_prio_strings[] = {
> +	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       priority_xon_rx)},
> +	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       priority_xoff_rx)},
> +};
> +
> +#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
> (sizeof(ipn3ke_rpst_rxq_prio_strings) \
> +		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_txq_prio_strings[] = {
> +	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       priority_xon_tx)},
> +	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
> +					       priority_xoff_tx)},
> +	{"xon_to_xoff_packets",       offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +					       priority_xon_2_xoff)},
> +};
> +
> +#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
> (sizeof(ipn3ke_rpst_txq_prio_strings) \
> +		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
> +
> +static uint32_t
> +ipn3ke_rpst_xstats_calc_num(void)
> +{
> +	return IPN3KE_RPST_ETH_XSTATS_CNT
> +		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
> +		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
> +			* IPN3KE_RPST_PRIO_XSTATS_CNT)
> +		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
> +			* IPN3KE_RPST_PRIO_XSTATS_CNT);
> +}
> +
> +#if 0
> +
>  static int
> -ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
> -	__rte_unused struct rte_eth_stats *stats)
> +ipn3ke_read_25G_NICside_stats_registers
> +(struct ipn3ke_hw *hw,
> +uint16_t port_id,
> +struct ipn3ke_rpst_hw_port_stats *hw_stats)
>  {
> +	uint32_t tmp;
> +	uint32_t statistics_lo;
> +	uint32_t statistics_hi;
> +	uint64_t statistics;
> +
> +	memset(hw_stats, 0, sizeof(*hw_stats));
> +
> +	/*check Tx statistics is real time.
> +	 *if statistics has been paused, make it real time.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +
> +	if (tmp &
> IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	}
> +
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_TX_STATISTICS_STATUS,
> +		port_id,
> +		1);
> +	if (tmp &
> IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	}
> +
> +	/*check Rx statistics is real time.
> +	 *if statistics has been paused, make it real time.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	if (tmp &
> IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	}
> +
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_RX_STATISTICS_STATUS,
> +		port_id,
> +		1);
> +
> +	if (tmp &
> IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	}
> +
> +	/* pause Tx counter to read the statistics */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_TX_STATISTICS_CONFIG,
> +		port_id,
> +		1);
> +	tmp |= 0x00000004;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_25G_TX_STATISTICS_CONFIG,
> +		port_id,
> +		1);
> +
> +	/* pause Rx counter to read the statistics */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_RX_STATISTICS_CONFIG,
> +		port_id,
> +		1);
> +	tmp |= 0x00000004;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_25G_RX_STATISTICS_CONFIG,
> +		port_id,
> +		1);
> +
> +	/*Number of transmitted frames less than 64 bytes
> +	 *and reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of transmitted oversized frames reporting a CRC error*/
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_JABBERS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_JABBERS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/* Number of transmitted packets with FCS errors */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_FCS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_FCS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->checksum_error += statistics;
> +
> +	/*Number of transmitted frames with a frame of length at
> +	 *least 64 reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_CRCERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_CRCERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of errored multicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of errored broadcast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of errored unicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored multicast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored broadcast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored unicast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored pause frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of 64-byte transmitted frames,
> +	 *including the CRC field but excluding the preamble
> +	 *and SFD bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_64B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_64B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_64 += statistics;
> +
> +	/* Number of transmitted frames between 65 and 127 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_65_127B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_65_127B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_65_127 += statistics;
> +
> +	/* Number of transmitted frames between 128 and 255 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_128_255B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_128_255B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_128_255 += statistics;
> +
> +	/* Number of transmitted frames between 256 and 511 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_256_511B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_256_511B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_256_511 += statistics;
> +
> +	/* Number of transmitted frames between 512 and 1023 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_512_1023B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_512_1023B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_512_1023 += statistics;
> +
> +	/* Number of transmitted frames between 1024 and 1518 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1024_1518 += statistics;
> +
> +	/*Number of transmitted frames of size between 1519 bytes
> +	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
> +	 *register
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1519_to_max += statistics;
> +
> +	/*Number of oversized frames (frames with more bytes than the
> +	 *number specified in the MAX_TX_SIZE_CONFIG register)
> +	 *transmitted
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of valid multicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/*Number of valid multicast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/* Number of valid pause frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_PAUSE_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_PAUSE_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of transmitted runt packets. The IP core does not
> +	 *transmit frames of length less than nine bytes.
> +	 *The IP core pads frames of length nine bytes to 64 bytes to
> +	 *extend them to 64 bytes. Therefore, this counter does not
> +	 *increment in normal operating conditions.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_RUNT_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_RUNT_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of transmitted payload bytes in frames with no FCS,
> +	 *undersized, oversized, or payload length errors.
> +	 *If VLAN detection is turned off for the TX MAC (bit[1]
> +	 *of the TX_MAC_CONTROL register at offset 0x40A has
> +	 *the value of 1), the IP core counts the VLAN header bytes
> +	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
> +	 *as payload bytes. This register is compliant with
> +	 *the requirements for aOctetsTransmittedOK in section
> +	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_bytes += statistics;
> +
> +	/*Number of transmitted bytes in frames with no FCS, undersized,
> +	 *oversized, or payload length errors. This register is
> +	 *compliant with the requirements for ifOutOctets in RFC3635
> +	 *(Managed Objects for Ethernet-like Interface Types)
> +	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
> +	 *Management Information Base (RMON)).
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received frames less than 64 bytes
> +	 *and reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +	hw_stats->rx_length_errors += statistics;
> +
> +	/* Number of received oversized frames reporting a CRC error */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_JABBERS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_JABBERS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +	hw_stats->rx_length_errors += statistics;
> +
> +	/*Number of received packets with FCS errors.
> +	 *This register maintains a count of the number of pulses
> +	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_FCS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_FCS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->checksum_error += statistics;
> +
> +	/*Number of received frames with a frame of length at least 64
> +	 *with CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_CRCERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_CRCERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of errored multicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of errored broadcast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of errored unicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored multicast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored broadcast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored unicast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored pause frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of 64-byte received frames,
> +	 *including the CRC field but excluding the preamble
> +	 *and SFD bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_64B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_64B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_64 += statistics;
> +
> +	/*Number of received frames between 65 and 127 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_65_127B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_65_127B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_65_127 += statistics;
> +
> +	/*Number of received frames between 128 and 255 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_128_255B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_128_255B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_128_255 += statistics;
> +
> +	/*Number of received frames between 256 and 511 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_256_511B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_256_511B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_256_511 += statistics;
> +
> +	/*Number of received frames between 512 and 1023 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_512_1023B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_512_1023B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_512_1023 += statistics;
> +
> +	/*Number of received frames between 1024 and 1518 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_1024_1518 += statistics;
> +
> +	/*Number of received frames of size between 1519 bytes
> +	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
> +	 *register
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_big += statistics;
> +
> +	/*Number of oversized frames (frames with more bytes
> +	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
> +	 *received
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_jabber += statistics;
> +
> +	/*Number of valid multicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*Number of valid multicast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*Number of received pause frames, with or without error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_PAUSE_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_PAUSE_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received runt packets. A runt is a packet of size
> +	 *less than 64 bytes but greater than eight bytes.
> +	 *If a packet is eight bytes or smaller, it is considered
> +	 *a decoding error and not a runt frame, and the IP core
> +	 *does not flag it nor count it as a runt.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_RUNT_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_RUNT_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received payload bytes in frames with no FCS,
> +	 *undersized, oversized, or payload length errors.
> +	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
> +	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
> +	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
> +	 *8 bytes for stacked VLAN) as payload bytes.
> +	 *This register is compliant with the requirements for
> +	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
> +	 *802.3-2008
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_bytes += statistics;
> +
> +	/*Number of received bytes in frames with no FCS, undersized,
> +	 *oversized, or payload length errors.
> +	 *This register is compliant with the requirements for
> +	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
> +	 *Interface Types) and RX etherStatsOctets in RFC2819
> +	 *(Remote Network Monitoring Management Information Base
> +	 *(RMON)).
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*resume Tx counter to real time
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	tmp &= 0xfffffffb;
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +
> +	/*resume Rx counter to real time
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +	tmp &= 0xfffffffb;
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +
>  	return 0;
>  }
> 
> +#endif
> +
> +static void
> +ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp = 0x00000001;
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the TX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +
> +	while (tmp & 0x00000001) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +				&tmp,
> +				IPN3KE_25G_TX_STATISTICS_CONFIG,
> +				port_id,
> +				1);
> +		if (tmp & 0x00000001)
> +			usleep(5);
> +		else
> +			return;
> +	}
> +}
> +
> +static void
> +ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp = 0x00000001;
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the RX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			1);
> +
> +	while (tmp & 0x00000001) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +				&tmp,
> +				IPN3KE_25G_RX_STATISTICS_CONFIG,
> +				port_id,
> +				1);
> +		if (tmp & 0x00000001)
> +			usleep(5);
> +		else
> +			return;
> +	}
> +}
> +
> +#if 0
> +
>  static int
> -ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,
> -	__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned
> int n)
> +ipn3ke_read_10G_NICside_stats_registers
> +(struct ipn3ke_hw *hw,
> +uint16_t port_id,
> +struct ipn3ke_rpst_hw_port_stats *hw_stats,
> +struct rte_eth_stats *stats)
>  {
> +	uint32_t statistics_lo = 0;
> +	uint32_t statistics_hi = 0;
> +	uint64_t statistics = 0;
> +
> +	memset(hw_stats, 0, sizeof(*hw_stats));
> +	memset(stats, 0, sizeof(*stats));
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *that are successfully transmitted, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->opackets = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *that are successfully received, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ipackets = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *transmitted with error, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->oerrors = statistics;
> +	hw_stats->eth.tx_errors = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *received with error, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ierrors = statistics;
> +	hw_stats->eth.rx_discards = statistics;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of RX frames with CRC error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->crc_errors = statistics;
> +
> +	/*64-bit statistics counter that collects the payload length,
> +	 *including the bytes in control frames.
> +	 *The payload length is the number of data and padding bytes
> +	 *transmitted.
> +	 *If the tx_vlan_detection[0] register bit is set to 1,
> +	 *the VLAN and stacked VLAN tags are counted as part of
> +	 *the TX payload.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->obytes = statistics;
> +	hw_stats->eth.tx_bytes = statistics;
> +
> +	/*64-bit statistics counter that collects the payload length,
> +	 *including the bytes in control frames.
> +	 *The payload length is the number of data and padding bytes
> +	 *received.
> +	 *If the rx_vlan_detection[0] register bit is set to 1,
> +	 *the VLAN and stacked VLAN tags are counted as part of
> +	 *the RX payload.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ibytes = statistics;
> +	hw_stats->eth.rx_bytes = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid pause frames transmitted.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid pause frames received.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *transmitted that are invalid and with error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *received that are invalid and with error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good unicast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good unicast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *unicast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *unicast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good multicast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good multicast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *multicast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of multicast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good broadcast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good broadcast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast = statistics;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of broadcast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *broadcast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*64-bit statistics counter that collects the total number of
> +	 *octets transmitted.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*64-bit statistics counter that collects the total number of
> +	 *octets received.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *good, errored, and invalid frames transmitted.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *good, errored, and invalid frames received.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *undersized TX frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *undersized RX frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_undersize = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames whose length exceeds the maximum frame length
> +	 *specified.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames whose length exceeds the maximum frame length
> +	 *specified.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_oversize = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *64-byte TX frames,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_64 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *64-byte RX frames,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_64 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 65 and 127 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_65_127 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 65 and 127 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_65_127 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 128 and 255 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_128_255 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 128 and 255 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_128_255 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 256 and 511 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_256_511 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 256 and 511 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_256_511 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 512 and 1023 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_512_1023 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 512 and 1023 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_512_1023 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 1024 and 1518 bytes,
> +	 *including the CRC field but
> +	 *excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
> +		port_id,
> +		1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
> +		port_id,
> +		1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1024_1518 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 1024 and 1518 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
> +		port_id,
> +		1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
> +		port_id,
> +		1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_1024_1518 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames equal or more than the length of 1,519 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1519_to_max = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames equal or more than the length of 1,519 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good,
> +	 *errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_big = statistics;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *RX frames with length less than 64 bytes and CRC error.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *oversized RX frames with CRC error.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames with CRC error,
> +	 *whose length is between 64 and the maximum frame length
> +	 *specified in the register.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX unicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX unicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX multicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX multicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX broadcast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX broadcast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX PFC frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX PFC frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			1);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
>  	return 0;
>  }
> 
> +#endif
> +
> +static void
> +ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp;
> +
> +	/*Bit [0]: Set this register to 1 to clear all TX statistics
> +	 *counters.
> +	 *The IP core clears this bit when all counters are cleared.
> +	 *Bits [31:1]: Reserved.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_10G_TX_STATS_CLR,
> +		port_id,
> +		1);
> +	tmp |= 0x00000001;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_10G_TX_STATS_CLR,
> +		port_id,
> +		1);
> +}
> +
> +static void
> +ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp;
> +
> +	/*Bit [0]: Set this register to 1 to clear all RX statistics
> +	 *counters.
> +	 *The IP core clears this bit when all counters are cleared.
> +	 *Bits [31:1]: Reserved
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_10G_RX_STATS_CLR,
> +		port_id,
> +		1);
> +	tmp |= 0x00000001;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_10G_RX_STATS_CLR,
> +		port_id,
> +		1);
> +}
> +
>  static int
> -ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
> -		__rte_unused struct rte_eth_xstat_name *xstats_names,
> -		__rte_unused unsigned int limit)
> +ipn3ke_read_25G_Lineside_stats_registers
> +(struct ipn3ke_hw *hw,
> +uint16_t port_id,
> +struct ipn3ke_rpst_hw_port_stats *hw_stats)
>  {
> +	uint32_t tmp;
> +	uint32_t statistics_lo;
> +	uint32_t statistics_hi;
> +	uint64_t statistics;
> +
> +	memset(hw_stats, 0, sizeof(*hw_stats));
> +
> +	/*check Tx statistics is real time.
> +	 *if statistics has been paused, make it real time.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +
> +	if (tmp &
> IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	}
> +
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_TX_STATISTICS_STATUS,
> +		port_id,
> +		1);
> +	if (tmp &
> IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	}
> +
> +	/*check Rx statistics is real time.
> +	 *if statistics has been paused, make it real time.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	if (tmp &
> IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	}
> +
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_RX_STATISTICS_STATUS,
> +		port_id,
> +		0);
> +
> +	if (tmp &
> IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +		tmp &= 0xfffffffb;
> +		(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	}
> +
> +	/* pause Tx counter to read the statistics */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_TX_STATISTICS_CONFIG,
> +		port_id,
> +		0);
> +	tmp |= 0x00000004;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_25G_TX_STATISTICS_CONFIG,
> +		port_id,
> +		0);
> +
> +	/* pause Rx counter to read the statistics */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_25G_RX_STATISTICS_CONFIG,
> +		port_id,
> +		0);
> +	tmp |= 0x00000004;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_25G_RX_STATISTICS_CONFIG,
> +		port_id,
> +		0);
> +
> +	/*Number of transmitted frames less than 64 bytes
> +	 *and reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of transmitted oversized frames reporting a CRC error*/
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_JABBERS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_JABBERS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/* Number of transmitted packets with FCS errors */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_FCS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_FCS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->checksum_error += statistics;
> +
> +	/*Number of transmitted frames with a frame of length at
> +	 *least 64 reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_CRCERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_CRCERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of errored multicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of errored broadcast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of errored unicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored multicast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored broadcast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored unicast control frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/* Number of errored pause frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_errors += statistics;
> +
> +	/*Number of 64-byte transmitted frames,
> +	 *including the CRC field but excluding the preamble
> +	 *and SFD bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_64B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_64B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_64 += statistics;
> +
> +	/* Number of transmitted frames between 65 and 127 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_65_127B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_65_127B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_65_127 += statistics;
> +
> +	/* Number of transmitted frames between 128 and 255 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_128_255B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_128_255B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_128_255 += statistics;
> +
> +	/* Number of transmitted frames between 256 and 511 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_256_511B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_256_511B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_256_511 += statistics;
> +
> +	/* Number of transmitted frames between 512 and 1023 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_512_1023B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_512_1023B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_512_1023 += statistics;
> +
> +	/* Number of transmitted frames between 1024 and 1518 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1024_1518 += statistics;
> +
> +	/*Number of transmitted frames of size between 1519 bytes
> +	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
> +	 *register
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1519_to_max += statistics;
> +
> +	/*Number of oversized frames (frames with more bytes than the
> +	 *number specified in the MAX_TX_SIZE_CONFIG register)
> +	 *transmitted
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of valid multicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames transmitted,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/*Number of valid multicast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames transmitted,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/* Number of valid pause frames transmitted */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_PAUSE_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_PAUSE_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of transmitted runt packets. The IP core does not
> +	 *transmit frames of length less than nine bytes.
> +	 *The IP core pads frames of length nine bytes to 64 bytes to
> +	 *extend them to 64 bytes. Therefore, this counter does not
> +	 *increment in normal operating conditions.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_TX_RUNT_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_TX_RUNT_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of transmitted payload bytes in frames with no FCS,
> +	 *undersized, oversized, or payload length errors.
> +	 *If VLAN detection is turned off for the TX MAC (bit[1]
> +	 *of the TX_MAC_CONTROL register at offset 0x40A has
> +	 *the value of 1), the IP core counts the VLAN header bytes
> +	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
> +	 *as payload bytes. This register is compliant with
> +	 *the requirements for aOctetsTransmittedOK in section
> +	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_bytes += statistics;
> +
> +	/*Number of transmitted bytes in frames with no FCS, undersized,
> +	 *oversized, or payload length errors. This register is
> +	 *compliant with the requirements for ifOutOctets in RFC3635
> +	 *(Managed Objects for Ethernet-like Interface Types)
> +	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
> +	 *Management Information Base (RMON)).
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received frames less than 64 bytes
> +	 *and reporting a CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
> +			port_id,
> +			1);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +	hw_stats->rx_length_errors += statistics;
> +
> +	/* Number of received oversized frames reporting a CRC error */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_JABBERS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_JABBERS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +	hw_stats->rx_length_errors += statistics;
> +
> +	/*Number of received packets with FCS errors.
> +	 *This register maintains a count of the number of pulses
> +	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_FCS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_FCS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->checksum_error += statistics;
> +
> +	/*Number of received frames with a frame of length at least 64
> +	 *with CRC error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_CRCERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_CRCERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +	hw_stats->crc_errors += statistics;
> +
> +	/*Number of errored multicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of errored broadcast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of errored unicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored multicast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored broadcast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored unicast control frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/* Number of errored pause frames received */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_discards += statistics;
> +
> +	/*Number of 64-byte received frames,
> +	 *including the CRC field but excluding the preamble
> +	 *and SFD bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_64B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_64B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_64 += statistics;
> +
> +	/*Number of received frames between 65 and 127 bytes */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_65_127B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_65_127B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_65_127 += statistics;
> +
> +	/*Number of received frames between 128 and 255 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_128_255B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_128_255B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_128_255 += statistics;
> +
> +	/*Number of received frames between 256 and 511 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_256_511B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_256_511B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_256_511 += statistics;
> +
> +	/*Number of received frames between 512 and 1023 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_512_1023B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_512_1023B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_512_1023 += statistics;
> +
> +	/*Number of received frames between 1024 and 1518 bytes
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_1024_1518 += statistics;
> +
> +	/*Number of received frames of size between 1519 bytes
> +	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
> +	 *register
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_big += statistics;
> +
> +	/*Number of oversized frames (frames with more bytes
> +	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
> +	 *received
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_jabber += statistics;
> +
> +	/*Number of valid multicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames received,
> +	 *excluding control frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*Number of valid multicast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*Number of valid broadcast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*Number of valid unicast frames received,
> +	 *excluding data frames
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*Number of received pause frames, with or without error
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_PAUSE_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_PAUSE_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received runt packets. A runt is a packet of size
> +	 *less than 64 bytes but greater than eight bytes.
> +	 *If a packet is eight bytes or smaller, it is considered
> +	 *a decoding error and not a runt frame, and the IP core
> +	 *does not flag it nor count it as a runt.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_CNTR_RX_RUNT_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_CNTR_RX_RUNT_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*Number of received payload bytes in frames with no FCS,
> +	 *undersized, oversized, or payload length errors.
> +	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
> +	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
> +	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
> +	 *8 bytes for stacked VLAN) as payload bytes.
> +	 *This register is compliant with the requirements for
> +	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
> +	 *802.3-2008
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_bytes += statistics;
> +
> +	/*Number of received bytes in frames with no FCS, undersized,
> +	 *oversized, or payload length errors.
> +	 *This register is compliant with the requirements for
> +	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
> +	 *Interface Types) and RX etherStatsOctets in RFC2819
> +	 *(Remote Network Monitoring Management Information Base
> +	 *(RMON)).
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*resume Tx counter to real time
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	tmp &= 0xfffffffb;
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +
> +	/*resume Rx counter to real time
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +	tmp &= 0xfffffffb;
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +
> +	return 0;
> +}
> +
> +static void
> +ipn3ke_rpst_25G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp = 0x00000001;
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the TX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_TX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +
> +	while (tmp & 0x00000001) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +				&tmp,
> +				IPN3KE_25G_TX_STATISTICS_CONFIG,
> +				port_id,
> +				0);
> +		if (tmp & 0x00000001)
> +			usleep(5);
> +		else
> +			return;
> +	}
> +}
> +
> +static void
> +ipn3ke_rpst_25G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp = 0x00000001;
> +	/* Bit[0]: Software can set this bit to the value of 1
> +	 * to reset all of the RX statistics registers at the same time.
> +	 * This bit is selfclearing.
> +	 */
> +	(*hw->f_mac_write)(hw,
> +			tmp,
> +			IPN3KE_25G_RX_STATISTICS_CONFIG,
> +			port_id,
> +			0);
> +
> +	while (tmp & 0x00000001) {
> +		tmp = 0x00000000;
> +		(*hw->f_mac_read)(hw,
> +				&tmp,
> +				IPN3KE_25G_RX_STATISTICS_CONFIG,
> +				port_id,
> +				0);
> +		if (tmp & 0x00000001)
> +			usleep(5);
> +		else
> +			return;
> +	}
> +}
> +
> +static int
> +ipn3ke_read_10G_Lineside_stats_registers
> +(struct ipn3ke_hw *hw,
> +uint16_t port_id,
> +struct ipn3ke_rpst_hw_port_stats *hw_stats,
> +struct rte_eth_stats *stats)
> +{
> +	uint32_t statistics_lo = 0;
> +	uint32_t statistics_hi = 0;
> +	uint64_t statistics = 0;
> +
> +	memset(hw_stats, 0, sizeof(*hw_stats));
> +	memset(stats, 0, sizeof(*stats));
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *that are successfully transmitted, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->opackets = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *that are successfully received, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ipackets = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *transmitted with error, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->oerrors = statistics;
> +	hw_stats->eth.tx_errors = statistics;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *received with error, including control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ierrors = statistics;
> +	hw_stats->eth.rx_discards = statistics;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of RX frames with CRC error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->crc_errors = statistics;
> +
> +	/*64-bit statistics counter that collects the payload length,
> +	 *including the bytes in control frames.
> +	 *The payload length is the number of data and padding bytes
> +	 *transmitted.
> +	 *If the tx_vlan_detection[0] register bit is set to 1,
> +	 *the VLAN and stacked VLAN tags are counted as part of
> +	 *the TX payload.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->obytes = statistics;
> +	hw_stats->eth.tx_bytes = statistics;
> +
> +	/*64-bit statistics counter that collects the payload length,
> +	 *including the bytes in control frames.
> +	 *The payload length is the number of data and padding bytes
> +	 *received.
> +	 *If the rx_vlan_detection[0] register bit is set to 1,
> +	 *the VLAN and stacked VLAN tags are counted as part of
> +	 *the RX payload.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	stats->ibytes = statistics;
> +	hw_stats->eth.rx_bytes = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid pause frames transmitted.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid pause frames received.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *transmitted that are invalid and with error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of frames
> +	 *received that are invalid and with error.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good unicast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good unicast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *unicast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *unicast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good multicast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good multicast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *multicast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of multicast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good broadcast frames transmitted,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *good broadcast frames received,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast = statistics;
> +
> +	/*36-bit statistics counter that collects the number
> +	 *of broadcast frames transmitted with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *broadcast frames received with error,
> +	 *excluding control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*64-bit statistics counter that collects the total number of
> +	 *octets transmitted.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*64-bit statistics counter that collects the total number of
> +	 *octets received.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *good, errored, and invalid frames transmitted.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *good, errored, and invalid frames received.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *undersized TX frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *undersized RX frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_undersize = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames whose length exceeds the maximum frame length
> +	 *specified.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames whose length exceeds the maximum frame length
> +	 *specified.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_oversize = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *64-byte TX frames,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_64 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *64-byte RX frames,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_64 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 65 and 127 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_65_127 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 65 and 127 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_65_127 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 128 and 255 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_128_255 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 128 and 255 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_128_255 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 256 and 511 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_256_511 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 256 and 511 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_256_511 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 512 and 1023 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_512_1023 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 512 and 1023 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_512_1023 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames between the length of 1024 and 1518 bytes,
> +	 *including the CRC field but
> +	 *excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
> +		port_id,
> +		0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
> +		port_id,
> +		0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1024_1518 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames between the length of 1024 and 1518 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
> +		port_id,
> +		0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
> +		port_id,
> +		0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_1024_1518 = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *TX frames equal or more than the length of 1,519 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good, errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->tx_size_1519_to_max = statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames equal or more than the length of 1,519 bytes,
> +	 *including the CRC field
> +	 *but excluding the preamble and SFD bytes.
> +	 *This count includes good,
> +	 *errored, and invalid frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->rx_size_big = statistics;
> +
> +	/*36-bit statistics counter that collects the total number of
> +	 *RX frames with length less than 64 bytes and CRC error.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *oversized RX frames with CRC error.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *RX frames with CRC error,
> +	 *whose length is between 64 and the maximum frame length
> +	 *specified in the register.
> +	 *The MAC does not drop these frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX unicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_unicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX unicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_unicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX multicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_multicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX multicast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_multicast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX broadcast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.tx_broadcast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX broadcast control frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +
> 	IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +	hw_stats->eth.rx_broadcast += statistics;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid TX PFC frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
> +	/*36-bit statistics counter that collects the number of
> +	 *valid RX PFC frames.
> +	 */
> +	statistics_lo = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_lo,
> +			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
> +			port_id,
> +			0);
> +	statistics_hi = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +			&statistics_hi,
> +			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
> +			port_id,
> +			0);
> +	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
> +	statistics = 0x0000000000000000;
> +	statistics += statistics_hi;
> +	statistics = statistics << IPN3KE_REGISTER_WIDTH;
> +	statistics += statistics_lo;
> +
>  	return 0;
>  }
> 
>  static void
> -ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)
> +ipn3ke_rpst_10G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp;
> +
> +	/*Bit [0]: Set this register to 1 to clear all TX statistics
> +	 *counters.
> +	 *The IP core clears this bit when all counters are cleared.
> +	 *Bits [31:1]: Reserved.
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_10G_TX_STATS_CLR,
> +		port_id,
> +		0);
> +	tmp |= 0x00000001;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_10G_TX_STATS_CLR,
> +		port_id,
> +		0);
> +}
> +
> +static void
> +ipn3ke_rpst_10G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
> +uint16_t port_id)
> +{
> +	uint32_t tmp;
> +
> +	/*Bit [0]: Set this register to 1 to clear all RX statistics
> +	 *counters.
> +	 *The IP core clears this bit when all counters are cleared.
> +	 *Bits [31:1]: Reserved
> +	 */
> +	tmp = 0x00000000;
> +	(*hw->f_mac_read)(hw,
> +		&tmp,
> +		IPN3KE_10G_RX_STATS_CLR,
> +		port_id,
> +		0);
> +	tmp |= 0x00000001;
> +	(*hw->f_mac_write)(hw,
> +		tmp,
> +		IPN3KE_10G_RX_STATS_CLR,
> +		port_id,
> +		0);
> +}
> +
> +static void
> +ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
> +{
> +	uint16_t port_id = 0;
> +	char *ch;
> +	int cnt = 0;
> +	struct rte_afu_device *afu_dev = NULL;
> +	struct ipn3ke_hw *hw = NULL;
> +
> +	if (!ethdev) {
> +		IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
> +		return;
> +	}
> +
> +	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
> +	if (!afu_dev) {
> +		IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
> +		return;
> +	}
> +
> +	if (!afu_dev->shared.data) {
> +		IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
> +		return;
> +	}
> +
> +	hw = afu_dev->shared.data;
> +
> +	ch = ethdev->data->name;
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
> +		return;
> +	}
> +	while (ch) {
> +		if (*ch == '_')
> +			cnt++;
> +		ch++;
> +		if (cnt == 3)
> +			break;
> +	}
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev
> name!");
> +		return;
> +	}
> +	port_id = atoi(ch);
> +
> +	if (hw->retimer.mac_type ==
> IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
> +		ipn3ke_rpst_25G_NICside_TX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_25G_NICside_RX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_25G_Lineside_TX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_25G_Lineside_RX_stats_reset(hw, port_id);
> +	} else if (hw->retimer.mac_type ==
> +			IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
> +		ipn3ke_rpst_10G_NICside_TX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_10G_NICside_RX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_10G_Lineside_TX_stats_reset(hw, port_id);
> +		ipn3ke_rpst_10G_Lineside_RX_stats_reset(hw, port_id);
> +	}
> +}
> +
> +static int
> +ipn3ke_rpst_stats_get
> +(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
>  {
> +	uint16_t port_id = 0;
> +	char *ch;
> +	int cnt = 0;
> +	int i = 0;
> +	struct rte_afu_device *afu_dev = NULL;
> +	struct ipn3ke_hw *hw = NULL;
> +	struct ipn3ke_rpst_hw_port_stats hw_stats;
> +
> +	if (!ethdev) {
> +		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is
> NULL");
> +		return -EINVAL;
> +	}
> +	if (!stats) {
> +		IPN3KE_AFU_PMD_ERR("Address to return statistics is
> NULL!");
> +		return -EINVAL;
> +	}
> +
> +	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
> +	if (!afu_dev) {
> +		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
> +		return -EINVAL;
> +	}
> +
> +	if (!afu_dev->shared.data) {
> +		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is
> NULL!");
> +		return -EINVAL;
> +	}
> +
> +	hw = afu_dev->shared.data;
> +
> +	ch = ethdev->data->name;
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
> +		return -EINVAL;
> +	}
> +	while (ch) {
> +		if (*ch == '_')
> +			cnt++;
> +		ch++;
> +		if (cnt == 3)
> +			break;
> +	}
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev
> name!");
> +		return -EINVAL;
> +	}
> +	port_id = atoi(ch);
> +
> +	if (hw->retimer.mac_type ==
> IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
> +		ipn3ke_read_25G_Lineside_stats_registers(hw,
> +							port_id,
> +							&hw_stats);
> +
> +		stats->ipackets  = hw_stats.rx_size_64
> +					+ hw_stats.rx_size_65_127
> +					+ hw_stats.rx_size_128_255
> +					+ hw_stats.rx_size_256_511
> +					+ hw_stats.rx_size_512_1023
> +					+ hw_stats.rx_size_1024_1518
> +					+ hw_stats.rx_size_big
> +					+ hw_stats.rx_undersize
> +					+ hw_stats.rx_fragments
> +					+ hw_stats.rx_oversize
> +					+ hw_stats.rx_jabber;
> +		stats->opackets  = hw_stats.tx_size_64
> +					+ hw_stats.tx_size_65_127
> +					+ hw_stats.tx_size_128_255
> +					+ hw_stats.tx_size_256_511
> +					+ hw_stats.tx_size_512_1023
> +					+ hw_stats.tx_size_1024_1518
> +					+ hw_stats.tx_size_1519_to_max;
> +		stats->ibytes    = hw_stats.eth.rx_bytes;
> +		stats->obytes    = hw_stats.eth.tx_bytes;
> +		stats->imissed   = 0;
> +		stats->ierrors   = hw_stats.eth.rx_discards
> +					+ hw_stats.eth.rx_unknown_protocol;
> +		stats->oerrors   = hw_stats.eth.tx_discards
> +					+ hw_stats.eth.tx_errors;
> +		stats->rx_nombuf = 0;
> +		for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
> +			stats->q_ipackets[i] = 0;
> +			stats->q_opackets[i] = 0;
> +			stats->q_ibytes[i] = 0;
> +			stats->q_obytes[i] = 0;
> +			stats->q_errors[i] = 0;
> +		}
> +	} else {
> +		ipn3ke_read_10G_Lineside_stats_registers(hw,
> +							port_id,
> +							&hw_stats,
> +							stats);
> +	}
> +
> +	return 0;
> +}
> +
> +static int
> +ipn3ke_rpst_xstats_get
> +(struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
> +{
> +	uint16_t port_id = 0;
> +	char *ch = NULL;
> +	int cnt = 0;
> +	unsigned int i, count, prio;
> +	struct rte_afu_device *afu_dev = NULL;
> +	struct ipn3ke_hw *hw = NULL;
> +	struct ipn3ke_rpst_hw_port_stats hw_stats;
> +	struct rte_eth_stats stats;
> +
> +	if (!xstats)
> +		return 0;
> +
> +	if (!ethdev) {
> +		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is
> NULL");
> +		return -EINVAL;
> +	}
> +
> +	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
> +	if (!afu_dev) {
> +		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
> +		return -EINVAL;
> +	}
> +
> +	if (!afu_dev->shared.data) {
> +		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is
> NULL!");
> +		return -EINVAL;
> +	}
> +
> +	hw = afu_dev->shared.data;
> +
> +	ch = ethdev->data->name;
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
> +		return -EINVAL;
> +	}
> +	while (ch) {
> +		if (*ch == '_')
> +			cnt++;
> +		ch++;
> +		if (cnt == 3)
> +			break;
> +	}
> +	if (!ch) {
> +		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev
> name!");
> +		return -EINVAL;
> +	}
> +	port_id = atoi(ch);
> +
> +	count = ipn3ke_rpst_xstats_calc_num();
> +	if (n < count)
> +		return count;
> +
> +	if (hw->retimer.mac_type ==
> IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
> +		ipn3ke_read_25G_Lineside_stats_registers(hw,
> +							port_id,
> +							&hw_stats);
> +	} else {
> +		ipn3ke_read_10G_Lineside_stats_registers(hw,
> +							port_id,
> +							&hw_stats,
> +							&stats);
> +	}
> +
> +	count = 0;
> +
> +	/* Get stats from ipn3ke_rpst_stats */
> +	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
> +		xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
> +			+ ipn3ke_rpst_stats_strings[i].offset);
> +		xstats[count].id = count;
> +		count++;
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_hw_port */
> +	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
> +		xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
> +			ipn3ke_rpst_hw_port_strings[i].offset);
> +		xstats[count].id = count;
> +		count++;
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
> +	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
> +		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++)
> {
> +			xstats[count].value =
> +				*(uint64_t *)(((char *)(&hw_stats)) +
> +				ipn3ke_rpst_rxq_prio_strings[i].offset +
> +				(sizeof(uint64_t) * prio));
> +			xstats[count].id = count;
> +			count++;
> +		}
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_txq_prio */
> +	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
> +		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++)
> {
> +			xstats[count].value =
> +				*(uint64_t *)(((char *)(&hw_stats)) +
> +				ipn3ke_rpst_txq_prio_strings[i].offset +
> +				(sizeof(uint64_t) * prio));
> +			xstats[count].id = count;
> +			count++;
> +		}
> +	}
> +
> +	return count;
> +}
> +
> +static int
> +ipn3ke_rpst_xstats_get_names
> +(__rte_unused struct rte_eth_dev *dev,
> +struct rte_eth_xstat_name *xstats_names,
> +__rte_unused unsigned int limit)
> +{
> +	unsigned int count = 0;
> +	unsigned int i, prio;
> +
> +	if (!xstats_names)
> +		return ipn3ke_rpst_xstats_calc_num();
> +
> +	/* Note: limit checked in rte_eth_xstats_names() */
> +
> +	/* Get stats from ipn3ke_rpst_stats */
> +	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
> +		snprintf(xstats_names[count].name,
> +			 sizeof(xstats_names[count].name),
> +			 "%s",
> +			 ipn3ke_rpst_stats_strings[i].name);
> +		count++;
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_hw_port */
> +	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
> +		snprintf(xstats_names[count].name,
> +			 sizeof(xstats_names[count].name),
> +			 "%s",
> +			 ipn3ke_rpst_hw_port_strings[i].name);
> +		count++;
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
> +	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
> +		for (prio = 0; prio < 8; prio++) {
> +			snprintf(xstats_names[count].name,
> +				 sizeof(xstats_names[count].name),
> +				 "rx_priority%u_%s",
> +				 prio,
> +				 ipn3ke_rpst_rxq_prio_strings[i].name);
> +			count++;
> +		}
> +	}
> +
> +	/* Get individiual stats from ipn3ke_rpst_txq_prio */
> +	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
> +		for (prio = 0; prio < 8; prio++) {
> +			snprintf(xstats_names[count].name,
> +				 sizeof(xstats_names[count].name),
> +				 "tx_priority%u_%s",
> +				 prio,
> +				 ipn3ke_rpst_txq_prio_strings[i].name);
> +			count++;
> +		}
> +	}
> +	return count;
>  }
> 
>  static void
> --
> 1.8.3.1
Acked-by: Rosen Xu <rosen.xu@intel.com>

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2019-06-12  1:17       ` Xu, Rosen
@ 2019-06-18 11:59       ` Ferruh Yigit
  2019-06-18 12:39         ` Ferruh Yigit
  1 sibling, 1 reply; 47+ messages in thread
From: Ferruh Yigit @ 2019-06-18 11:59 UTC (permalink / raw)
  To: Andy Pei, dev; +Cc: rosen.xu

On 6/11/2019 10:48 AM, Andy Pei wrote:
> This patch implemente statistics read and reset
> function for ipn3ke.
> 
> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
> Cc: rosen.xu@intel.com
> 
> Signed-off-by: Andy Pei <andy.pei@intel.com>

<...>

> +#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
> +		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
> +
> +static uint32_t
> +ipn3ke_rpst_xstats_calc_num(void)
> +{
> +	return IPN3KE_RPST_ETH_XSTATS_CNT
> +		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
> +		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
> +			* IPN3KE_RPST_PRIO_XSTATS_CNT)
> +		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
> +			* IPN3KE_RPST_PRIO_XSTATS_CNT);
> +}
> +
> +#if 0

Please don't add "#if 0" to the code, if required you can delete the code, same
is valid for below one too.

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics
  2019-06-18 11:59       ` Ferruh Yigit
@ 2019-06-18 12:39         ` Ferruh Yigit
  2019-06-19  3:23           ` Pei, Andy
  0 siblings, 1 reply; 47+ messages in thread
From: Ferruh Yigit @ 2019-06-18 12:39 UTC (permalink / raw)
  To: Andy Pei, dev; +Cc: rosen.xu

On 6/18/2019 12:59 PM, Ferruh Yigit wrote:
> On 6/11/2019 10:48 AM, Andy Pei wrote:
>> This patch implemente statistics read and reset
>> function for ipn3ke.
>>
>> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
>> Cc: rosen.xu@intel.com
>>
>> Signed-off-by: Andy Pei <andy.pei@intel.com>
> 
> <...>
> 
>> +#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
>> +		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
>> +
>> +static uint32_t
>> +ipn3ke_rpst_xstats_calc_num(void)
>> +{
>> +	return IPN3KE_RPST_ETH_XSTATS_CNT
>> +		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
>> +		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
>> +			* IPN3KE_RPST_PRIO_XSTATS_CNT)
>> +		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
>> +			* IPN3KE_RPST_PRIO_XSTATS_CNT);
>> +}
>> +
>> +#if 0
> 
> Please don't add "#if 0" to the code, if required you can delete the code, same
> is valid for below one too.
> 

Also getting following build error in patch by patch build [1], please remind
that each individual patch should build successfully.


[1]
.../dpdk/drivers/net/ipn3ke/ipn3ke_ethdev.c: In function ‘ipn3ke_hw_init’:
.../dpdk/drivers/net/ipn3ke/ipn3ke_ethdev.c:248:4: error: implicit declaration
of function ‘ipn3ke_xmac_tx_clr_stcs’; did you mean
‘ipn3ke_xmac_tx_clr_25G_stcs’? [-Werror=implicit-function-declaration]
  248 |    ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
      |    ^~~~~~~~~~~~~~~~~~~~~~~
      |    ipn3ke_xmac_tx_clr_25G_stcs

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics
  2019-06-18 12:39         ` Ferruh Yigit
@ 2019-06-19  3:23           ` Pei, Andy
  0 siblings, 0 replies; 47+ messages in thread
From: Pei, Andy @ 2019-06-19  3:23 UTC (permalink / raw)
  To: Yigit, Ferruh, dev; +Cc: Xu, Rosen

Hi, Ferruh

I will fix this in next version.
Thanks


-----Original Message-----
From: Yigit, Ferruh 
Sent: Tuesday, June 18, 2019 8:40 PM
To: Pei, Andy <andy.pei@intel.com>; dev@dpdk.org
Cc: Xu, Rosen <rosen.xu@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2 4/4] net/ipn3ke: implementation of statistics

On 6/18/2019 12:59 PM, Ferruh Yigit wrote:
> On 6/11/2019 10:48 AM, Andy Pei wrote:
>> This patch implemente statistics read and reset function for ipn3ke.
>>
>> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
>> Cc: rosen.xu@intel.com
>>
>> Signed-off-by: Andy Pei <andy.pei@intel.com>
> 
> <...>
> 
>> +#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
>> +		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
>> +
>> +static uint32_t
>> +ipn3ke_rpst_xstats_calc_num(void)
>> +{
>> +	return IPN3KE_RPST_ETH_XSTATS_CNT
>> +		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
>> +		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
>> +			* IPN3KE_RPST_PRIO_XSTATS_CNT)
>> +		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
>> +			* IPN3KE_RPST_PRIO_XSTATS_CNT);
>> +}
>> +
>> +#if 0
> 
> Please don't add "#if 0" to the code, if required you can delete the 
> code, same is valid for below one too.
> 

Also getting following build error in patch by patch build [1], please remind that each individual patch should build successfully.


[1]
.../dpdk/drivers/net/ipn3ke/ipn3ke_ethdev.c: In function ‘ipn3ke_hw_init’:
.../dpdk/drivers/net/ipn3ke/ipn3ke_ethdev.c:248:4: error: implicit declaration of function ‘ipn3ke_xmac_tx_clr_stcs’; did you mean ‘ipn3ke_xmac_tx_clr_25G_stcs’? [-Werror=implicit-function-declaration]
  248 |    ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
      |    ^~~~~~~~~~~~~~~~~~~~~~~
      |    ipn3ke_xmac_tx_clr_25G_stcs

^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address
  2019-06-11  9:48     ` [dpdk-dev] [PATCH v2 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
  2019-06-12  1:17       ` Xu, Rosen
@ 2019-06-19  8:49       ` Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
                           ` (2 more replies)
  1 sibling, 3 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-19  8:49 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC register address for statistics.
This patch implemente statistics registers for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 590 ++++++++++++++++++++++---------------
 1 file changed, 345 insertions(+), 245 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..61a5dbb 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
 	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR    0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
-
-/*tx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
-
-/*rx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
-
-/*tx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
-
-/*rx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
-
-/*tx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
-
-/*rx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
-
-/*tx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
-
-/*rx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
-
-/*tx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
-
-/*rx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
-
-/*tx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
-
-/*rx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
-
-/*tx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
-
-/*rx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
-
-/*tx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
-
-/*rx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
-
-/*tx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
-
-/*rx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
-
-/*tx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
-
-/*rx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
-
-/*tx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x0164
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
-
-/*rx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x01E4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
-
-/*tx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x0166
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
-
-/*rx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x01E6
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
-
-/*tx_stats_etherStatsPkts256to511Octet*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI  0x0168
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
-
-/*rx_stats_etherStatsPkts256to511Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI  0x01E8
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
-
-/*tx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x016A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
-
-/*rx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x01EA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
-
-/*tx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x016C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
-
-/*rx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x01EC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
-
-/*tx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x016E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
-
-/*rx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x01EE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
-
-/*rx_stats_etherStatsFragments*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
-
-/*rx_stats_etherStatsJabbers*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
-
-/*rx_stats_etherStatsCRCErr*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
-
-/*tx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
-
-/*rx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
-
-/*tx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
-
-/*rx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
-
-/*tx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
-
-/*rx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
-
-/*tx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
-
-/*rx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
+#define IPN3KE_REGISTER_WIDTH                                        32
+
+/*Bits[2:0]: Configuration of TX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *TX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot at
+ *the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP core
+ *clears the parity bit CNTR_TX_STATUS[0]. This bit
+ *(CNTR_TX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the TX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved
+ */
+#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
+#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the TX statistics registers are paused (while
+ *CNTR_TX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *TX statistics counters.
+ *Bits[31:2] are Reserved.
+ */
+#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
+#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
+#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
+#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
+#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
+#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
+#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
+#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
+#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
+#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
+#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
+#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
+#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
+#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
+#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
+#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
+#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
+#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
+#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
+#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
+#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
+#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
+#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
+#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
+
+/*Bits[2:0]: Configuration of RX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *RX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot
+ *at the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP
+ *core clears the parity bit CNTR_RX_STATUS[0]. This bit
+ *(CNTR_RX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the RX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved.
+ */
+#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
+#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the RX statistics registers are paused
+ *(while CNTR_RX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *RX statistics counters.
+ *Bits [31:2] are Reserved
+ */
+#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
+#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
+#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
+#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
+#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
+#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
+#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
+#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
+#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
+#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
+#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
+#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
+#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
+#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
+#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
+#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
+#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
+#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
+#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
+#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
+#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
+#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
+#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
+#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
+
+#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
+
+#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
+#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
+#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
+#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x014A
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x014B
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x01CA
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x01CB
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO                      0x014E
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO                      0x01CE
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI                      0x01CF
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO                     0x0150
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI                     0x0151
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO                     0x01D0
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI                     0x01D1
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO                    0x0152
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI                    0x0153
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO                    0x01D2
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI                    0x01D3
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO                   0x0154
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI                   0x0155
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO                   0x01D4
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI                   0x01D5
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO                    0x0156
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI                    0x0157
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO                    0x01D6
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI                    0x01D7
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO                   0x0158
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI                   0x0159
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO                   0x01D8
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI                   0x01D9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO                    0x015A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI                    0x015B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO                    0x01DA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI                    0x01DB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x015E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x015F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x01DE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x01DF
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x0160
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x0161
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x01E1
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x0162
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x0163
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x01E3
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x0164
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x0165
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x01E5
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x0166
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x0167
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x01E6
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x01E7
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x0168
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x0169
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x01E8
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x01E9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x016A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x016B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x01EA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x01EB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x016C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x016D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x01EC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x01ED
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x016E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x016F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x01EE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x01EF
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO                 0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI                 0x01F1
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO                   0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI                   0x01F3
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO                   0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI                   0x01F5
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x0176
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x0177
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x01F6
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x01F7
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x0178
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x0179
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x01F8
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x01F9
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x017A
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x017B
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x01FA
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x01FB
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x017C
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x017D
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x01FC
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x01FD
 
 static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
 		uint32_t mac_num, uint32_t eth_group_sel)
@@ -945,31 +1004,72 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct ipn3ke_hw *hw,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_TX_CLR_STCS (1 & \
-	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+}
 
+static inline void ipn3ke_xmac_rx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_RX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_TX_CLR_STCS,
-					IPN3KE_MAC_TX_STATS_CLR,
+					tmp,
+					IPN3KE_10G_RX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_RX_CLR_STCS (1 & \
-	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp = 0x00000001;
 
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_RX_CLR_STCS,
-					IPN3KE_MAC_RX_STATS_CLR,
+					tmp,
+					IPN3KE_25G_TX_STATISTICS_CONFIG,
 					mac_num,
 					eth_group_sel);
 }
 
+static inline void ipn3ke_xmac_rx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_RX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
 
 #endif /* _IPN3KE_ETHDEV_H_ */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v3 2/4] net/ipn3ke: delete MAC register address mask
  2019-06-19  8:49       ` [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address Andy Pei
@ 2019-06-19  8:49         ` Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-19  8:49 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

original code is compatible with older device,
whose mac register address is no more than 10 bits.
Now we have mac register address longer than 10 bits,
so we just delete the mask here.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..8d3084d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -48,7 +48,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = RCMD | target_addr << 32;
@@ -86,7 +85,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = WCMD | target_addr << 32 | wr_data;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v3 3/4] net/ipn3ke: clear statistics when init and start dev
  2019-06-19  8:49       ` [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
@ 2019-06-19  8:49         ` Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-19  8:49 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

clear line side and NIC side statistics registers
when HW init and uinit, and when dev start.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59 ++++++++++++++++++++++++++++-----
 drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
 2 files changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 8d3084d..27ebfb5 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -244,11 +244,33 @@
 			/* Enable the RX path */
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 
@@ -291,11 +313,32 @@
 			/* Disable the RX path */
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index f4529f6..b166b8f 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -159,11 +159,30 @@
 		/* Enable the RX path */
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
-		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
-		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics
  2019-06-19  8:49       ` [dpdk-dev] [PATCH v3 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
@ 2019-06-19  8:49         ` Andy Pei
  2019-06-19  9:05           ` David Marchand
                             ` (2 more replies)
  2 siblings, 3 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-19  8:49 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

This patch implemente statistics read and reset
function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_representor.c | 3440 ++++++++++++++++++++++++++++++-
 1 file changed, 3431 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index b166b8f..ed82ee7 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include <stdint.h>
+#include <unistd.h>
 
 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -297,31 +298,3452 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+	uint64_t tx_bytes;               /* gotc */
+	uint64_t tx_multicast;           /* mptc */
+	uint64_t tx_broadcast;           /* bptc */
+	uint64_t tx_unicast;             /* uptc */
+	uint64_t tx_discards;            /* tdpc */
+	uint64_t tx_errors;              /* tepc */
+	uint64_t rx_bytes;               /* gorc */
+	uint64_t rx_multicast;           /* mprc */
+	uint64_t rx_broadcast;           /* bprc */
+	uint64_t rx_unicast;             /* uprc */
+	uint64_t rx_discards;            /* rdpc */
+	uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+	char name[RTE_ETH_XSTATS_NAME_SIZE];
+	unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_multicast)},
+	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_broadcast)},
+	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_unicast)},
+	{"tx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_discards)},
+	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_multicast)},
+	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_broadcast)},
+	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unicast)},
+	{"rx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_discards)},
+	{"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+		sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+	/* eth stats collected by the port */
+	struct ipn3ke_rpst_eth_stats eth;
+
+	/* additional port specific stats */
+	uint64_t tx_dropped_link_down;
+	uint64_t crc_errors;
+	uint64_t illegal_bytes;
+	uint64_t error_bytes;
+	uint64_t mac_local_faults;
+	uint64_t mac_remote_faults;
+	uint64_t rx_length_errors;
+	uint64_t link_xon_rx;
+	uint64_t link_xoff_rx;
+	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t link_xon_tx;
+	uint64_t link_xoff_tx;
+	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t rx_size_64;
+	uint64_t rx_size_65_127;
+	uint64_t rx_size_128_255;
+	uint64_t rx_size_256_511;
+	uint64_t rx_size_512_1023;
+	uint64_t rx_size_1024_1518;
+	uint64_t rx_size_big;
+	uint64_t rx_undersize;
+	uint64_t rx_fragments;
+	uint64_t rx_oversize;
+	uint64_t rx_jabber;
+	uint64_t tx_size_64;
+	uint64_t tx_size_65_127;
+	uint64_t tx_size_128_255;
+	uint64_t tx_size_256_511;
+	uint64_t tx_size_512_1023;
+	uint64_t tx_size_1024_1518;
+	uint64_t tx_size_1519_to_max;
+	uint64_t mac_short_packet_dropped;
+	uint64_t checksum_error;
+	/* flow director stats */
+	uint64_t fd_atr_match;
+	uint64_t fd_sb_match;
+	uint64_t fd_atr_tunnel_match;
+	uint32_t fd_atr_status;
+	uint32_t fd_sb_status;
+	/* EEE LPI */
+	uint32_t tx_lpi_status;
+	uint32_t rx_lpi_status;
+	uint64_t tx_lpi_count;
+	uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+	{"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+						tx_dropped_link_down)},
+	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+						crc_errors)},
+	{"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+						illegal_bytes)},
+	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						error_bytes)},
+	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_local_faults)},
+	{"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_remote_faults)},
+	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_length_errors)},
+	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_tx)},
+	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_rx)},
+	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_tx)},
+	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_rx)},
+	{"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_64)},
+	{"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_65_127)},
+	{"rx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_128_255)},
+	{"rx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_256_511)},
+	{"rx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_512_1023)},
+	{"rx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_1024_1518)},
+	{"rx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_big)},
+	{"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_undersize)},
+	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_oversize)},
+	{"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       mac_short_packet_dropped)},
+	{"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_fragments)},
+	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_jabber)},
+	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_size_64)},
+	{"tx_size_65_to_127_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_65_127)},
+	{"tx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_128_255)},
+	{"tx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_256_511)},
+	{"tx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_512_1023)},
+	{"tx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1024_1518)},
+	{"tx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1519_to_max)},
+	{"rx_flow_director_atr_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_atr_match)},
+	{"rx_flow_director_sb_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_sb_match)},
+	{"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_status)},
+	{"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_status)},
+	{"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_count)},
+	{"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_count)},
+};
+
+#define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
+		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_rxq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_rx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_rx)},
+};
+
+#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_txq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_tx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_tx)},
+	{"xon_to_xoff_packets",       offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_2_xoff)},
+};
+
+#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
+
+static uint32_t
+ipn3ke_rpst_xstats_calc_num(void)
+{
+	return IPN3KE_RPST_ETH_XSTATS_CNT
+		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
+		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT)
+		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT);
+}
+
+static void
+ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+}
+
 static int
-ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
-	__rte_unused struct rte_eth_stats *stats)
+ipn3ke_read_25G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		0);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of 64-byte transmitted frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 += statistics;
+
+	/* Number of transmitted frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 += statistics;
+
+	/* Number of transmitted frames between 128 and 255 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 += statistics;
+
+	/* Number of transmitted frames between 256 and 511 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 += statistics;
+
+	/* Number of transmitted frames between 512 and 1023 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 += statistics;
+
+	/* Number of transmitted frames between 1024 and 1518 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 += statistics;
+
+	/*Number of transmitted frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max += statistics;
+
+	/*Number of oversized frames (frames with more bytes than the
+	 *number specified in the MAX_TX_SIZE_CONFIG register)
+	 *transmitted
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/* Number of valid pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted runt packets. The IP core does not
+	 *transmit frames of length less than nine bytes.
+	 *The IP core pads frames of length nine bytes to 64 bytes to
+	 *extend them to 64 bytes. Therefore, this counter does not
+	 *increment in normal operating conditions.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the TX MAC (bit[1]
+	 *of the TX_MAC_CONTROL register at offset 0x40A has
+	 *the value of 1), the IP core counts the VLAN header bytes
+	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
+	 *as payload bytes. This register is compliant with
+	 *the requirements for aOctetsTransmittedOK in section
+	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_bytes += statistics;
+
+	/*Number of transmitted bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors. This register is
+	 *compliant with the requirements for ifOutOctets in RFC3635
+	 *(Managed Objects for Ethernet-like Interface Types)
+	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
+	 *Management Information Base (RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/* Number of received oversized frames reporting a CRC error */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/*Number of received packets with FCS errors.
+	 *This register maintains a count of the number of pulses
+	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of received frames with a frame of length at least 64
+	 *with CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored multicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored broadcast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored unicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored pause frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of 64-byte received frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 += statistics;
+
+	/*Number of received frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 += statistics;
+
+	/*Number of received frames between 128 and 255 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 += statistics;
+
+	/*Number of received frames between 256 and 511 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 += statistics;
+
+	/*Number of received frames between 512 and 1023 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 += statistics;
+
+	/*Number of received frames between 1024 and 1518 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 += statistics;
+
+	/*Number of received frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big += statistics;
+
+	/*Number of oversized frames (frames with more bytes
+	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
+	 *received
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_jabber += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of received pause frames, with or without error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received runt packets. A runt is a packet of size
+	 *less than 64 bytes but greater than eight bytes.
+	 *If a packet is eight bytes or smaller, it is considered
+	 *a decoding error and not a runt frame, and the IP core
+	 *does not flag it nor count it as a runt.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
+	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
+	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
+	 *8 bytes for stacked VLAN) as payload bytes.
+	 *This register is compliant with the requirements for
+	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
+	 *802.3-2008
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_bytes += statistics;
+
+	/*Number of received bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors.
+	 *This register is compliant with the requirements for
+	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
+	 *Interface Types) and RX etherStatsOctets in RFC2819
+	 *(Remote Network Monitoring Management Information Base
+	 *(RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*resume Tx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	/*resume Rx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_25G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,
-	__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned int n)
+ipn3ke_read_10G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats,
+struct rte_eth_stats *stats)
 {
+	uint32_t statistics_lo = 0;
+	uint32_t statistics_hi = 0;
+	uint64_t statistics = 0;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+	memset(stats, 0, sizeof(*stats));
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully transmitted, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->opackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully received, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ipackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->oerrors = statistics;
+	hw_stats->eth.tx_errors = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ierrors = statistics;
+	hw_stats->eth.rx_discards = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of RX frames with CRC error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->crc_errors = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *transmitted.
+	 *If the tx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the TX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->obytes = statistics;
+	hw_stats->eth.tx_bytes = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *received.
+	 *If the rx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the RX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ibytes = statistics;
+	hw_stats->eth.rx_bytes = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *multicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number
+	 *of multicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of broadcast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *broadcast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets transmitted.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets received.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized TX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized RX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_undersize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_oversize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte TX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte RX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field but
+	 *excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good,
+	 *errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big = statistics;
+
+	/*36-bit statistics counter that collects the total number of
+	 *RX frames with length less than 64 bytes and CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *oversized RX frames with CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames with CRC error,
+	 *whose length is between 64 and the maximum frame length
+	 *specified in the register.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_10G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_10G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
+{
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
+		return;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
+		return;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
+		return;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_rpst_25G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_RX_stats_reset(hw, port_id);
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
+		ipn3ke_rpst_10G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_RX_stats_reset(hw, port_id);
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
-		__rte_unused struct rte_eth_xstat_name *xstats_names,
-		__rte_unused unsigned int limit)
+ipn3ke_rpst_stats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
 {
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	int i = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+	if (!stats) {
+		IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+
+		stats->ipackets  = hw_stats.rx_size_64
+					+ hw_stats.rx_size_65_127
+					+ hw_stats.rx_size_128_255
+					+ hw_stats.rx_size_256_511
+					+ hw_stats.rx_size_512_1023
+					+ hw_stats.rx_size_1024_1518
+					+ hw_stats.rx_size_big
+					+ hw_stats.rx_undersize
+					+ hw_stats.rx_fragments
+					+ hw_stats.rx_oversize
+					+ hw_stats.rx_jabber;
+		stats->opackets  = hw_stats.tx_size_64
+					+ hw_stats.tx_size_65_127
+					+ hw_stats.tx_size_128_255
+					+ hw_stats.tx_size_256_511
+					+ hw_stats.tx_size_512_1023
+					+ hw_stats.tx_size_1024_1518
+					+ hw_stats.tx_size_1519_to_max;
+		stats->ibytes    = hw_stats.eth.rx_bytes;
+		stats->obytes    = hw_stats.eth.tx_bytes;
+		stats->imissed   = 0;
+		stats->ierrors   = hw_stats.eth.rx_discards
+					+ hw_stats.eth.rx_unknown_protocol;
+		stats->oerrors   = hw_stats.eth.tx_discards
+					+ hw_stats.eth.tx_errors;
+		stats->rx_nombuf = 0;
+		for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
+			stats->q_ipackets[i] = 0;
+			stats->q_opackets[i] = 0;
+			stats->q_ibytes[i] = 0;
+			stats->q_obytes[i] = 0;
+			stats->q_errors[i] = 0;
+		}
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							stats);
+	}
+
 	return 0;
 }
 
-static void
-ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)
+static int
+ipn3ke_rpst_xstats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
+{
+	uint16_t port_id = 0;
+	char *ch = NULL;
+	int cnt = 0;
+	unsigned int i, count, prio;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+	struct rte_eth_stats stats;
+
+	if (!xstats)
+		return 0;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	count = ipn3ke_rpst_xstats_calc_num();
+	if (n < count)
+		return count;
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							&stats);
+	}
+
+	count = 0;
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
+			+ ipn3ke_rpst_stats_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
+			ipn3ke_rpst_hw_port_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_rxq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_txq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	return count;
+}
+
+static int
+ipn3ke_rpst_xstats_get_names
+(__rte_unused struct rte_eth_dev *dev,
+struct rte_eth_xstat_name *xstats_names,
+__rte_unused unsigned int limit)
 {
+	unsigned int count = 0;
+	unsigned int i, prio;
+
+	if (!xstats_names)
+		return ipn3ke_rpst_xstats_calc_num();
+
+	/* Note: limit checked in rte_eth_xstats_names() */
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_stats_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_hw_port_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "rx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_rxq_prio_strings[i].name);
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "tx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_txq_prio_strings[i].name);
+			count++;
+		}
+	}
+	return count;
 }
 
 static void
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics Andy Pei
@ 2019-06-19  9:05           ` David Marchand
  2019-06-25  7:09             ` Pei, Andy
  2019-06-25  7:50           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-25  8:00           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2 siblings, 1 reply; 47+ messages in thread
From: David Marchand @ 2019-06-19  9:05 UTC (permalink / raw)
  To: Andy Pei; +Cc: dev, Rosen Xu

On Wed, Jun 19, 2019 at 10:56 AM Andy Pei <andy.pei@intel.com> wrote:

> This patch implemente statistics read and reset
> function for ipn3ke.
>
> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
> Cc: rosen.xu@intel.com
>
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_representor.c | 3440
> ++++++++++++++++++++++++++++++-
>  1 file changed, 3431 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c
> b/drivers/net/ipn3ke/ipn3ke_representor.c
> index b166b8f..ed82ee7 100644
> --- a/drivers/net/ipn3ke/ipn3ke_representor.c
> +++ b/drivers/net/ipn3ke/ipn3ke_representor.c
> @@ -3,6 +3,7 @@
>   */
>
>  #include <stdint.h>
> +#include <unistd.h>
>
>  #include <rte_bus_pci.h>
>  #include <rte_ethdev.h>
> @@ -297,31 +298,3452 @@
>  {
>  }
>
> +/* Statistics collected by each port, VSI, VEB, and S-channel */
> +struct ipn3ke_rpst_eth_stats {
> +       uint64_t tx_bytes;               /* gotc */
> +       uint64_t tx_multicast;           /* mptc */
> +       uint64_t tx_broadcast;           /* bptc */
> +       uint64_t tx_unicast;             /* uptc */
> +       uint64_t tx_discards;            /* tdpc */
> +       uint64_t tx_errors;              /* tepc */
> +       uint64_t rx_bytes;               /* gorc */
> +       uint64_t rx_multicast;           /* mprc */
> +       uint64_t rx_broadcast;           /* bprc */
> +       uint64_t rx_unicast;             /* uprc */
> +       uint64_t rx_discards;            /* rdpc */
> +       uint64_t rx_unknown_protocol;    /* rupp */
> +};
> +
> +/* store statistics names and its offset in stats structure */
> +struct ipn3ke_rpst_xstats_name_offset {
> +       char name[RTE_ETH_XSTATS_NAME_SIZE];
> +       unsigned int offset;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_stats_strings[] = {
> +       {"tx_multicast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_multicast)},
> +       {"tx_broadcast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_broadcast)},
> +       {"tx_unicast_packets",            offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_unicast)},
> +       {"tx_dropped",                    offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_discards)},
> +       {"rx_multicast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_multicast)},
> +       {"rx_broadcast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_broadcast)},
> +       {"rx_unicast_packets",            offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_unicast)},
> +       {"rx_dropped",                    offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_discards)},
> +       {"rx_unknown_protocol_packets", offsetof(struct
> ipn3ke_rpst_eth_stats,
> +
>  rx_unknown_protocol)},
>

Please see recent fixes on i40e and ice.
tx_dropped -> tx_dropped_packets
rx_dropped -> rx_dropped_packets

https://git.dpdk.org/next/dpdk-next-net-intel/commit/?id=e61e25233e9dfcd5386d83ab988790d9d5bd9400


+};
> +
> +#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
> +               sizeof(ipn3ke_rpst_stats_strings[0]))
> +
> +#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
> +
> +/* Statistics collected by the MAC */
> +struct ipn3ke_rpst_hw_port_stats {
> +       /* eth stats collected by the port */
> +       struct ipn3ke_rpst_eth_stats eth;
> +
> +       /* additional port specific stats */
> +       uint64_t tx_dropped_link_down;
> +       uint64_t crc_errors;
> +       uint64_t illegal_bytes;
> +       uint64_t error_bytes;
> +       uint64_t mac_local_faults;
> +       uint64_t mac_remote_faults;
> +       uint64_t rx_length_errors;
> +       uint64_t link_xon_rx;
> +       uint64_t link_xoff_rx;
> +       uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t link_xon_tx;
> +       uint64_t link_xoff_tx;
> +       uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t rx_size_64;
> +       uint64_t rx_size_65_127;
> +       uint64_t rx_size_128_255;
> +       uint64_t rx_size_256_511;
> +       uint64_t rx_size_512_1023;
> +       uint64_t rx_size_1024_1518;
> +       uint64_t rx_size_big;
> +       uint64_t rx_undersize;
> +       uint64_t rx_fragments;
> +       uint64_t rx_oversize;
> +       uint64_t rx_jabber;
> +       uint64_t tx_size_64;
> +       uint64_t tx_size_65_127;
> +       uint64_t tx_size_128_255;
> +       uint64_t tx_size_256_511;
> +       uint64_t tx_size_512_1023;
> +       uint64_t tx_size_1024_1518;
> +       uint64_t tx_size_1519_to_max;
> +       uint64_t mac_short_packet_dropped;
> +       uint64_t checksum_error;
> +       /* flow director stats */
> +       uint64_t fd_atr_match;
> +       uint64_t fd_sb_match;
> +       uint64_t fd_atr_tunnel_match;
> +       uint32_t fd_atr_status;
> +       uint32_t fd_sb_status;
> +       /* EEE LPI */
> +       uint32_t tx_lpi_status;
> +       uint32_t rx_lpi_status;
> +       uint64_t tx_lpi_count;
> +       uint64_t rx_lpi_count;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_hw_port_strings[] = {
> +       {"tx_link_down_dropped",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               tx_dropped_link_down)},
> +       {"rx_crc_errors",             offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               crc_errors)},
> +       {"rx_illegal_byte_errors",    offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               illegal_bytes)},
> +       {"rx_error_bytes",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               error_bytes)},
> +       {"mac_local_errors",          offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               mac_local_faults)},
> +       {"mac_remote_errors",         offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               mac_remote_faults)},
> +       {"rx_length_errors",          offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_length_errors)},
> +       {"tx_xon_packets",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xon_tx)},
> +       {"rx_xon_packets",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xon_rx)},
> +       {"tx_xoff_packets",           offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xoff_tx)},
> +       {"rx_xoff_packets",           offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xoff_rx)},
> +       {"rx_size_64_packets",        offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_size_64)},
> +       {"rx_size_65_to_127_packets", offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_size_65_127)},
> +       {"rx_size_128_to_255_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_128_255)},
> +       {"rx_size_256_to_511_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_256_511)},
> +       {"rx_size_512_to_1023_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_512_1023)},
> +       {"rx_size_1024_to_1518_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_1024_1518)},
> +       {"rx_size_1519_to_max_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_big)},
>

Just a note, but those stats won't work with the current way ovs looks at
per size counters.



+       {"rx_undersized_errors",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_undersize)},
> +       {"rx_oversize_errors",        offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_oversize)},
> +       {"rx_mac_short_dropped",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              mac_short_packet_dropped)},
> +       {"rx_fragmented_errors",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_fragments)},
> +       {"rx_jabber_errors",          offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_jabber)},
> +       {"tx_size_64_packets",        offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              tx_size_64)},
> +       {"tx_size_65_to_127_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_65_127)},
> +       {"tx_size_128_to_255_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_128_255)},
> +       {"tx_size_256_to_511_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_256_511)},
> +       {"tx_size_512_to_1023_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_512_1023)},
> +       {"tx_size_1024_to_1518_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_1024_1518)},
> +       {"tx_size_1519_to_max_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        tx_size_1519_to_max)},
>

Idem rx.


+       {"rx_flow_director_atr_match_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        fd_atr_match)},
> +       {"rx_flow_director_sb_match_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        fd_sb_match)},
> +       {"tx_low_power_idle_status",  offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              tx_lpi_status)},
> +       {"rx_low_power_idle_status",  offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_lpi_status)},
> +       {"tx_low_power_idle_count",   offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              tx_lpi_count)},
> +       {"rx_low_power_idle_count",   offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                              rx_lpi_count)},
> +};
>
>
[snip]

-- 
David Marchand

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics
  2019-06-19  9:05           ` David Marchand
@ 2019-06-25  7:09             ` Pei, Andy
  2019-06-25  7:16               ` David Marchand
  0 siblings, 1 reply; 47+ messages in thread
From: Pei, Andy @ 2019-06-25  7:09 UTC (permalink / raw)
  To: David Marchand; +Cc: dev, Xu, Rosen

Hi Marchand,

Reply in line.

Best Regards,

From: David Marchand [mailto:david.marchand@redhat.com]
Sent: Wednesday, June 19, 2019 5:06 PM
To: Pei, Andy <andy.pei@intel.com>
Cc: dev <dev@dpdk.org>; Xu, Rosen <rosen.xu@intel.com>
Subject: Re: [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics



On Wed, Jun 19, 2019 at 10:56 AM Andy Pei <andy.pei@intel.com<mailto:andy.pei@intel.com>> wrote:
This patch implemente statistics read and reset
function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com<mailto:rosen.xu@intel.com>

Signed-off-by: Andy Pei <andy.pei@intel.com<mailto:andy.pei@intel.com>>
---
 drivers/net/ipn3ke/ipn3ke_representor.c | 3440 ++++++++++++++++++++++++++++++-
 1 file changed, 3431 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index b166b8f..ed82ee7 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */

 #include <stdint.h>
+#include <unistd.h>

 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -297,31 +298,3452 @@
 {
 }

+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+       uint64_t tx_bytes;               /* gotc */
+       uint64_t tx_multicast;           /* mptc */
+       uint64_t tx_broadcast;           /* bptc */
+       uint64_t tx_unicast;             /* uptc */
+       uint64_t tx_discards;            /* tdpc */
+       uint64_t tx_errors;              /* tepc */
+       uint64_t rx_bytes;               /* gorc */
+       uint64_t rx_multicast;           /* mprc */
+       uint64_t rx_broadcast;           /* bprc */
+       uint64_t rx_unicast;             /* uprc */
+       uint64_t rx_discards;            /* rdpc */
+       uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+       char name[RTE_ETH_XSTATS_NAME_SIZE];
+       unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+       {"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       tx_multicast)},
+       {"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       tx_broadcast)},
+       {"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       tx_unicast)},
+       {"tx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       tx_discards)},
+       {"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       rx_multicast)},
+       {"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       rx_broadcast)},
+       {"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       rx_unicast)},
+       {"rx_dropped",                    offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       rx_discards)},
+       {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+                                                       rx_unknown_protocol)},

Please see recent fixes on i40e and ice.
tx_dropped -> tx_dropped_packets
rx_dropped -> rx_dropped_packets

https://git.dpdk.org/next/dpdk-next-net-intel/commit/?id=e61e25233e9dfcd5386d83ab988790d9d5bd9400


>>>> Do  this in v4.

+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+               sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+       /* eth stats collected by the port */
+       struct ipn3ke_rpst_eth_stats eth;
+
+       /* additional port specific stats */
+       uint64_t tx_dropped_link_down;
+       uint64_t crc_errors;
+       uint64_t illegal_bytes;
+       uint64_t error_bytes;
+       uint64_t mac_local_faults;
+       uint64_t mac_remote_faults;
+       uint64_t rx_length_errors;
+       uint64_t link_xon_rx;
+       uint64_t link_xoff_rx;
+       uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+       uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+       uint64_t link_xon_tx;
+       uint64_t link_xoff_tx;
+       uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+       uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+       uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+       uint64_t rx_size_64;
+       uint64_t rx_size_65_127;
+       uint64_t rx_size_128_255;
+       uint64_t rx_size_256_511;
+       uint64_t rx_size_512_1023;
+       uint64_t rx_size_1024_1518;
+       uint64_t rx_size_big;
+       uint64_t rx_undersize;
+       uint64_t rx_fragments;
+       uint64_t rx_oversize;
+       uint64_t rx_jabber;
+       uint64_t tx_size_64;
+       uint64_t tx_size_65_127;
+       uint64_t tx_size_128_255;
+       uint64_t tx_size_256_511;
+       uint64_t tx_size_512_1023;
+       uint64_t tx_size_1024_1518;
+       uint64_t tx_size_1519_to_max;
+       uint64_t mac_short_packet_dropped;
+       uint64_t checksum_error;
+       /* flow director stats */
+       uint64_t fd_atr_match;
+       uint64_t fd_sb_match;
+       uint64_t fd_atr_tunnel_match;
+       uint32_t fd_atr_status;
+       uint32_t fd_sb_status;
+       /* EEE LPI */
+       uint32_t tx_lpi_status;
+       uint32_t rx_lpi_status;
+       uint64_t tx_lpi_count;
+       uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+       {"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               tx_dropped_link_down)},
+       {"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               crc_errors)},
+       {"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               illegal_bytes)},
+       {"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               error_bytes)},
+       {"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               mac_local_faults)},
+       {"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               mac_remote_faults)},
+       {"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               rx_length_errors)},
+       {"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               link_xon_tx)},
+       {"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               link_xon_rx)},
+       {"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               link_xoff_tx)},
+       {"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               link_xoff_rx)},
+       {"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               rx_size_64)},
+       {"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                               rx_size_65_127)},
+       {"rx_size_128_to_255_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        rx_size_128_255)},
+       {"rx_size_256_to_511_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        rx_size_256_511)},
+       {"rx_size_512_to_1023_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        rx_size_512_1023)},
+       {"rx_size_1024_to_1518_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        rx_size_1024_1518)},
+       {"rx_size_1519_to_max_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        rx_size_big)},

Just a note, but those stats won't work with the current way ovs looks at per size counters.

>>>> Just keep this in the same way with I40E currently.


+       {"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_undersize)},
+       {"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_oversize)},
+       {"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              mac_short_packet_dropped)},
+       {"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_fragments)},
+       {"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_jabber)},
+       {"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              tx_size_64)},
+       {"tx_size_65_to_127_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_65_127)},
+       {"tx_size_128_to_255_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_128_255)},
+       {"tx_size_256_to_511_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_256_511)},
+       {"tx_size_512_to_1023_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_512_1023)},
+       {"tx_size_1024_to_1518_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_1024_1518)},
+       {"tx_size_1519_to_max_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        tx_size_1519_to_max)},

Idem rx.


+       {"rx_flow_director_atr_match_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        fd_atr_match)},
+       {"rx_flow_director_sb_match_packets",
+                               offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                        fd_sb_match)},
+       {"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              tx_lpi_status)},
+       {"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_lpi_status)},
+       {"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              tx_lpi_count)},
+       {"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+                                              rx_lpi_count)},
+};

[snip]

--
David Marchand

^ permalink raw reply	[flat|nested] 47+ messages in thread

* Re: [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics
  2019-06-25  7:09             ` Pei, Andy
@ 2019-06-25  7:16               ` David Marchand
  2019-06-25  8:53                 ` Pei, Andy
  0 siblings, 1 reply; 47+ messages in thread
From: David Marchand @ 2019-06-25  7:16 UTC (permalink / raw)
  To: Pei, Andy; +Cc: dev, Xu, Rosen

On Tue, Jun 25, 2019 at 9:10 AM Pei, Andy <andy.pei@intel.com> wrote:

> *From:* David Marchand [mailto:david.marchand@redhat.com]
> *Sent:* Wednesday, June 19, 2019 5:06 PM
> *To:* Pei, Andy <andy.pei@intel.com>
> *Cc:* dev <dev@dpdk.org>; Xu, Rosen <rosen.xu@intel.com>
> *Subject:* Re: [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of
> statistics
>
>
>
>
>
>
>
> On Wed, Jun 19, 2019 at 10:56 AM Andy Pei <andy.pei@intel.com> wrote:
>
> This patch implemente statistics read and reset
> function for ipn3ke.
>
> Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
> Cc: rosen.xu@intel.com
>
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> ---
>  drivers/net/ipn3ke/ipn3ke_representor.c | 3440
> ++++++++++++++++++++++++++++++-
>  1 file changed, 3431 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c
> b/drivers/net/ipn3ke/ipn3ke_representor.c
> index b166b8f..ed82ee7 100644
> --- a/drivers/net/ipn3ke/ipn3ke_representor.c
> +++ b/drivers/net/ipn3ke/ipn3ke_representor.c
> @@ -3,6 +3,7 @@
>   */
>
>  #include <stdint.h>
> +#include <unistd.h>
>
>  #include <rte_bus_pci.h>
>  #include <rte_ethdev.h>
> @@ -297,31 +298,3452 @@
>  {
>  }
>
> +/* Statistics collected by each port, VSI, VEB, and S-channel */
> +struct ipn3ke_rpst_eth_stats {
> +       uint64_t tx_bytes;               /* gotc */
> +       uint64_t tx_multicast;           /* mptc */
> +       uint64_t tx_broadcast;           /* bptc */
> +       uint64_t tx_unicast;             /* uptc */
> +       uint64_t tx_discards;            /* tdpc */
> +       uint64_t tx_errors;              /* tepc */
> +       uint64_t rx_bytes;               /* gorc */
> +       uint64_t rx_multicast;           /* mprc */
> +       uint64_t rx_broadcast;           /* bprc */
> +       uint64_t rx_unicast;             /* uprc */
> +       uint64_t rx_discards;            /* rdpc */
> +       uint64_t rx_unknown_protocol;    /* rupp */
> +};
> +
> +/* store statistics names and its offset in stats structure */
> +struct ipn3ke_rpst_xstats_name_offset {
> +       char name[RTE_ETH_XSTATS_NAME_SIZE];
> +       unsigned int offset;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_stats_strings[] = {
> +       {"tx_multicast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_multicast)},
> +       {"tx_broadcast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_broadcast)},
> +       {"tx_unicast_packets",            offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_unicast)},
> +       {"tx_dropped",                    offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       tx_discards)},
> +       {"rx_multicast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_multicast)},
> +       {"rx_broadcast_packets",          offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_broadcast)},
> +       {"rx_unicast_packets",            offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_unicast)},
> +       {"rx_dropped",                    offsetof(struct
> ipn3ke_rpst_eth_stats,
> +                                                       rx_discards)},
> +       {"rx_unknown_protocol_packets", offsetof(struct
> ipn3ke_rpst_eth_stats,
> +
>  rx_unknown_protocol)},
>
>
>
> Please see recent fixes on i40e and ice.
>
> tx_dropped -> tx_dropped_packets
>
> rx_dropped -> rx_dropped_packets
>
>
>
>
> https://git.dpdk.org/next/dpdk-next-net-intel/commit/?id=e61e25233e9dfcd5386d83ab988790d9d5bd9400
>
>
>
>
>
> >>>> Do  this in v4.
>
>
>
> +};
> +
> +#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
> +               sizeof(ipn3ke_rpst_stats_strings[0]))
> +
> +#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
> +
> +/* Statistics collected by the MAC */
> +struct ipn3ke_rpst_hw_port_stats {
> +       /* eth stats collected by the port */
> +       struct ipn3ke_rpst_eth_stats eth;
> +
> +       /* additional port specific stats */
> +       uint64_t tx_dropped_link_down;
> +       uint64_t crc_errors;
> +       uint64_t illegal_bytes;
> +       uint64_t error_bytes;
> +       uint64_t mac_local_faults;
> +       uint64_t mac_remote_faults;
> +       uint64_t rx_length_errors;
> +       uint64_t link_xon_rx;
> +       uint64_t link_xoff_rx;
> +       uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t link_xon_tx;
> +       uint64_t link_xoff_tx;
> +       uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
> +       uint64_t rx_size_64;
> +       uint64_t rx_size_65_127;
> +       uint64_t rx_size_128_255;
> +       uint64_t rx_size_256_511;
> +       uint64_t rx_size_512_1023;
> +       uint64_t rx_size_1024_1518;
> +       uint64_t rx_size_big;
> +       uint64_t rx_undersize;
> +       uint64_t rx_fragments;
> +       uint64_t rx_oversize;
> +       uint64_t rx_jabber;
> +       uint64_t tx_size_64;
> +       uint64_t tx_size_65_127;
> +       uint64_t tx_size_128_255;
> +       uint64_t tx_size_256_511;
> +       uint64_t tx_size_512_1023;
> +       uint64_t tx_size_1024_1518;
> +       uint64_t tx_size_1519_to_max;
> +       uint64_t mac_short_packet_dropped;
> +       uint64_t checksum_error;
> +       /* flow director stats */
> +       uint64_t fd_atr_match;
> +       uint64_t fd_sb_match;
> +       uint64_t fd_atr_tunnel_match;
> +       uint32_t fd_atr_status;
> +       uint32_t fd_sb_status;
> +       /* EEE LPI */
> +       uint32_t tx_lpi_status;
> +       uint32_t rx_lpi_status;
> +       uint64_t tx_lpi_count;
> +       uint64_t rx_lpi_count;
> +};
> +
> +static const struct ipn3ke_rpst_xstats_name_offset
> +ipn3ke_rpst_hw_port_strings[] = {
> +       {"tx_link_down_dropped",      offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               tx_dropped_link_down)},
> +       {"rx_crc_errors",             offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               crc_errors)},
> +       {"rx_illegal_byte_errors",    offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               illegal_bytes)},
> +       {"rx_error_bytes",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               error_bytes)},
> +       {"mac_local_errors",          offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               mac_local_faults)},
> +       {"mac_remote_errors",         offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               mac_remote_faults)},
> +       {"rx_length_errors",          offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_length_errors)},
> +       {"tx_xon_packets",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xon_tx)},
> +       {"rx_xon_packets",            offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xon_rx)},
> +       {"tx_xoff_packets",           offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xoff_tx)},
> +       {"rx_xoff_packets",           offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               link_xoff_rx)},
> +       {"rx_size_64_packets",        offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_size_64)},
> +       {"rx_size_65_to_127_packets", offsetof(struct
> ipn3ke_rpst_hw_port_stats,
> +                                               rx_size_65_127)},
> +       {"rx_size_128_to_255_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_128_255)},
> +       {"rx_size_256_to_511_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_256_511)},
> +       {"rx_size_512_to_1023_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_512_1023)},
> +       {"rx_size_1024_to_1518_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_1024_1518)},
> +       {"rx_size_1519_to_max_packets",
> +                               offsetof(struct ipn3ke_rpst_hw_port_stats,
> +                                        rx_size_big)},
>
>
>
> Just a note, but those stats won't work with the current way ovs looks at
> per size counters.
>
>
>
> >>>> Just keep this in the same way with I40E currently.
>


Look at the i40e stats:
        {"rx_size_1523_to_max_packets", offsetof(struct i40e_hw_port_stats,
                rx_size_big)},

Then look at ovs mapping on top of this:
#define XSTAT_RX_1523_TO_MAX_PACKETS     "rx_size_1523_to_max_packets"
        } else if (strcmp(XSTAT_RX_1523_TO_MAX_PACKETS, names[i].name) ==
0) {
            stats->rx_1523_to_max_packets = xstats[i].value;

Here, your stats name is "rx_size_1519_to_max_packets", ovs won't catch
those stats for ipn3ke.


Maybe you don't want to support ovs with this nic and/or the hw behaves
this way and you can do nothing about it.
But don't reply "same as i40e".


-- 
David Marchand

^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2019-06-19  9:05           ` David Marchand
@ 2019-06-25  7:50           ` Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
                               ` (2 more replies)
  2019-06-25  8:00           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2 siblings, 3 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  7:50 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC register address for statistics.
This patch implemente statistics registers for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 590 ++++++++++++++++++++++---------------
 1 file changed, 345 insertions(+), 245 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..61a5dbb 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
 	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR    0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
-
-/*tx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
-
-/*rx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
-
-/*tx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
-
-/*rx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
-
-/*tx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
-
-/*rx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
-
-/*tx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
-
-/*rx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
-
-/*tx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
-
-/*rx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
-
-/*tx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
-
-/*rx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
-
-/*tx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
-
-/*rx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
-
-/*tx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
-
-/*rx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
-
-/*tx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
-
-/*rx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
-
-/*tx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
-
-/*rx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
-
-/*tx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x0164
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
-
-/*rx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x01E4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
-
-/*tx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x0166
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
-
-/*rx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x01E6
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
-
-/*tx_stats_etherStatsPkts256to511Octet*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI  0x0168
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
-
-/*rx_stats_etherStatsPkts256to511Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI  0x01E8
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
-
-/*tx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x016A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
-
-/*rx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x01EA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
-
-/*tx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x016C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
-
-/*rx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x01EC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
-
-/*tx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x016E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
-
-/*rx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x01EE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
-
-/*rx_stats_etherStatsFragments*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
-
-/*rx_stats_etherStatsJabbers*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
-
-/*rx_stats_etherStatsCRCErr*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
-
-/*tx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
-
-/*rx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
-
-/*tx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
-
-/*rx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
-
-/*tx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
-
-/*rx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
-
-/*tx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
-
-/*rx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
+#define IPN3KE_REGISTER_WIDTH                                        32
+
+/*Bits[2:0]: Configuration of TX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *TX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot at
+ *the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP core
+ *clears the parity bit CNTR_TX_STATUS[0]. This bit
+ *(CNTR_TX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the TX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved
+ */
+#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
+#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the TX statistics registers are paused (while
+ *CNTR_TX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *TX statistics counters.
+ *Bits[31:2] are Reserved.
+ */
+#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
+#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
+#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
+#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
+#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
+#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
+#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
+#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
+#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
+#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
+#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
+#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
+#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
+#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
+#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
+#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
+#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
+#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
+#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
+#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
+#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
+#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
+#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
+#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
+
+/*Bits[2:0]: Configuration of RX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *RX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot
+ *at the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP
+ *core clears the parity bit CNTR_RX_STATUS[0]. This bit
+ *(CNTR_RX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the RX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved.
+ */
+#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
+#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the RX statistics registers are paused
+ *(while CNTR_RX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *RX statistics counters.
+ *Bits [31:2] are Reserved
+ */
+#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
+#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
+#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
+#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
+#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
+#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
+#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
+#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
+#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
+#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
+#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
+#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
+#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
+#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
+#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
+#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
+#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
+#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
+#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
+#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
+#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
+#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
+#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
+#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
+
+#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
+
+#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
+#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
+#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
+#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x014A
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x014B
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x01CA
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x01CB
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO                      0x014E
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO                      0x01CE
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI                      0x01CF
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO                     0x0150
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI                     0x0151
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO                     0x01D0
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI                     0x01D1
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO                    0x0152
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI                    0x0153
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO                    0x01D2
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI                    0x01D3
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO                   0x0154
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI                   0x0155
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO                   0x01D4
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI                   0x01D5
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO                    0x0156
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI                    0x0157
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO                    0x01D6
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI                    0x01D7
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO                   0x0158
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI                   0x0159
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO                   0x01D8
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI                   0x01D9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO                    0x015A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI                    0x015B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO                    0x01DA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI                    0x01DB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x015E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x015F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x01DE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x01DF
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x0160
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x0161
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x01E1
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x0162
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x0163
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x01E3
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x0164
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x0165
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x01E5
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x0166
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x0167
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x01E6
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x01E7
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x0168
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x0169
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x01E8
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x01E9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x016A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x016B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x01EA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x01EB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x016C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x016D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x01EC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x01ED
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x016E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x016F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x01EE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x01EF
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO                 0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI                 0x01F1
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO                   0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI                   0x01F3
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO                   0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI                   0x01F5
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x0176
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x0177
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x01F6
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x01F7
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x0178
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x0179
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x01F8
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x01F9
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x017A
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x017B
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x01FA
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x01FB
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x017C
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x017D
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x01FC
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x01FD
 
 static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
 		uint32_t mac_num, uint32_t eth_group_sel)
@@ -945,31 +1004,72 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct ipn3ke_hw *hw,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_TX_CLR_STCS (1 & \
-	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+}
 
+static inline void ipn3ke_xmac_rx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_RX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_TX_CLR_STCS,
-					IPN3KE_MAC_TX_STATS_CLR,
+					tmp,
+					IPN3KE_10G_RX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_RX_CLR_STCS (1 & \
-	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp = 0x00000001;
 
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_RX_CLR_STCS,
-					IPN3KE_MAC_RX_STATS_CLR,
+					tmp,
+					IPN3KE_25G_TX_STATISTICS_CONFIG,
 					mac_num,
 					eth_group_sel);
 }
 
+static inline void ipn3ke_xmac_rx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_RX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
 
 #endif /* _IPN3KE_ETHDEV_H_ */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask
  2019-06-25  7:50           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
@ 2019-06-25  7:50             ` Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  7:50 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

original code is compatible with older device, whose mac register
address is no more than 10 bits. Now we have mac register address
longer than 10 bits, so we just delete the mask here.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..8d3084d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -48,7 +48,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = RCMD | target_addr << 32;
@@ -86,7 +85,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = WCMD | target_addr << 32 | wr_data;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev
  2019-06-25  7:50           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
@ 2019-06-25  7:50             ` Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  7:50 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

clear line side and NIC side statistics registers when HW init and
uinit, and when dev start.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59 ++++++++++++++++++++++++++++-----
 drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
 2 files changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 8d3084d..27ebfb5 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -244,11 +244,33 @@
 			/* Enable the RX path */
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 
@@ -291,11 +313,32 @@
 			/* Disable the RX path */
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index 01ad92e..4456d9d 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -159,11 +159,30 @@
 		/* Enable the RX path */
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
-		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
-		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4] net/ipn3ke: implementation of statistics
  2019-06-25  7:50           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
  2019-06-25  7:50             ` [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
@ 2019-06-25  7:50             ` Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  7:50 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu, david.marchand

This patch implemente statistics read and reset function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
Cc: david.marchand@redhat.com

v4:
* modify elements in ipn3ke_rpst_stats_strings[]
  tx_dropped -> tx_dropped_packets
  rx_dropped -> rx_dropped_packets

v3:
* delete unused code

 drivers/net/ipn3ke/ipn3ke_representor.c | 3440 ++++++++++++++++++++++++++++++-
 1 file changed, 3431 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index 4456d9d..7d4d030 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include <stdint.h>
+#include <unistd.h>
 
 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -297,31 +298,3452 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+	uint64_t tx_bytes;               /* gotc */
+	uint64_t tx_multicast;           /* mptc */
+	uint64_t tx_broadcast;           /* bptc */
+	uint64_t tx_unicast;             /* uptc */
+	uint64_t tx_discards;            /* tdpc */
+	uint64_t tx_errors;              /* tepc */
+	uint64_t rx_bytes;               /* gorc */
+	uint64_t rx_multicast;           /* mprc */
+	uint64_t rx_broadcast;           /* bprc */
+	uint64_t rx_unicast;             /* uprc */
+	uint64_t rx_discards;            /* rdpc */
+	uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+	char name[RTE_ETH_XSTATS_NAME_SIZE];
+	unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_multicast)},
+	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_broadcast)},
+	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_unicast)},
+	{"tx_dropped_packets",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_discards)},
+	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_multicast)},
+	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_broadcast)},
+	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unicast)},
+	{"rx_dropped_packets",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_discards)},
+	{"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+		sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+	/* eth stats collected by the port */
+	struct ipn3ke_rpst_eth_stats eth;
+
+	/* additional port specific stats */
+	uint64_t tx_dropped_link_down;
+	uint64_t crc_errors;
+	uint64_t illegal_bytes;
+	uint64_t error_bytes;
+	uint64_t mac_local_faults;
+	uint64_t mac_remote_faults;
+	uint64_t rx_length_errors;
+	uint64_t link_xon_rx;
+	uint64_t link_xoff_rx;
+	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t link_xon_tx;
+	uint64_t link_xoff_tx;
+	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t rx_size_64;
+	uint64_t rx_size_65_127;
+	uint64_t rx_size_128_255;
+	uint64_t rx_size_256_511;
+	uint64_t rx_size_512_1023;
+	uint64_t rx_size_1024_1518;
+	uint64_t rx_size_big;
+	uint64_t rx_undersize;
+	uint64_t rx_fragments;
+	uint64_t rx_oversize;
+	uint64_t rx_jabber;
+	uint64_t tx_size_64;
+	uint64_t tx_size_65_127;
+	uint64_t tx_size_128_255;
+	uint64_t tx_size_256_511;
+	uint64_t tx_size_512_1023;
+	uint64_t tx_size_1024_1518;
+	uint64_t tx_size_1519_to_max;
+	uint64_t mac_short_packet_dropped;
+	uint64_t checksum_error;
+	/* flow director stats */
+	uint64_t fd_atr_match;
+	uint64_t fd_sb_match;
+	uint64_t fd_atr_tunnel_match;
+	uint32_t fd_atr_status;
+	uint32_t fd_sb_status;
+	/* EEE LPI */
+	uint32_t tx_lpi_status;
+	uint32_t rx_lpi_status;
+	uint64_t tx_lpi_count;
+	uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+	{"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+						tx_dropped_link_down)},
+	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+						crc_errors)},
+	{"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+						illegal_bytes)},
+	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						error_bytes)},
+	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_local_faults)},
+	{"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_remote_faults)},
+	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_length_errors)},
+	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_tx)},
+	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_rx)},
+	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_tx)},
+	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_rx)},
+	{"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_64)},
+	{"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_65_127)},
+	{"rx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_128_255)},
+	{"rx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_256_511)},
+	{"rx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_512_1023)},
+	{"rx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_1024_1518)},
+	{"rx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_big)},
+	{"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_undersize)},
+	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_oversize)},
+	{"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       mac_short_packet_dropped)},
+	{"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_fragments)},
+	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_jabber)},
+	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_size_64)},
+	{"tx_size_65_to_127_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_65_127)},
+	{"tx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_128_255)},
+	{"tx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_256_511)},
+	{"tx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_512_1023)},
+	{"tx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1024_1518)},
+	{"tx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1519_to_max)},
+	{"rx_flow_director_atr_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_atr_match)},
+	{"rx_flow_director_sb_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_sb_match)},
+	{"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_status)},
+	{"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_status)},
+	{"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_count)},
+	{"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_count)},
+};
+
+#define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
+		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_rxq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_rx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_rx)},
+};
+
+#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_txq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_tx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_tx)},
+	{"xon_to_xoff_packets",       offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_2_xoff)},
+};
+
+#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
+
+static uint32_t
+ipn3ke_rpst_xstats_calc_num(void)
+{
+	return IPN3KE_RPST_ETH_XSTATS_CNT
+		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
+		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT)
+		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT);
+}
+
+static void
+ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+}
+
 static int
-ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
-	__rte_unused struct rte_eth_stats *stats)
+ipn3ke_read_25G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		0);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of 64-byte transmitted frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 += statistics;
+
+	/* Number of transmitted frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 += statistics;
+
+	/* Number of transmitted frames between 128 and 255 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 += statistics;
+
+	/* Number of transmitted frames between 256 and 511 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 += statistics;
+
+	/* Number of transmitted frames between 512 and 1023 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 += statistics;
+
+	/* Number of transmitted frames between 1024 and 1518 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 += statistics;
+
+	/*Number of transmitted frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max += statistics;
+
+	/*Number of oversized frames (frames with more bytes than the
+	 *number specified in the MAX_TX_SIZE_CONFIG register)
+	 *transmitted
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*Number of valid multicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*Number of valid broadcast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*Number of valid unicast frames transmitted,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/* Number of valid pause frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted runt packets. The IP core does not
+	 *transmit frames of length less than nine bytes.
+	 *The IP core pads frames of length nine bytes to 64 bytes to
+	 *extend them to 64 bytes. Therefore, this counter does not
+	 *increment in normal operating conditions.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of transmitted payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the TX MAC (bit[1]
+	 *of the TX_MAC_CONTROL register at offset 0x40A has
+	 *the value of 1), the IP core counts the VLAN header bytes
+	 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
+	 *as payload bytes. This register is compliant with
+	 *the requirements for aOctetsTransmittedOK in section
+	 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_bytes += statistics;
+
+	/*Number of transmitted bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors. This register is
+	 *compliant with the requirements for ifOutOctets in RFC3635
+	 *(Managed Objects for Ethernet-like Interface Types)
+	 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
+	 *Management Information Base (RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
+			port_id,
+			1);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/* Number of received oversized frames reporting a CRC error */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+	hw_stats->rx_length_errors += statistics;
+
+	/*Number of received packets with FCS errors.
+	 *This register maintains a count of the number of pulses
+	 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of received frames with a frame of length at least 64
+	 *with CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of errored unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored multicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored broadcast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored unicast control frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/* Number of errored pause frames received */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_discards += statistics;
+
+	/*Number of 64-byte received frames,
+	 *including the CRC field but excluding the preamble
+	 *and SFD bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_64B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_64B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 += statistics;
+
+	/*Number of received frames between 65 and 127 bytes */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_65_127B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_65_127B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 += statistics;
+
+	/*Number of received frames between 128 and 255 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_128_255B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_128_255B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 += statistics;
+
+	/*Number of received frames between 256 and 511 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_256_511B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_256_511B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 += statistics;
+
+	/*Number of received frames between 512 and 1023 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_512_1023B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_512_1023B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 += statistics;
+
+	/*Number of received frames between 1024 and 1518 bytes
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1024_1518B_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1024_1518B_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 += statistics;
+
+	/*Number of received frames of size between 1519 bytes
+	 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
+	 *register
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big += statistics;
+
+	/*Number of oversized frames (frames with more bytes
+	 *than the number specified in the MAX_TX_SIZE_CONFIG register)
+	 *received
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_jabber += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of valid multicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*Number of valid broadcast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*Number of valid unicast frames received,
+	 *excluding data frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*Number of received pause frames, with or without error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_PAUSE_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_PAUSE_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received runt packets. A runt is a packet of size
+	 *less than 64 bytes but greater than eight bytes.
+	 *If a packet is eight bytes or smaller, it is considered
+	 *a decoding error and not a runt frame, and the IP core
+	 *does not flag it nor count it as a runt.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_RX_RUNT_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_RX_RUNT_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*Number of received payload bytes in frames with no FCS,
+	 *undersized, oversized, or payload length errors.
+	 *If VLAN detection is turned off for the RX MAC (bit [1] of the
+	 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
+	 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
+	 *8 bytes for stacked VLAN) as payload bytes.
+	 *This register is compliant with the requirements for
+	 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
+	 *802.3-2008
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_bytes += statistics;
+
+	/*Number of received bytes in frames with no FCS, undersized,
+	 *oversized, or payload length errors.
+	 *This register is compliant with the requirements for
+	 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
+	 *Interface Types) and RX etherStatsOctets in RFC2819
+	 *(Remote Network Monitoring Management Information Base
+	 *(RMON)).
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*resume Tx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	/*resume Rx counter to real time
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	tmp &= 0xfffffffb;
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_25G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				0);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get(__rte_unused struct rte_eth_dev *dev,
-	__rte_unused struct rte_eth_xstat *xstats, __rte_unused unsigned int n)
+ipn3ke_read_10G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats,
+struct rte_eth_stats *stats)
 {
+	uint32_t statistics_lo = 0;
+	uint32_t statistics_hi = 0;
+	uint64_t statistics = 0;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+	memset(stats, 0, sizeof(*stats));
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully transmitted, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->opackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *that are successfully received, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ipackets = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->oerrors = statistics;
+	hw_stats->eth.tx_errors = statistics;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received with error, including control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ierrors = statistics;
+	hw_stats->eth.rx_discards = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of RX frames with CRC error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->crc_errors = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *transmitted.
+	 *If the tx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the TX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->obytes = statistics;
+	hw_stats->eth.tx_bytes = statistics;
+
+	/*64-bit statistics counter that collects the payload length,
+	 *including the bytes in control frames.
+	 *The payload length is the number of data and padding bytes
+	 *received.
+	 *If the rx_vlan_detection[0] register bit is set to 1,
+	 *the VLAN and stacked VLAN tags are counted as part of
+	 *the RX payload.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	stats->ibytes = statistics;
+	hw_stats->eth.rx_bytes = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid pause frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *transmitted that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of frames
+	 *received that are invalid and with error.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good unicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *unicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good multicast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *multicast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number
+	 *of multicast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames transmitted,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *good broadcast frames received,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast = statistics;
+
+	/*36-bit statistics counter that collects the number
+	 *of broadcast frames transmitted with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *broadcast frames received with error,
+	 *excluding control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets transmitted.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*64-bit statistics counter that collects the total number of
+	 *octets received.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames transmitted.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the total number of
+	 *good, errored, and invalid frames received.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized TX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *undersized RX frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_undersize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames whose length exceeds the maximum frame length
+	 *specified.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_oversize = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte TX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *64-byte RX frames,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_64 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 65 and 127 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_65_127 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 128 and 255 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_128_255 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 256 and 511 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_256_511 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 512 and 1023 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_512_1023 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field but
+	 *excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames between the length of 1024 and 1518 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_lo,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
+		port_id,
+		0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&statistics_hi,
+		IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
+		port_id,
+		0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_1024_1518 = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *TX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good, errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->tx_size_1519_to_max = statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames equal or more than the length of 1,519 bytes,
+	 *including the CRC field
+	 *but excluding the preamble and SFD bytes.
+	 *This count includes good,
+	 *errored, and invalid frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->rx_size_big = statistics;
+
+	/*36-bit statistics counter that collects the total number of
+	 *RX frames with length less than 64 bytes and CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *oversized RX frames with CRC error.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *RX frames with CRC error,
+	 *whose length is between 64 and the maximum frame length
+	 *specified in the register.
+	 *The MAC does not drop these frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX unicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_unicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX multicast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_multicast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX broadcast control frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.rx_broadcast += statistics;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid TX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
+	/*36-bit statistics counter that collects the number of
+	 *valid RX PFC frames.
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
+			port_id,
+			0);
+	statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+
 	return 0;
 }
 
+static void
+ipn3ke_rpst_10G_Lineside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_10G_Lineside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		0);
+}
+
+static void
+ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
+{
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
+		return;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
+		return;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
+		return;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_rpst_25G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_25G_Lineside_RX_stats_reset(hw, port_id);
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
+		ipn3ke_rpst_10G_NICside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_NICside_RX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_TX_stats_reset(hw, port_id);
+		ipn3ke_rpst_10G_Lineside_RX_stats_reset(hw, port_id);
+	}
+}
+
 static int
-ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
-		__rte_unused struct rte_eth_xstat_name *xstats_names,
-		__rte_unused unsigned int limit)
+ipn3ke_rpst_stats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
 {
+	uint16_t port_id = 0;
+	char *ch;
+	int cnt = 0;
+	int i = 0;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+	if (!stats) {
+		IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+
+		stats->ipackets  = hw_stats.rx_size_64
+					+ hw_stats.rx_size_65_127
+					+ hw_stats.rx_size_128_255
+					+ hw_stats.rx_size_256_511
+					+ hw_stats.rx_size_512_1023
+					+ hw_stats.rx_size_1024_1518
+					+ hw_stats.rx_size_big
+					+ hw_stats.rx_undersize
+					+ hw_stats.rx_fragments
+					+ hw_stats.rx_oversize
+					+ hw_stats.rx_jabber;
+		stats->opackets  = hw_stats.tx_size_64
+					+ hw_stats.tx_size_65_127
+					+ hw_stats.tx_size_128_255
+					+ hw_stats.tx_size_256_511
+					+ hw_stats.tx_size_512_1023
+					+ hw_stats.tx_size_1024_1518
+					+ hw_stats.tx_size_1519_to_max;
+		stats->ibytes    = hw_stats.eth.rx_bytes;
+		stats->obytes    = hw_stats.eth.tx_bytes;
+		stats->imissed   = 0;
+		stats->ierrors   = hw_stats.eth.rx_discards
+					+ hw_stats.eth.rx_unknown_protocol;
+		stats->oerrors   = hw_stats.eth.tx_discards
+					+ hw_stats.eth.tx_errors;
+		stats->rx_nombuf = 0;
+		for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
+			stats->q_ipackets[i] = 0;
+			stats->q_opackets[i] = 0;
+			stats->q_ibytes[i] = 0;
+			stats->q_obytes[i] = 0;
+			stats->q_errors[i] = 0;
+		}
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							stats);
+	}
+
 	return 0;
 }
 
-static void
-ipn3ke_rpst_stats_reset(__rte_unused struct rte_eth_dev *ethdev)
+static int
+ipn3ke_rpst_xstats_get
+(struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
+{
+	uint16_t port_id = 0;
+	char *ch = NULL;
+	int cnt = 0;
+	unsigned int i, count, prio;
+	struct rte_afu_device *afu_dev = NULL;
+	struct ipn3ke_hw *hw = NULL;
+	struct ipn3ke_rpst_hw_port_stats hw_stats;
+	struct rte_eth_stats stats;
+
+	if (!xstats)
+		return 0;
+
+	if (!ethdev) {
+		IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
+		return -EINVAL;
+	}
+
+	afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
+	if (!afu_dev) {
+		IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	if (!afu_dev->shared.data) {
+		IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
+		return -EINVAL;
+	}
+
+	hw = afu_dev->shared.data;
+
+	ch = ethdev->data->name;
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
+		return -EINVAL;
+	}
+	while (ch) {
+		if (*ch == '_')
+			cnt++;
+		ch++;
+		if (cnt == 3)
+			break;
+	}
+	if (!ch) {
+		IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
+		return -EINVAL;
+	}
+	port_id = atoi(ch);
+
+	count = ipn3ke_rpst_xstats_calc_num();
+	if (n < count)
+		return count;
+
+	if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		ipn3ke_read_25G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats);
+	} else {
+		ipn3ke_read_10G_Lineside_stats_registers(hw,
+							port_id,
+							&hw_stats,
+							&stats);
+	}
+
+	count = 0;
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
+			+ ipn3ke_rpst_stats_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
+			ipn3ke_rpst_hw_port_strings[i].offset);
+		xstats[count].id = count;
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_rxq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
+			xstats[count].value =
+				*(uint64_t *)(((char *)(&hw_stats)) +
+				ipn3ke_rpst_txq_prio_strings[i].offset +
+				(sizeof(uint64_t) * prio));
+			xstats[count].id = count;
+			count++;
+		}
+	}
+
+	return count;
+}
+
+static int
+ipn3ke_rpst_xstats_get_names
+(__rte_unused struct rte_eth_dev *dev,
+struct rte_eth_xstat_name *xstats_names,
+__rte_unused unsigned int limit)
 {
+	unsigned int count = 0;
+	unsigned int i, prio;
+
+	if (!xstats_names)
+		return ipn3ke_rpst_xstats_calc_num();
+
+	/* Note: limit checked in rte_eth_xstats_names() */
+
+	/* Get stats from ipn3ke_rpst_stats */
+	for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_stats_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_hw_port */
+	for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
+		snprintf(xstats_names[count].name,
+			 sizeof(xstats_names[count].name),
+			 "%s",
+			 ipn3ke_rpst_hw_port_strings[i].name);
+		count++;
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_rxq_pri */
+	for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "rx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_rxq_prio_strings[i].name);
+			count++;
+		}
+	}
+
+	/* Get individiual stats from ipn3ke_rpst_txq_prio */
+	for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
+		for (prio = 0; prio < 8; prio++) {
+			snprintf(xstats_names[count].name,
+				 sizeof(xstats_names[count].name),
+				 "tx_priority%u_%s",
+				 prio,
+				 ipn3ke_rpst_txq_prio_strings[i].name);
+			count++;
+		}
+	}
+	return count;
 }
 
 static void
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address
  2019-06-19  8:49         ` [dpdk-dev] [PATCH v3 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2019-06-19  9:05           ` David Marchand
  2019-06-25  7:50           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
@ 2019-06-25  8:00           ` Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
                               ` (2 more replies)
  2 siblings, 3 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  8:00 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC register address for statistics.
This patch implemente statistics registers for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 590 ++++++++++++++++++++++---------------
 1 file changed, 345 insertions(+), 245 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..61a5dbb 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
 	IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR    0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR    0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT    0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-	IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_HI  0x01CE
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESOK_LOW 0x01CF
-
-/*tx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_HI  0x0150
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESERR_LOW 0x0151
-
-/*rx_stats_unicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_HI  0x01D0
-#define IPN3KE_MAC_RX_STATS_UNICAST_FRAMESERR_LOW 0x01D1
-
-/*tx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_HI  0x0152
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESOK_LOW 0x0153
-
-/*rx_stats_multicast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_HI  0x01D2
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESOK_LOW 0x01D3
-
-/*tx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_HI  0x0154
-#define IPN3KE_MAC_TX_STATS_MULTICAST_FRAMESERR_LOW 0x0155
-
-/*rx_stats_multicast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_HI  0x01D4
-#define IPN3KE_MAC_RX_STATS_MULTICAST_FRAMESERR_LOW 0x01D5
-
-/*tx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_HI  0x0156
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESOK_LOW 0x0157
-
-/*rx_stats_broadcast_FramesOK*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_HI  0x01D6
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESOK_LOW 0x01D7
-
-/*tx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_HI  0x0158
-#define IPN3KE_MAC_TX_STATS_BROADCAST_FRAMESERR_LOW 0x0159
-
-/*rx_stats_broadcast_FramesErr*/
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_HI  0x01D8
-#define IPN3KE_MAC_RX_STATS_BROADCAST_FRAMESERR_LOW 0x01D9
-
-/*tx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_HI  0x015A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOCTETS_LOW 0x015B
-
-/*rx_stats_etherStatsOctets 64b*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_HI  0x01DA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOCTETS_LOW 0x01DB
-
-/*tx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_HI  0x015C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS_LOW 0x015D
-
-/*rx_stats_etherStatsPkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_HI  0x01DC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS_LOW 0x01DD
-
-/*tx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x015E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x015F
-
-/*rx_stats_etherStatsUndersizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_HI  0x01DE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSUNDERSIZEPKTS_LOW 0x01DF
-
-/*tx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x0160
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x0161
-
-/*rx_stats_etherStatsOversizePkts*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_HI  0x01E0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSOVERSIZEPKTS_LOW 0x01E1
-
-/*tx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x0162
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x0163
-
-/*rx_stats_etherStatsPkts64Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_HI  0x01E2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS64OCTETS_LOW 0x01E3
-
-/*tx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x0164
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x0165
-
-/*rx_stats_etherStatsPkts65to127Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_HI  0x01E4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS65TO127OCTETS_LOW 0x01E5
-
-/*tx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x0166
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x0167
-
-/*rx_stats_etherStatsPkts128to255Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_HI  0x01E6
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS128TO255OCTETS_LOW 0x01E7
-
-/*tx_stats_etherStatsPkts256to511Octet*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_HI  0x0168
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS256TO511OCTET_LOW 0x0169
-
-/*rx_stats_etherStatsPkts256to511Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_HI  0x01E8
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS256TO511OCTETS_LOW 0x01E9
-
-/*tx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x016A
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x016B
-
-/*rx_stats_etherStatsPkts512to1023Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_HI  0x01EA
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS512TO1023OCTETS_LOW 0x01EB
-
-/*tx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x016C
-#define IPN3KE_MAC_TX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x016D
-
-/*rx_stats_etherStatPkts1024to1518Octets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_HI  0x01EC
-#define IPN3KE_MAC_RX_STATS_ETHERSTATPKTS1024TO1518OCTETS_LOW 0x01ED
-
-/*tx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x016E
-#define IPN3KE_MAC_TX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x016F
-
-/*rx_stats_etherStatsPkts1519toXOctets*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_HI  0x01EE
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSPKTS1519TOXOCTETS_LOW 0x01EF
-
-/*rx_stats_etherStatsFragments*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_HI  0x01F0
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSFRAGMENTS_LOW 0x01F1
-
-/*rx_stats_etherStatsJabbers*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_HI  0x01F2
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSJABBERS_LOW 0x01F3
-
-/*rx_stats_etherStatsCRCErr*/
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_HI  0x01F4
-#define IPN3KE_MAC_RX_STATS_ETHERSTATSCRCERR_LOW 0x01F5
-
-/*tx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_HI  0x0176
-#define IPN3KE_MAC_TX_STATS_UNICASTMACCTRLFRAMES_LOW 0x0177
-
-/*rx_stats_unicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_HI  0x01F6
-#define IPN3KE_MAC_RX_STATS_UNICASTMACCTRLFRAMES_LOW 0x01F7
-
-/*tx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_HI  0x0178
-#define IPN3KE_MAC_TX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x0179
-
-/*rx_stats_multicastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_HI  0x01F8
-#define IPN3KE_MAC_RX_STATS_MULTICASTMACCTRLFRAMES_LOW 0x01F9
-
-/*tx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_HI  0x017A
-#define IPN3KE_MAC_TX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x017B
-
-/*rx_stats_broadcastMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_HI  0x01FA
-#define IPN3KE_MAC_RX_STATS_BROADCASTMACCTRLFRAMES_LOW 0x01FB
-
-/*tx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_HI  0x017C
-#define IPN3KE_MAC_TX_STATS_PFCMACCTRLFRAMES_LOW 0x017D
-
-/*rx_stats_PFCMACCtrlFrames*/
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_HI  0x01FC
-#define IPN3KE_MAC_RX_STATS_PFCMACCTRLFRAMES_LOW 0x01FD
+#define IPN3KE_REGISTER_WIDTH                                        32
+
+/*Bits[2:0]: Configuration of TX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *TX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot at
+ *the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP core
+ *clears the parity bit CNTR_TX_STATUS[0]. This bit
+ *(CNTR_TX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the TX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved
+ */
+#define IPN3KE_25G_TX_STATISTICS_CONFIG                              0x845
+#define IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the TX statistics registers are paused (while
+ *CNTR_TX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *TX statistics counters.
+ *Bits[31:2] are Reserved.
+ */
+#define IPN3KE_25G_TX_STATISTICS_STATUS                              0x846
+#define IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_LO                              0x800
+#define IPN3KE_25G_CNTR_TX_FRAGMENTS_HI                              0x801
+#define IPN3KE_25G_CNTR_TX_JABBERS_LO                                0x802
+#define IPN3KE_25G_CNTR_TX_JABBERS_HI                                0x803
+#define IPN3KE_25G_CNTR_TX_FCS_LO                                    0x804
+#define IPN3KE_25G_CNTR_TX_FCS_HI                                    0x805
+#define IPN3KE_25G_CNTR_TX_CRCERR_LO                                 0x806
+#define IPN3KE_25G_CNTR_TX_CRCERR_HI                                 0x807
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO                         0x808
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI                         0x809
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO                         0x80A
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI                         0x80B
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO                         0x80C
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI                         0x80D
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO                         0x80E
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI                         0x80F
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO                         0x810
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI                         0x811
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO                         0x812
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI                         0x813
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO                              0x814
+#define IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI                              0x815
+#define IPN3KE_25G_CNTR_TX_64B_LO                                    0x816
+#define IPN3KE_25G_CNTR_TX_64B_HI                                    0x817
+#define IPN3KE_25G_CNTR_TX_65_127B_LO                                0x818
+#define IPN3KE_25G_CNTR_TX_65_127B_HI                                0x819
+#define IPN3KE_25G_CNTR_TX_128_255B_LO                               0x81A
+#define IPN3KE_25G_CNTR_TX_128_255B_HI                               0x81B
+#define IPN3KE_25G_CNTR_TX_256_511B_LO                               0x81C
+#define IPN3KE_25G_CNTR_TX_256_511B_HI                               0x81D
+#define IPN3KE_25G_CNTR_TX_512_1023B_LO                              0x81E
+#define IPN3KE_25G_CNTR_TX_512_1023B_HI                              0x81F
+#define IPN3KE_25G_CNTR_TX_1024_1518B_LO                             0x820
+#define IPN3KE_25G_CNTR_TX_1024_1518B_HI                             0x821
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_LO                              0x822
+#define IPN3KE_25G_CNTR_TX_1519_MAXB_HI                              0x823
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_LO                               0x824
+#define IPN3KE_25G_CNTR_TX_OVERSIZE_HI                               0x825
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO                          0x826
+#define IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI                          0x827
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO                          0x828
+#define IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI                          0x829
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO                          0x82A
+#define IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI                          0x82B
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO                             0x82C
+#define IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI                             0x82D
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO                             0x82E
+#define IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI                             0x82F
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO                             0x830
+#define IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI                             0x831
+#define IPN3KE_25G_CNTR_TX_PAUSE_LO                                  0x832
+#define IPN3KE_25G_CNTR_TX_PAUSE_HI                                  0x833
+#define IPN3KE_25G_CNTR_TX_RUNT_LO                                   0x834
+#define IPN3KE_25G_CNTR_TX_RUNT_HI                                   0x835
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO                           0x860
+#define IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI                           0x861
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_LO                             0x862
+#define IPN3KE_25G_TX_FRAME_OCTETS_OK_HI                             0x863
+
+/*Bits[2:0]: Configuration of RX statistics counters:
+ *Bit[2]: Shadow request (active high): When set to the value of 1,
+ *RX statistics collection is paused. The underlying counters
+ *continue to operate, but the readable values reflect a snapshot
+ *at the time the pause flag was activated. Write a 0 to release.
+ *Bit[1]: Parity-error clear. When software sets this bit, the IP
+ *core clears the parity bit CNTR_RX_STATUS[0]. This bit
+ *(CNTR_RX_CONFIG[1]) is self-clearing.
+ *Bit[0]: Software can set this bit to the value of 1 to reset all of
+ *the RX statistics registers at the same time. This bit is selfclearing.
+ *Bits[31:3] are Reserved.
+ */
+#define IPN3KE_25G_RX_STATISTICS_CONFIG                              0x945
+#define IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK          0x00000004
+
+/*Bit[1]: Indicates that the RX statistics registers are paused
+ *(while CNTR_RX_CONFIG[2] is asserted).
+ *Bit[0]: Indicates the presence of at least one parity error in the
+ *RX statistics counters.
+ *Bits [31:2] are Reserved
+ */
+#define IPN3KE_25G_RX_STATISTICS_STATUS                              0x946
+#define IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK          0x00000002
+
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_LO                              0x900
+#define IPN3KE_25G_CNTR_RX_FRAGMENTS_HI                              0x901
+#define IPN3KE_25G_CNTR_RX_JABBERS_LO                                0x902
+#define IPN3KE_25G_CNTR_RX_JABBERS_HI                                0x903
+#define IPN3KE_25G_CNTR_RX_FCS_LO                                    0x904
+#define IPN3KE_25G_CNTR_RX_FCS_HI                                    0x905
+#define IPN3KE_25G_CNTR_RX_CRCERR_LO                                 0x906
+#define IPN3KE_25G_CNTR_RX_CRCERR_HI                                 0x907
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO                         0x908
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI                         0x909
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO                         0x90A
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI                         0x90B
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO                         0x90C
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI                         0x90D
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO                         0x90E
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI                         0x90F
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO                         0x910
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI                         0x911
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO                         0x912
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI                         0x913
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO                              0x914
+#define IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI                              0x915
+#define IPN3KE_25G_CNTR_RX_64B_LO                                    0x916
+#define IPN3KE_25G_CNTR_RX_64B_HI                                    0x917
+#define IPN3KE_25G_CNTR_RX_65_127B_LO                                0x918
+#define IPN3KE_25G_CNTR_RX_65_127B_HI                                0x919
+#define IPN3KE_25G_CNTR_RX_128_255B_LO                               0x91A
+#define IPN3KE_25G_CNTR_RX_128_255B_HI                               0x91B
+#define IPN3KE_25G_CNTR_RX_256_511B_LO                               0x91C
+#define IPN3KE_25G_CNTR_RX_256_511B_HI                               0x91D
+#define IPN3KE_25G_CNTR_RX_512_1023B_LO                              0x91E
+#define IPN3KE_25G_CNTR_RX_512_1023B_HI                              0x91F
+#define IPN3KE_25G_CNTR_RX_1024_1518B_LO                             0x920
+#define IPN3KE_25G_CNTR_RX_1024_1518B_HI                             0x921
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_LO                              0x922
+#define IPN3KE_25G_CNTR_RX_1519_MAXB_HI                              0x923
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_LO                               0x924
+#define IPN3KE_25G_CNTR_RX_OVERSIZE_HI                               0x925
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO                          0x926
+#define IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI                          0x927
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO                          0x928
+#define IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI                          0x929
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO                          0x92A
+#define IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI                          0x92B
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO                             0x92C
+#define IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI                             0x92D
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO                             0x92E
+#define IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI                             0x92F
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO                             0x930
+#define IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI                             0x931
+#define IPN3KE_25G_CNTR_RX_PAUSE_LO                                  0x932
+#define IPN3KE_25G_CNTR_RX_PAUSE_HI                                  0x933
+#define IPN3KE_25G_CNTR_RX_RUNT_LO                                   0x934
+#define IPN3KE_25G_CNTR_RX_RUNT_HI                                   0x935
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO                           0x960
+#define IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI                           0x961
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_LO                             0x962
+#define IPN3KE_25G_RX_FRAME_OCTETS_OK_HI                             0x963
+
+#define IPN3KE_10G_STATS_HI_VALID_MASK                               0x0000000F
+
+#define IPN3KE_10G_TX_STATS_CLR                                      0x0140
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_TX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_TX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_RX_STATS_CLR                                      0x01C0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT    0
+#define IPN3KE_10G_RX_STATS_CLR_CLEAR_MASK \
+	IPN3KE_MASK(0x1, IPN3KE_10G_RX_STATS_CLR_CLEAR_SHIFT)
+
+#define IPN3KE_10G_TX_STATS_FRAME_OK_LO                              0x0142
+#define IPN3KE_10G_TX_STATS_FRAME_OK_HI                              0x0143
+#define IPN3KE_10G_RX_STATS_FRAME_OK_LO                              0x01C2
+#define IPN3KE_10G_RX_STATS_FRAME_OK_HI                              0x01C3
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_LO                             0x0144
+#define IPN3KE_10G_TX_STATS_FRAME_ERR_HI                             0x0145
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_LO                             0x01C4
+#define IPN3KE_10G_RX_STATS_FRAME_ERR_HI                             0x01C5
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO                         0x01C6
+#define IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI                         0x01C7
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_LO                             0x0148
+#define IPN3KE_10G_TX_STATS_OCTETS_OK_HI                             0x0149
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_LO                             0x01C8
+#define IPN3KE_10G_RX_STATS_OCTETS_OK_HI                             0x01C9
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x014A
+#define IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x014B
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO                 0x01CA
+#define IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI                 0x01CB
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_LO                             0x014C
+#define IPN3KE_10G_TX_STATS_IF_ERRORS_HI                             0x014D
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_LO                             0x01CC
+#define IPN3KE_10G_RX_STATS_IF_ERRORS_HI                             0x01CD
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO                      0x014E
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI                      0x014F
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO                      0x01CE
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI                      0x01CF
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO                     0x0150
+#define IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI                     0x0151
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO                     0x01D0
+#define IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI                     0x01D1
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO                    0x0152
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI                    0x0153
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO                    0x01D2
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI                    0x01D3
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO                   0x0154
+#define IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI                   0x0155
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO                   0x01D4
+#define IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI                   0x01D5
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO                    0x0156
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI                    0x0157
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO                    0x01D6
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI                    0x01D7
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO                   0x0158
+#define IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI                   0x0159
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO                   0x01D8
+#define IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI                   0x01D9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO                    0x015A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI                    0x015B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO                    0x01DA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI                    0x01DB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO                      0x015C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI                      0x015D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO                      0x01DC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI                      0x01DD
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x015E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x015F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO           0x01DE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI           0x01DF
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x0160
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x0161
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO            0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI            0x01E1
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x0162
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x0163
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO            0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI            0x01E3
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x0164
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x0165
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO        0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI        0x01E5
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x0166
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x0167
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO       0x01E6
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI       0x01E7
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x0168
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x0169
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO       0x01E8
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI       0x01E9
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x016A
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x016B
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO      0x01EA
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI      0x01EB
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x016C
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x016D
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO     0x01EC
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI     0x01ED
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x016E
+#define IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x016F
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO        0x01EE
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI        0x01EF
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO                 0x01E0
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI                 0x01F1
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO                   0x01E2
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI                   0x01F3
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO                   0x01E4
+#define IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI                   0x01F5
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x0176
+#define IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x0177
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO               0x01F6
+#define IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI               0x01F7
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x0178
+#define IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x0179
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO             0x01F8
+#define IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI             0x01F9
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x017A
+#define IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x017B
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO             0x01FA
+#define IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI             0x01FB
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x017C
+#define IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x017D
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO                   0x01FC
+#define IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI                   0x01FD
 
 static inline void ipn3ke_xmac_tx_enable(struct ipn3ke_hw *hw,
 		uint32_t mac_num, uint32_t eth_group_sel)
@@ -945,31 +1004,72 @@ static inline void ipn3ke_xmac_smac_ovd_dis(struct ipn3ke_hw *hw,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_tx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_TX_CLR_STCS (1 & \
-	(IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_10G_TX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+}
 
+static inline void ipn3ke_xmac_rx_clr_10G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp;
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+					&tmp,
+					IPN3KE_10G_RX_STATS_CLR,
+					mac_num,
+					eth_group_sel);
+	tmp |= 0x00000001;
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_TX_CLR_STCS,
-					IPN3KE_MAC_TX_STATS_CLR,
+					tmp,
+					IPN3KE_10G_RX_STATS_CLR,
 					mac_num,
 					eth_group_sel);
 }
 
-static inline void ipn3ke_xmac_rx_clr_stcs(struct ipn3ke_hw *hw,
-	uint32_t mac_num, uint32_t eth_group_sel)
+static inline void ipn3ke_xmac_tx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
 {
-#define IPN3KE_XMAC_RX_CLR_STCS (1 & \
-	(IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK))
+	uint32_t tmp = 0x00000001;
 
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
 	(*hw->f_mac_write)(hw,
-					IPN3KE_XMAC_RX_CLR_STCS,
-					IPN3KE_MAC_RX_STATS_CLR,
+					tmp,
+					IPN3KE_25G_TX_STATISTICS_CONFIG,
 					mac_num,
 					eth_group_sel);
 }
 
+static inline void ipn3ke_xmac_rx_clr_25G_stcs
+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel)
+{
+	uint32_t tmp = 0x00000001;
+
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+					tmp,
+					IPN3KE_25G_RX_STATISTICS_CONFIG,
+					mac_num,
+					eth_group_sel);
+}
 
 #endif /* _IPN3KE_ETHDEV_H_ */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask
  2019-06-25  8:00           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
@ 2019-06-25  8:00             ` Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  8:00 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

original code is compatible with older device, whose mac register
address is no more than 10 bits. Now we have mac register address
longer than 10 bits, so we just delete the mask here.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..8d3084d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -48,7 +48,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = RCMD | target_addr << 32;
@@ -86,7 +85,6 @@
 	if (eth_group_sel != 0 && eth_group_sel != 1)
 		return -1;
 
-	addr &= 0x3FF;
 	target_addr = addr | dev_sel << 17;
 
 	indirect_value = WCMD | target_addr << 32 | wr_data;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev
  2019-06-25  8:00           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
@ 2019-06-25  8:00             ` Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 4/4] net/ipn3ke: implementation of statistics Andy Pei
  2 siblings, 0 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  8:00 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu

clear line side and NIC side statistics registers when HW init and
uinit, and when dev start.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59 ++++++++++++++++++++++++++++-----
 drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
 2 files changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 8d3084d..27ebfb5 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -244,11 +244,33 @@
 			/* Enable the RX path */
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 
@@ -291,11 +313,32 @@
 			/* Disable the RX path */
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index 01ad92e..4456d9d 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -159,11 +159,30 @@
 		/* Enable the RX path */
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
-		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
-		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 47+ messages in thread

* [dpdk-dev] [PATCH v4 4/4] net/ipn3ke: implementation of statistics
  2019-06-25  8:00           ` [dpdk-dev] [PATCH v4 1/4] net/ipn3ke: add new register address Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 2/4] net/ipn3ke: delete MAC register address mask Andy Pei
  2019-06-25  8:00             ` [dpdk-dev] [PATCH v4 3/4] net/ipn3ke: clear statistics when init and start dev Andy Pei
@ 2019-06-25  8:00             ` Andy Pei
  2019-06-27  5:49               ` Xu, Rosen
  2019-07-01 10:36               ` [dpdk-dev] [PATCH v5 1/4] net/ipn3ke: add new register address Andy Pei
  2 siblings, 2 replies; 47+ messages in thread
From: Andy Pei @ 2019-06-25  8:00 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, rosen.xu, david.marchand

This patch implemente statistics read and reset function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <andy.pei@intel.com>
---
Cc: david.marchand@redhat.com

v4:
* modify elements in ipn3ke_rpst_stats_strings[]
  tx_dropped -> tx_dropped_packets
  rx_dropped -> rx_dropped_packets

v3:
* delete unused code

 drivers/net/ipn3ke/ipn3ke_representor.c | 3440 ++++++++++++++++++++++++++++++-
 1 file changed, 3431 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index 4456d9d..7d4d030 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include <stdint.h>
+#include <unistd.h>
 
 #include <rte_bus_pci.h>
 #include <rte_ethdev.h>
@@ -297,31 +298,3452 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+	uint64_t tx_bytes;               /* gotc */
+	uint64_t tx_multicast;           /* mptc */
+	uint64_t tx_broadcast;           /* bptc */
+	uint64_t tx_unicast;             /* uptc */
+	uint64_t tx_discards;            /* tdpc */
+	uint64_t tx_errors;              /* tepc */
+	uint64_t rx_bytes;               /* gorc */
+	uint64_t rx_multicast;           /* mprc */
+	uint64_t rx_broadcast;           /* bprc */
+	uint64_t rx_unicast;             /* uprc */
+	uint64_t rx_discards;            /* rdpc */
+	uint64_t rx_unknown_protocol;    /* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+	char name[RTE_ETH_XSTATS_NAME_SIZE];
+	unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+	{"tx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_multicast)},
+	{"tx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_broadcast)},
+	{"tx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_unicast)},
+	{"tx_dropped_packets",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							tx_discards)},
+	{"rx_multicast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_multicast)},
+	{"rx_broadcast_packets",          offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_broadcast)},
+	{"rx_unicast_packets",            offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unicast)},
+	{"rx_dropped_packets",                    offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_discards)},
+	{"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+							rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+		sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT    8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+	/* eth stats collected by the port */
+	struct ipn3ke_rpst_eth_stats eth;
+
+	/* additional port specific stats */
+	uint64_t tx_dropped_link_down;
+	uint64_t crc_errors;
+	uint64_t illegal_bytes;
+	uint64_t error_bytes;
+	uint64_t mac_local_faults;
+	uint64_t mac_remote_faults;
+	uint64_t rx_length_errors;
+	uint64_t link_xon_rx;
+	uint64_t link_xoff_rx;
+	uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t link_xon_tx;
+	uint64_t link_xoff_tx;
+	uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+	uint64_t rx_size_64;
+	uint64_t rx_size_65_127;
+	uint64_t rx_size_128_255;
+	uint64_t rx_size_256_511;
+	uint64_t rx_size_512_1023;
+	uint64_t rx_size_1024_1518;
+	uint64_t rx_size_big;
+	uint64_t rx_undersize;
+	uint64_t rx_fragments;
+	uint64_t rx_oversize;
+	uint64_t rx_jabber;
+	uint64_t tx_size_64;
+	uint64_t tx_size_65_127;
+	uint64_t tx_size_128_255;
+	uint64_t tx_size_256_511;
+	uint64_t tx_size_512_1023;
+	uint64_t tx_size_1024_1518;
+	uint64_t tx_size_1519_to_max;
+	uint64_t mac_short_packet_dropped;
+	uint64_t checksum_error;
+	/* flow director stats */
+	uint64_t fd_atr_match;
+	uint64_t fd_sb_match;
+	uint64_t fd_atr_tunnel_match;
+	uint32_t fd_atr_status;
+	uint32_t fd_sb_status;
+	/* EEE LPI */
+	uint32_t tx_lpi_status;
+	uint32_t rx_lpi_status;
+	uint64_t tx_lpi_count;
+	uint64_t rx_lpi_count;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_hw_port_strings[] = {
+	{"tx_link_down_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+						tx_dropped_link_down)},
+	{"rx_crc_errors",             offsetof(struct ipn3ke_rpst_hw_port_stats,
+						crc_errors)},
+	{"rx_illegal_byte_errors",    offsetof(struct ipn3ke_rpst_hw_port_stats,
+						illegal_bytes)},
+	{"rx_error_bytes",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						error_bytes)},
+	{"mac_local_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_local_faults)},
+	{"mac_remote_errors",         offsetof(struct ipn3ke_rpst_hw_port_stats,
+						mac_remote_faults)},
+	{"rx_length_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_length_errors)},
+	{"tx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_tx)},
+	{"rx_xon_packets",            offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xon_rx)},
+	{"tx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_tx)},
+	{"rx_xoff_packets",           offsetof(struct ipn3ke_rpst_hw_port_stats,
+						link_xoff_rx)},
+	{"rx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_64)},
+	{"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
+						rx_size_65_127)},
+	{"rx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_128_255)},
+	{"rx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_256_511)},
+	{"rx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_512_1023)},
+	{"rx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_1024_1518)},
+	{"rx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 rx_size_big)},
+	{"rx_undersized_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_undersize)},
+	{"rx_oversize_errors",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_oversize)},
+	{"rx_mac_short_dropped",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       mac_short_packet_dropped)},
+	{"rx_fragmented_errors",      offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_fragments)},
+	{"rx_jabber_errors",          offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_jabber)},
+	{"tx_size_64_packets",        offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_size_64)},
+	{"tx_size_65_to_127_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_65_127)},
+	{"tx_size_128_to_255_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_128_255)},
+	{"tx_size_256_to_511_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_256_511)},
+	{"tx_size_512_to_1023_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_512_1023)},
+	{"tx_size_1024_to_1518_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1024_1518)},
+	{"tx_size_1519_to_max_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 tx_size_1519_to_max)},
+	{"rx_flow_director_atr_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_atr_match)},
+	{"rx_flow_director_sb_match_packets",
+				offsetof(struct ipn3ke_rpst_hw_port_stats,
+					 fd_sb_match)},
+	{"tx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_status)},
+	{"rx_low_power_idle_status",  offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_status)},
+	{"tx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       tx_lpi_count)},
+	{"rx_low_power_idle_count",   offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       rx_lpi_count)},
+};
+
+#define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
+		/ sizeof(ipn3ke_rpst_hw_port_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_rxq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_rx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_rx)},
+};
+
+#define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_txq_prio_strings[] = {
+	{"xon_packets",               offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_tx)},
+	{"xoff_packets",              offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xoff_tx)},
+	{"xon_to_xoff_packets",       offsetof(struct ipn3ke_rpst_hw_port_stats,
+					       priority_xon_2_xoff)},
+};
+
+#define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
+		/ sizeof(ipn3ke_rpst_txq_prio_strings[0]))
+
+static uint32_t
+ipn3ke_rpst_xstats_calc_num(void)
+{
+	return IPN3KE_RPST_ETH_XSTATS_CNT
+		+ IPN3KE_RPST_HW_PORT_XSTATS_CNT
+		+ (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT)
+		+ (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
+			* IPN3KE_RPST_PRIO_XSTATS_CNT);
+}
+
+static void
+ipn3ke_rpst_25G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the TX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_TX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_25G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp = 0x00000001;
+	/* Bit[0]: Software can set this bit to the value of 1
+	 * to reset all of the RX statistics registers at the same time.
+	 * This bit is selfclearing.
+	 */
+	(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			1);
+
+	while (tmp & 0x00000001) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+				&tmp,
+				IPN3KE_25G_RX_STATISTICS_CONFIG,
+				port_id,
+				1);
+		if (tmp & 0x00000001)
+			usleep(5);
+		else
+			return;
+	}
+}
+
+static void
+ipn3ke_rpst_10G_NICside_TX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all TX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_TX_STATS_CLR,
+		port_id,
+		1);
+}
+
+static void
+ipn3ke_rpst_10G_NICside_RX_stats_reset(struct ipn3ke_hw *hw,
+uint16_t port_id)
+{
+	uint32_t tmp;
+
+	/*Bit [0]: Set this register to 1 to clear all RX statistics
+	 *counters.
+	 *The IP core clears this bit when all counters are cleared.
+	 *Bits [31:1]: Reserved
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+	tmp |= 0x00000001;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_10G_RX_STATS_CLR,
+		port_id,
+		1);
+}
+
 static int
-ipn3ke_rpst_stats_get(__rte_unused struct rte_eth_dev *ethdev,
-	__rte_unused struct rte_eth_stats *stats)
+ipn3ke_read_25G_Lineside_stats_registers
+(struct ipn3ke_hw *hw,
+uint16_t port_id,
+struct ipn3ke_rpst_hw_port_stats *hw_stats)
 {
+	uint32_t tmp;
+	uint32_t statistics_lo;
+	uint32_t statistics_hi;
+	uint64_t statistics;
+
+	memset(hw_stats, 0, sizeof(*hw_stats));
+
+	/*check Tx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+
+	if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_STATUS,
+		port_id,
+		1);
+	if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_TX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/*check Rx statistics is real time.
+	 *if statistics has been paused, make it real time.
+	 */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_STATUS,
+		port_id,
+		0);
+
+	if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
+		tmp = 0x00000000;
+		(*hw->f_mac_read)(hw,
+			&tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+		tmp &= 0xfffffffb;
+		(*hw->f_mac_write)(hw,
+			tmp,
+			IPN3KE_25G_RX_STATISTICS_CONFIG,
+			port_id,
+			0);
+	}
+
+	/* pause Tx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_TX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/* pause Rx counter to read the statistics */
+	tmp = 0x00000000;
+	(*hw->f_mac_read)(hw,
+		&tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+	tmp |= 0x00000004;
+	(*hw->f_mac_write)(hw,
+		tmp,
+		IPN3KE_25G_RX_STATISTICS_CONFIG,
+		port_id,
+		0);
+
+	/*Number of transmitted frames less than 64 bytes
+	 *and reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of transmitted oversized frames reporting a CRC error*/
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_JABBERS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_JABBERS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/* Number of transmitted packets with FCS errors */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_FCS_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_FCS_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->checksum_error += statistics;
+
+	/*Number of transmitted frames with a frame of length at
+	 *least 64 reporting a CRC error
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_CRCERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_CRCERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+	hw_stats->crc_errors += statistics;
+
+	/*Number of errored multicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored broadcast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/*Number of errored unicast frames transmitted,
+	 *excluding control frames
+	 */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored multicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored broadcast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_hi,
+			IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
+			port_id,
+			0);
+	statistics = 0x0000000000000000;
+	statistics += statistics_hi;
+	statistics = statistics << IPN3KE_REGISTER_WIDTH;
+	statistics += statistics_lo;
+	hw_stats->eth.tx_errors += statistics;
+
+	/* Number of errored unicast control frames transmitted */
+	statistics_lo = 0x00000000;
+	(*hw->f_mac_read)(hw,
+			&statistics_lo,
+			IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
+			port_id,
+			0);
+	statistics_hi =