From: Kausal Malladi <Kausal.Malladi@intel.com>
To: matthew.d.roper@intel.com, jesse.barnes@intel.com,
damien.lespiau@intel.com, sonika.jindal@intel.com,
durgadoss.r@intel.com, vijay.a.purushothaman@intel.com,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
hverkuil@xs4all.nl, daniel@fooishbar.org
Cc: annie.j.matheson@intel.com, dhanya.p.r@intel.com,
daniel.vetter@intel.com, susanta.bhattacharjee@intel.com
Subject: [PATCH 06/16] drm/i915: Load gamma color capabilities for CHV CRTC
Date: Wed, 15 Jul 2015 18:39:30 +0530 [thread overview]
Message-ID: <1436965780-6061-7-git-send-email-Kausal.Malladi@intel.com> (raw)
In-Reply-To: <1436965780-6061-1-git-send-email-Kausal.Malladi@intel.com>
As per Color Manager design, each driver is responsible to load its
palette color correction and enhancement capabilities in the form of
a DRM blob property, so that user space can query and read.
This patch loads all CHV platform specific gamma color capabilities
for CRTC into a blob that can be accessible by user space to
query capabilities via DRM property interface.
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Kausal Malladi <Kausal.Malladi@intel.com>
---
drivers/gpu/drm/i915/intel_color_manager.c | 48 ++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_color_manager.h | 4 +++
2 files changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c
index baa4536..def20d0f 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.c
+++ b/drivers/gpu/drm/i915/intel_color_manager.c
@@ -27,15 +27,63 @@
#include "intel_color_manager.h"
+int get_chv_pipe_gamma_capabilities(struct drm_device *dev,
+ struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+ struct drm_property_blob *blob = NULL;
+ struct drm_mode_config *config = &dev->mode_config;
+ int ret;
+
+ /*
+ * This function exposes best capability for DeGamma and Gamma
+ * For CHV, the DeGamma LUT has 65 entries
+ * and the best Gamma capability has 257 entries (CGM unit)
+ */
+ palette_caps->version = CHV_PALETTE_STRUCT_VERSION;
+ palette_caps->num_samples_before_ctm =
+ CHV_DEGAMMA_MAX_VALS;
+ palette_caps->num_samples_after_ctm =
+ CHV_10BIT_GAMMA_MAX_VALS;
+
+ ret = drm_property_replace_global_blob(dev, &blob,
+ sizeof(struct drm_palette_caps),
+ (const void *)palette_caps,
+ &crtc->base, config->prop_color_capabilities);
+ if (ret) {
+ DRM_ERROR("Error updating Gamma blob\n");
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+int get_pipe_gamma_capabilities(struct drm_device *dev,
+ struct drm_palette_caps *palette_caps, struct drm_crtc *crtc)
+{
+ if (IS_CHERRYVIEW(dev))
+ return get_chv_pipe_gamma_capabilities(dev, palette_caps, crtc);
+ return -EINVAL;
+}
+
void intel_attach_color_properties_to_crtc(struct drm_device *dev,
struct drm_mode_object *mode_obj)
{
struct drm_mode_config *config = &dev->mode_config;
+ struct drm_palette_caps *palette_caps;
+ struct drm_crtc *crtc;
+ int ret;
if (IS_CHERRYVIEW(dev)) {
+ crtc = obj_to_crtc(mode_obj);
if (config->prop_color_capabilities)
drm_object_attach_property(mode_obj,
config->prop_color_capabilities, 0);
+ palette_caps = kzalloc(sizeof(struct drm_palette_caps),
+ GFP_KERNEL);
+ ret = get_pipe_gamma_capabilities(dev, palette_caps, crtc);
+ if (ret)
+ DRM_ERROR("Error getting gamma capability for CHV\n");
+
if (config->prop_palette_before_ctm)
drm_object_attach_property(mode_obj,
config->prop_palette_before_ctm, 0);
diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
index 04c921d..51aeb91 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.h
+++ b/drivers/gpu/drm/i915/intel_color_manager.h
@@ -27,3 +27,7 @@
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include "i915_drv.h"
+
+#define CHV_PALETTE_STRUCT_VERSION 1
+#define CHV_DEGAMMA_MAX_VALS 65
+#define CHV_10BIT_GAMMA_MAX_VALS 257
--
2.4.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-07-15 13:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-15 13:09 [PATCH 00/16] Color Manager Implementation Kausal Malladi
2015-07-15 13:09 ` [PATCH 01/16] drm/i915: Atomic commit path fix for CRTC properties Kausal Malladi
2015-07-15 13:09 ` [PATCH 02/16] drm: Create Color Management DRM properties Kausal Malladi
2015-07-15 13:25 ` Thierry Reding
2015-07-15 15:14 ` Sharma, Shashank
2015-07-15 13:09 ` [PATCH 03/16] drm/i915: Attach color properties to CRTC Kausal Malladi
2015-07-21 0:02 ` Matt Roper
2015-07-15 13:09 ` [PATCH 04/16] drm: Add structure for querying palette color capabilities Kausal Malladi
2015-07-15 13:09 ` [PATCH 05/16] drm: Export drm_property_replace_global_blob function Kausal Malladi
2015-07-15 13:09 ` Kausal Malladi [this message]
2015-07-21 0:02 ` [PATCH 06/16] drm/i915: Load gamma color capabilities for CHV CRTC Matt Roper
2015-07-15 13:09 ` [PATCH 07/16] drm/i915: Add atomic set property interface for CRTC Kausal Malladi
2015-07-21 0:02 ` Matt Roper
2015-07-15 13:09 ` [PATCH 08/16] drm: Add blob properties to CRTC state for color properties Kausal Malladi
2015-07-15 13:09 ` [PATCH 09/16] drm: Add structures to set/get a palette color property Kausal Malladi
2015-07-15 13:09 ` [PATCH 10/16] drm/i915: Add set_property handler for pipe Gamma correction on CHV/BSW Kausal Malladi
2015-07-21 0:03 ` Matt Roper
2015-07-21 11:04 ` Malladi, Kausal
2015-07-15 13:09 ` [PATCH 11/16] drm/i915: Add pipe level Gamma correction for CHV/BSW Kausal Malladi
2015-07-21 0:03 ` Matt Roper
2015-07-21 11:10 ` Malladi, Kausal
2015-07-21 23:34 ` Matt Roper
2015-07-15 13:09 ` [PATCH 12/16] drm/i915: Add set_property handler for pipe deGamma correction on CHV/BSW Kausal Malladi
2015-07-15 13:09 ` [PATCH 13/16] drm/i915: Add DeGamma correction for CHV/BSW Kausal Malladi
2015-07-15 13:09 ` [PATCH 14/16] drm: Add structure for set/get a CTM color property Kausal Malladi
2015-07-15 13:09 ` [PATCH 15/16] drm/i915: Add set_property handler for CSC correction on CHV/BSW Kausal Malladi
2015-07-15 13:09 ` [PATCH 16/16] drm/i915: Add CSC correction for CHV/BSW Kausal Malladi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1436965780-6061-7-git-send-email-Kausal.Malladi@intel.com \
--to=kausal.malladi@intel.com \
--cc=annie.j.matheson@intel.com \
--cc=damien.lespiau@intel.com \
--cc=daniel.vetter@intel.com \
--cc=daniel@fooishbar.org \
--cc=dhanya.p.r@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=durgadoss.r@intel.com \
--cc=hverkuil@xs4all.nl \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jesse.barnes@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=sonika.jindal@intel.com \
--cc=susanta.bhattacharjee@intel.com \
--cc=vijay.a.purushothaman@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).