From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data
Date: Wed, 13 Mar 2019 17:25:08 +0800 [thread overview]
Message-ID: <1552469111-8014-16-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552469111-8014-1-git-send-email-yongqiang.niu@mediatek.com>
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This patch add RDMA1 fifo size into RDMA private data
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index b0a5cff..3f9b4d4 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -53,12 +53,14 @@
#define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16)
#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16)
#define RDMA_FIFO_SIZE(rdma) ((rdma)->data->fifo_size)
+#define RDMA_FIFO_SIZE1(rdma) ((rdma)->data->fifo_size1)
#define DISP_RDMA_MEM_START_ADDR 0x0f00
#define RDMA_MEM_GMC 0x40402020
struct mtk_disp_rdma_data {
unsigned int fifo_size;
+ unsigned int fifo_size1;
};
/**
@@ -137,11 +139,17 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
{
unsigned int threshold;
unsigned int reg;
+ unsigned int rdma_fifo_size;
struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
+ if (comp->id == DDP_COMPONENT_RDMA1)
+ rdma_fifo_size = RDMA_FIFO_SIZE1(rdma);
+ else
+ rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
+
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
@@ -149,8 +157,12 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
* account for blanking, and with a pixel depth of 4 bytes:
*/
threshold = width * height * vrefresh * 4 * 7 / 1000000;
+
+ if (threshold > rdma_fifo_size)
+ threshold = rdma_fifo_size;
+
reg = RDMA_FIFO_UNDERFLOW_EN |
- RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
+ RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
}
@@ -330,10 +342,12 @@ static int mtk_disp_rdma_remove(struct platform_device *pdev)
static const struct mtk_disp_rdma_data mt2701_rdma_driver_data = {
.fifo_size = SZ_4K,
+ .fifo_size1 = SZ_4K,
};
static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = {
.fifo_size = SZ_8K,
+ .fifo_size1 = SZ_8K,
};
static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
--
1.8.1.1.dirty
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next prev parent reply other threads:[~2019-03-13 9:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-13 9:24 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 01/18] drm/mediatek: update dt-bindings for mt8183 Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 02/18] drm/mediatek: add mutex mod and sof into ddp private data Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 05/18] drm/mediatek: add ddp component CCORR Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 06/18] drm/mediatek: add mmsys private data for ddp path config Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 07/18] drm/mediatek: add commponent OVL0_2L Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 08/18] drm/mediatek: add component OVL1_2L Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 09/18] drm/mediatek: add component DITHER Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 10/18] drm/mediatek: add gmc_bits for ovl private data Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 11/18] drm/medaitek: add layer_nr " Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 12/18] drm/mediatek: add function to connect module with it's previous one Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-13 9:25 ` Yongqiang Niu [this message]
2019-03-13 9:25 ` [RESEND PATCH v1, 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Yongqiang Niu
2019-03-13 9:25 ` [RESEND PATCH v1, 18/18] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
-- strict thread matches above, loose matches on Subject: below --
2019-03-14 12:05 [RESEND PATCH v1 00/18] add drm support for MT8183 yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data yongqiang.niu
2019-03-14 8:05 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
2019-03-13 12:00 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 12:00 ` [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
2019-03-13 9:11 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 9:12 ` [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
2019-03-13 8:25 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 8:26 ` [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
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