From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: ck.hu@mediatek.com, p.zabel@pengutronix.de, robh+dt@kernel.org,
matthias.bgg@gmail.com
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
airlied@linux.ie, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel
Date: Thu, 14 Mar 2019 16:05:47 +0800 [thread overview]
Message-ID: <1552550762-21527-4-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552550762-21527-1-git-send-email-yongqiang.niu@mediatek.com>
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This patch redefine mtk_ddp_sout_sel
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 32 ++++++++++++++++++++------------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index adb37e4..592f852 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -405,21 +405,27 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
return value;
}
-static void mtk_ddp_sout_sel(void __iomem *config_regs,
- enum mtk_ddp_comp_id cur,
- enum mtk_ddp_comp_id next)
+static unsigned int mtk_ddp_sout_sel(void __iomem *config_regs,
+ enum mtk_ddp_comp_id cur,
+ enum mtk_ddp_comp_id next,
+ unsigned int *addr)
{
+ unsigned int value;
+
if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
- writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
- config_regs + DISP_REG_CONFIG_OUT_SEL);
+ *addr = DISP_REG_CONFIG_OUT_SEL;
+ value = BLS_TO_DSI_RDMA1_TO_DPI1;
} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
- writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
- config_regs + DISP_REG_CONFIG_OUT_SEL);
- writel_relaxed(DSI_SEL_IN_RDMA,
- config_regs + DISP_REG_CONFIG_DSI_SEL);
- writel_relaxed(DPI_SEL_IN_BLS,
- config_regs + DISP_REG_CONFIG_DPI_SEL);
+ *addr = DISP_REG_CONFIG_OUT_SEL;
+ value = BLS_TO_DPI_RDMA1_TO_DSI;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) {
+ *addr = DISP_REG_CONFIG_DSI_SEL;
+ value = DSI_SEL_IN_RDMA;
+ } else {
+ value = 0;
}
+
+ return value;
}
void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
@@ -434,7 +440,9 @@ void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
writel_relaxed(reg, config_regs + addr);
}
- mtk_ddp_sout_sel(config_regs, cur, next);
+ value = mtk_ddp_sout_sel(cur, next, &addr);
+ if (value)
+ writel_relaxed(value, config_regs + addr);
value = mtk_ddp_sel_in(cur, next, &addr);
if (value) {
--
1.8.1.1.dirty
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next prev parent reply other threads:[~2019-03-14 8:06 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-14 8:05 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 01/18] drm/mediatek: update dt-bindings for mt8183 Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 02/18] drm/mediatek: add mutex mod and sof into ddp private data Yongqiang Niu
2019-03-14 8:05 ` Yongqiang Niu [this message]
2019-03-14 8:05 ` [RESEND PATCH v1, 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 05/18] drm/mediatek: add ddp component CCORR Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 06/18] drm/mediatek: add mmsys private data for ddp path config Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 07/18] drm/mediatek: add commponent OVL0_2L Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 08/18] drm/mediatek: add component OVL1_2L Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 09/18] drm/mediatek: add component DITHER Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 10/18] drm/mediatek: add gmc_bits for ovl private data Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 11/18] drm/medaitek: add layer_nr " Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 12/18] drm/mediatek: add function to connect module with it's previous one Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 13/18] drm/mediatek: add ddp write register common api Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-14 8:05 ` [RESEND PATCH v1, 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data Yongqiang Niu
2019-03-14 8:06 ` [RESEND PATCH v1, 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Yongqiang Niu
2019-03-14 8:06 ` [RESEND PATCH v1, 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Yongqiang Niu
2019-03-14 8:06 ` [RESEND PATCH v1, 18/18] drm/mediatek: add support for mediatek SOC MT8183 Yongqiang Niu
-- strict thread matches above, loose matches on Subject: below --
2019-03-14 12:05 [RESEND PATCH v1 00/18] add drm support for MT8183 yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 03/18] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-03-13 12:00 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 12:00 ` [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
2019-03-13 9:24 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 9:24 ` [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
2019-03-13 9:11 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 9:12 ` [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
2019-03-13 8:25 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 8:25 ` [RESEND PATCH v1, 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Yongqiang Niu
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