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From: <yongqiang.niu@mediatek.com>
To: ck.hu@mediatek.com, p.zabel@pengutronix.de, robh+dt@kernel.org,
	matthias.bgg@gmail.com
Cc: airlied@linux.ie, mark.rutland@arm.com,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, Bibby.Hsieh@mediatek.com,
	yt.shen@mediatek.com, Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [RESEND PATCH v1 14/18] drm/mediatek: add connect function for ovl
Date: Thu, 14 Mar 2019 20:05:16 +0800	[thread overview]
Message-ID: <1552565120-24329-15-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1552565120-24329-1-git-send-email-yongqiang.niu@mediatek.com>

From: Yongqiang Niu <yongqiang.niu@mediatek.com>

This patch add connect function for ovl

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index a0ab760..3b2ce77 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -27,6 +27,8 @@
 #define DISP_REG_OVL_EN				0x000c
 #define DISP_REG_OVL_RST			0x0014
 #define DISP_REG_OVL_ROI_SIZE			0x0020
+#define DISP_REG_OVL_DATAPATH_CON		0x0024
+#define OVL_BGCLR_SEL_IN                        BIT(2)
 #define DISP_REG_OVL_ROI_BGCLR			0x0028
 #define DISP_REG_OVL_SRC_CON			0x002c
 #define DISP_REG_OVL_CON(n)			(0x0030 + 0x20 * (n))
@@ -245,6 +247,19 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
 		mtk_ovl_layer_on(comp, idx);
 }
 
+static void mtk_ovl_connect(struct mtk_ddp_comp *comp,
+			    enum mtk_ddp_comp_id prev)
+{
+	int is_ovl = 0;
+
+	if (prev == DDP_COMPONENT_OVL0 || prev == DDP_COMPONENT_OVL1 ||
+	    prev == DDP_COMPONENT_OVL0_2L || prev == DDP_COMPONENT_OVL1_2L)
+		is_ovl = 1;
+
+	mtk_ddp_write_mask((is_ovl << 2), comp,
+			   DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN);
+}
+
 static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = {
 	.config = mtk_ovl_config,
 	.start = mtk_ovl_start,
@@ -255,6 +270,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
 	.layer_on = mtk_ovl_layer_on,
 	.layer_off = mtk_ovl_layer_off,
 	.layer_config = mtk_ovl_layer_config,
+	.connect = mtk_ovl_connect,
 };
 
 static int mtk_disp_ovl_bind(struct device *dev, struct device *master,
-- 
1.8.1.1.dirty

  parent reply	other threads:[~2019-03-14 12:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-14 12:05 [RESEND PATCH v1 00/18] add drm support for MT8183 yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 01/18] drm/mediatek: update dt-bindings for mt8183 yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 02/18] drm/mediatek: add mutex mod and sof into ddp private data yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 03/18] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 05/18] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 06/18] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 07/18] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 08/18] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 09/18] drm/mediatek: add component DITHER yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 10/18] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 11/18] drm/medaitek: add layer_nr " yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 12/18] drm/mediatek: add function to connect module with it's previous one yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 13/18] drm/mediatek: add ddp write register common api yongqiang.niu
2019-03-14 12:05 ` yongqiang.niu [this message]
2019-03-14 12:05 ` [RESEND PATCH v1 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 16/18] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 17/18] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-03-14 12:05 ` [RESEND PATCH v1 18/18] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-03-14 17:35 ` [RESEND PATCH v1 00/18] add drm support for MT8183 Matthias Brugger
2019-03-15  1:37   ` Yongqiang Niu
  -- strict thread matches above, loose matches on Subject: below --
2019-03-14  8:05 [RESEND PATCH v1, " Yongqiang Niu
2019-03-14  8:05 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-13 12:00 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13 12:00 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-13  9:24 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  9:25 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-13  9:11 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  9:12 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu
2019-03-13  8:25 [RESEND PATCH v1, 00/18] add drm support for MT8183 Yongqiang Niu
2019-03-13  8:25 ` [RESEND PATCH v1, 14/18] drm/mediatek: add connect function for ovl Yongqiang Niu

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