From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91628C433E0 for ; Mon, 25 May 2020 07:21:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 666F02065F for ; Mon, 25 May 2020 07:21:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="IFOC0kdU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 666F02065F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B66889D61; Mon, 25 May 2020 07:21:06 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by gabe.freedesktop.org (Postfix) with ESMTP id 64C3089DCF for ; Sun, 24 May 2020 17:31:11 +0000 (UTC) X-UUID: 973c9456470544e9914d24d4dfde948a-20200525 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=4ZqV79H8kGJw9jKHV///buqGRMGB7UkABgH45B0mwEU=; b=IFOC0kdUWv+Q7vv18nDp5/HQTmtE5SnyY3Y7I4c2SNPNYkAY8jXh3mTkMNvZJl/uHKbiJRJHTQ56h+gSNmhaoUOvd/sl4gd9UZJ8xUMf3HpRMPpPOxDf1NKYJvD3SCX3CxUArosRQKgLtpSjNpfBbKFjPtoc1r5x/SLzdr2xaco=; X-UUID: 973c9456470544e9914d24d4dfde948a-20200525 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1623128748; Mon, 25 May 2020 01:31:10 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 May 2020 01:30:58 +0800 Received: from [172.21.77.33] (172.21.77.33) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 01:30:58 +0800 Message-ID: <1590341462.31286.19.camel@mtkswgap22> Subject: Re: [PATCH v5 09/13] soc: mediatek: cmdq: add write_s value function From: Dennis-YC Hsieh To: Matthias Brugger Date: Mon, 25 May 2020 01:31:02 +0800 In-Reply-To: References: <1583664775-19382-1-git-send-email-dennis-yc.hsieh@mediatek.com> <1583664775-19382-10-git-send-email-dennis-yc.hsieh@mediatek.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: B6B32E7834C0775BF207157EDF3D12E23C8F2F2B886FA00EB0AE01EEBDB016C52000:8 X-MTK: N X-Mailman-Approved-At: Mon, 25 May 2020 07:21:04 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, wsd_upstream@mediatek.com, David Airlie , Jassi Brar , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, HS Liao , Rob Herring , linux-mediatek@lists.infradead.org, Houlong Wei , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Matthias, Thanks for your comment. On Sat, 2020-05-16 at 20:20 +0200, Matthias Brugger wrote: > > On 08/03/2020 11:52, Dennis YC Hsieh wrote: > > add write_s function in cmdq helper functions which > > writes a constant value to address with large dma > > access support. > > > > Signed-off-by: Dennis YC Hsieh > > Reviewed-by: CK Hu > > --- > > drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++ > > include/linux/soc/mediatek/mtk-cmdq.h | 14 ++++++++++++++ > > 2 files changed, 40 insertions(+) > > > > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c > > index 03c129230cd7..a9ebbabb7439 100644 > > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c > > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c > > @@ -269,6 +269,32 @@ int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > > } > > EXPORT_SYMBOL(cmdq_pkt_write_s); > > > > +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > > + u16 addr_low, u32 value, u32 mask) > > +{ > > + struct cmdq_instruction inst = { {0} }; > > + int err; > > + > > + if (mask != U32_MAX) { > > + inst.op = CMDQ_CODE_MASK; > > + inst.mask = ~mask; > > + err = cmdq_pkt_append_command(pkt, inst); > > + if (err < 0) > > + return err; > > + > > + inst.op = CMDQ_CODE_WRITE_S_MASK; > > + } else { > > + inst.op = CMDQ_CODE_WRITE_S; > > + } > > + > > + inst.sop = high_addr_reg_idx; > > Writing u16 value in a 5 bit wide variable? We need only 5 bits in this case. I'll change high_addr_reg_idx parameter to u8. > > > + inst.offset = addr_low; > > + inst.value = value; > > + > > + return cmdq_pkt_append_command(pkt, inst); > > +} > > +EXPORT_SYMBOL(cmdq_pkt_write_s_value); > > + > > int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) > > { > > struct cmdq_instruction inst = { {0} }; > > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h > > index 01b4184af310..fec292aac83c 100644 > > --- a/include/linux/soc/mediatek/mtk-cmdq.h > > +++ b/include/linux/soc/mediatek/mtk-cmdq.h > > @@ -135,6 +135,20 @@ int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, > > int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > > u16 addr_low, u16 src_reg_idx, u32 mask); > > > > +/** > > + * cmdq_pkt_write_s_value() - append write_s command with mask to the CMDQ > > + * packet which write value to a physical address > > + * @pkt: the CMDQ packet > > + * @high_addr_reg_idx: internal regisger ID which contains high address of pa > > register will fix Regards, Dennis > > > + * @addr_low: low address of pa > > + * @value: the specified target value > > + * @mask: the specified target mask > > + * > > + * Return: 0 for success; else the error code is returned > > + */ > > +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > > + u16 addr_low, u32 value, u32 mask); > > + > > /** > > * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet > > * @pkt: the CMDQ packet > > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel