From: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
To: dri-devel@lists.freedesktop.org, anitha.chrisanthus@intel.com,
bob.j.paauwe@intel.com, edmund.j.dea@intel.com
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
rodrigo.vivi@intel.com
Subject: [PATCH v2 51/59] drm/kmb: Write to LCD_LAYERn_CFG only once
Date: Tue, 14 Jul 2020 13:57:37 -0700 [thread overview]
Message-ID: <1594760265-11618-52-git-send-email-anitha.chrisanthus@intel.com> (raw)
In-Reply-To: <1594760265-11618-1-git-send-email-anitha.chrisanthus@intel.com>
From: Edmund Dea <edmund.j.dea@intel.com>
Video artifacts appear during playback as horizontal lines that
sporadically appear every few frames. Issue was caused by writing to
LCD_LAYERn_CFG register twice during plane updates. Issue is fixed by
writing to LCD_LAYERn_CFG only once.
Removed plane_init_status so that there are no initialization
dependencies during plane updates.
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
drivers/gpu/drm/kmb/kmb_plane.c | 81 +++++++++++++++++++----------------------
1 file changed, 38 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/kmb/kmb_plane.c b/drivers/gpu/drm/kmb/kmb_plane.c
index 6be0997..bf93986 100644
--- a/drivers/gpu/drm/kmb/kmb_plane.c
+++ b/drivers/gpu/drm/kmb/kmb_plane.c
@@ -98,7 +98,6 @@ static const u32 csc_coef_lcd[] = {
};
/*plane initialization status */
-static int plane_init_status[KMB_MAX_PLANES] = { 0, 0, 0, 0 };
static unsigned int check_pixel_format(struct drm_plane *plane, u32 format)
{
@@ -301,7 +300,6 @@ static void config_csc(struct kmb_drm_private *dev_p, int plane_id)
kmb_write_lcd(dev_p, LCD_LAYERn_CSC_OFF1(plane_id), csc_coef_lcd[9]);
kmb_write_lcd(dev_p, LCD_LAYERn_CSC_OFF2(plane_id), csc_coef_lcd[10]);
kmb_write_lcd(dev_p, LCD_LAYERn_CSC_OFF3(plane_id), csc_coef_lcd[11]);
- kmb_set_bitmask_lcd(dev_p, LCD_LAYERn_CFG(plane_id), LCD_LAYER_CSC_EN);
}
#endif
@@ -390,19 +388,27 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
addr[V_PLANE]);
}
}
- if (plane_init_status[plane_id] != INITIALIZED) {
- kmb_write_lcd(dev_p, LCD_LAYERn_WIDTH(plane_id), src_w - 1);
- kmb_write_lcd(dev_p, LCD_LAYERn_HEIGHT(plane_id), src_h - 1);
- kmb_write_lcd(dev_p, LCD_LAYERn_COL_START(plane_id), crtc_x);
- kmb_write_lcd(dev_p, LCD_LAYERn_ROW_START(plane_id), crtc_y);
-
- val = set_pixel_format(fb->format->format);
- val |= set_bits_per_pixel(fb->format);
- /*CHECKME Leon drvr sets it to 100 try this for now */
- val |= LCD_LAYER_FIFO_100;
- kmb_write_lcd(dev_p, LCD_LAYERn_CFG(plane_id), val);
-
- switch (plane_id) {
+
+ kmb_write_lcd(dev_p, LCD_LAYERn_WIDTH(plane_id), src_w-1);
+ kmb_write_lcd(dev_p, LCD_LAYERn_HEIGHT(plane_id), src_h-1);
+ kmb_write_lcd(dev_p, LCD_LAYERn_COL_START(plane_id), crtc_x);
+ kmb_write_lcd(dev_p, LCD_LAYERn_ROW_START(plane_id), crtc_y);
+
+ val = set_pixel_format(fb->format->format);
+ val |= set_bits_per_pixel(fb->format);
+ /*CHECKME Leon drvr sets it to 100 try this for now */
+ val |= LCD_LAYER_FIFO_100;
+
+ if (val & LCD_LAYER_PLANAR_STORAGE) {
+ val |= LCD_LAYER_CSC_EN;
+
+ /*enable CSC if input is planar and output is RGB */
+ config_csc(dev_p, plane_id);
+ }
+
+ kmb_write_lcd(dev_p, LCD_LAYERn_CFG(plane_id), val);
+
+ switch (plane_id) {
case LAYER_0:
ctrl = LCD_CTRL_VL1_ENABLE;
break;
@@ -415,36 +421,28 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
case LAYER_3:
ctrl = LCD_CTRL_GL2_ENABLE;
break;
- }
+ }
- ctrl |= LCD_CTRL_PROGRESSIVE | LCD_CTRL_TIM_GEN_ENABLE
- | LCD_CTRL_CONTINUOUS | LCD_CTRL_OUTPUT_ENABLED;
+ ctrl |= LCD_CTRL_PROGRESSIVE | LCD_CTRL_TIM_GEN_ENABLE
+ | LCD_CTRL_CONTINUOUS | LCD_CTRL_OUTPUT_ENABLED;
- /*LCD is connected to MIPI on kmb
- * Therefore this bit is required for DSI Tx
- */
- ctrl |= LCD_CTRL_VHSYNC_IDLE_LVL;
+ /*LCD is connected to MIPI on kmb
+ * Therefore this bit is required for DSI Tx
+ */
+ ctrl |= LCD_CTRL_VHSYNC_IDLE_LVL;
- kmb_set_bitmask_lcd(dev_p, LCD_CONTROL, ctrl);
+ kmb_set_bitmask_lcd(dev_p, LCD_CONTROL, ctrl);
- /* FIXME no doc on how to set output format,these values are
- * taken from the Myriadx tests
- */
- out_format |= LCD_OUTF_FORMAT_RGB888;
+ /* FIXME no doc on how to set output format,these values are
+ * taken from the Myriadx tests
+ */
+ out_format |= LCD_OUTF_FORMAT_RGB888;
- if (val & LCD_LAYER_PLANAR_STORAGE) {
- /*enable CSC if input is planar and output is RGB */
- config_csc(dev_p, plane_id);
- }
-
- /*set background color to white */
- // kmb_write_lcd(dev_p, LCD_BG_COLOUR_LS, 0xffffff);
- /*leave RGB order,conversion mode and clip mode to default */
- /* do not interleave RGB channels for mipi Tx compatibility */
- out_format |= LCD_OUTF_MIPI_RGB_MODE;
- kmb_write_lcd(dev_p, LCD_OUT_FORMAT_CFG, out_format);
- plane_init_status[plane_id] = INITIALIZED;
- }
+ /* Leave RGB order,conversion mode and clip mode to default */
+ /* do not interleave RGB channels for mipi Tx compatibility */
+ out_format |= LCD_OUTF_MIPI_RGB_MODE;
+ // out_format |= LCD_OUTF_SYNC_MODE;
+ kmb_write_lcd(dev_p, LCD_OUT_FORMAT_CFG, out_format);
dma_cfg = LCD_DMA_LAYER_ENABLE | LCD_DMA_LAYER_VSTRIDE_EN |
LCD_DMA_LAYER_CONT_UPDATE | LCD_DMA_LAYER_AXI_BURST_16;
@@ -454,9 +452,6 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
DRM_DEBUG("%s : %d dma_cfg=0x%x LCD_DMA_CFG=0x%x\n",
__func__, __LINE__, dma_cfg,
kmb_read_lcd(dev_p, LCD_LAYERn_DMA_CFG(plane_id)));
-
- return;
-
#endif
}
--
2.7.4
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next prev parent reply other threads:[~2020-07-14 21:00 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-14 20:56 [PATCH v2 00/59] Add support for KeemBay DRM driver Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 01/59] drm/kmb: Add support for KeemBay Display Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 02/59] drm/kmb: Added id to kmb_plane Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 03/59] drm/kmb: Set correct values in the LAYERn_CFG register Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 04/59] drm/kmb: Use biwise operators for register definitions Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 05/59] drm/kmb: Updated kmb_plane_atomic_check Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 06/59] drm/kmb: Initial check-in for Mipi DSI Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 07/59] drm/kmb: Set OUT_FORMAT_CFG register Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 08/59] drm/kmb: Added mipi_dsi_host initialization Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 09/59] drm/kmb: Part 1 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 10/59] drm/kmb: Part 2 " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 11/59] drm/kmb: Use correct mmio offset from data book Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 12/59] drm/kmb: Part3 of Mipi Tx initialization Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 13/59] drm/kmb: Part4 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 14/59] drm/kmb: Correct address offsets for mipi registers Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 15/59] drm/kmb: Part5 of Mipi Tx Intitialization Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 16/59] drm/kmb: Part6 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 17/59] drm/kmb: Part7 " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 18/59] drm/kmb: Part8 " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 19/59] drm/kmb: Added ioremap/iounmap for register access Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 20/59] drm/kmb: Register IRQ for LCD Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 21/59] drm/kmb: IRQ handlers for LCD and mipi dsi Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 22/59] drm/kmb: Set hardcoded values to LCD_VSYNC_START Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 23/59] drm/kmb: Additional register programming to update_plane Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 24/59] drm/kmb: Add ADV7535 bridge Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 25/59] drm/kmb: Display clock enable/disable Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 26/59] drm/kmb: rebase to newer kernel version Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 27/59] drm/kmb: minor name change to match device tree Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 28/59] drm/kmb: Changed MMIO size Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 29/59] drm/kmb: Defer Probe Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 30/59] drm/kmb: call bridge init in the very beginning Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 31/59] drm/kmb: Cleanup probe functions Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 32/59] drm/kmb: Revert dsi_host back to a static variable Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 33/59] drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 34/59] drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 35/59] drm/kmb: Remove declaration of irq_lcd/irq_mipi Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 36/59] drm/kmb: Enable MIPI TX HS Test Pattern Generation Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 37/59] drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 38/59] drm/kmb: Mipi DPHY initialization changes Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 39/59] drm/kmb: Fixed driver unload Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 40/59] drm/kmb: Added LCD_TEST config Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 41/59] drm/kmb: Changes for LCD to Mipi Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 42/59] drm/kmb: Update LCD programming to match MIPI Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 43/59] drm/kmb: Changed name of driver to kmb-drm Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 44/59] drm/kmb: Mipi settings from input timings Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 45/59] drm/kmb: Enable LCD interrupts Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 46/59] drm/kmb: Enable LCD interrupts during modeset Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 47/59] drm/kmb: Don’t inadvertantly disable LCD controller Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 48/59] drm/kmb: SWAP R and B LCD Layer order Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 49/59] drm/kmb: Disable ping pong mode Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 50/59] drm/kmb: Do the layer initializations only once Anitha Chrisanthus
2020-07-14 20:57 ` Anitha Chrisanthus [this message]
2020-07-14 20:57 ` [PATCH v2 52/59] drm/kmb: Cleaned up code Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 53/59] drm/kmb: disable the LCD layer in EOF irq handler Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 54/59] drm/kmb: Initialize uninitialized variables Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 55/59] drm/kmb: Added useful messages in LCD ISR Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 56/59] kmb/drm: Prune unsupported modes Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 57/59] drm/kmb: workaround for dma undeflow issue Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 58/59] drm/kmb: Get System Clock from SCMI Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 59/59] drm/kmb: work around for planar formats Anitha Chrisanthus
2020-07-15 15:05 ` [Intel-gfx] [PATCH v2 00/59] Add support for KeemBay DRM driver Daniel Vetter
2020-07-15 15:14 ` Daniel Vetter
2020-07-15 17:06 ` Sam Ravnborg
2020-07-15 18:38 ` Chrisanthus, Anitha
2020-07-15 17:01 ` Sam Ravnborg
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