From: Liu Ying <victor.liu@nxp.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-media@vger.kernel.org
Cc: jernej.skrabec@siol.net, narmstrong@baylibre.com,
airlied@linux.ie, s.hauer@pengutronix.de, jonas@kwiboo.se,
kishon@ti.com, a.hajda@samsung.com, vkoul@kernel.org,
robh+dt@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de,
mchehab@kernel.org, shawnguo@kernel.org,
Laurent.pinchart@ideasonboard.com
Subject: [PATCH v2 06/14] dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding
Date: Thu, 14 Jan 2021 17:22:04 +0800 [thread overview]
Message-ID: <1610616132-8220-7-git-send-email-victor.liu@nxp.com> (raw)
In-Reply-To: <1610616132-8220-1-git-send-email-victor.liu@nxp.com>
This patch adds bindings for i.MX8qm/qxp display pixel link.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v1->v2:
* Use graph schema. (Laurent)
* Require all four pixel link output ports. (Laurent)
* Mention pixel link is accessed via SCU firmware. (Rob)
.../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++++++++++++++++++++
1 file changed, 106 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
new file mode 100644
index 00000000..3af67cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qm/qxp Display Pixel Link
+
+maintainers:
+ - Liu Ying <victor.liu@nxp.com>
+
+description: |
+ The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
+ asynchronous linkage between pixel sources(display controller or
+ camera module) and pixel consumers(imaging or displays).
+ It consists of two distinct functions, a pixel transfer function and a
+ control interface. Multiple pixel channels can exist per one control channel.
+ This binding documentation is only for pixel links whose pixel sources are
+ display controllers.
+
+ The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
+ firmware.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx8qm-dc-pixel-link
+ - fsl,imx8qxp-dc-pixel-link
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: The pixel link input port node from upstream video source.
+
+ patternProperties:
+ "^port@[1-4]$":
+ $ref: /schemas/graph.yaml#/properties/port
+ description: The pixel link output port node to downstream bridge.
+
+ required:
+ - port@0
+ - port@1
+ - port@2
+ - port@3
+ - port@4
+
+required:
+ - compatible
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ dc0-pixel-link0 {
+ compatible = "fsl,imx8qxp-dc-pixel-link";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* from dc0 pixel combiner channel0 */
+ port@0 {
+ reg = <0>;
+
+ dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint {
+ remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_pixel_link0>;
+ };
+ };
+
+ /* to PXL2DPIs in MIPI/LVDS combo subsystems */
+ port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi_lvds_0_pxl2dpi_dc0_pixel_link0>;
+ };
+
+ dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_lvds_1_pxl2dpi_dc0_pixel_link0>;
+ };
+ };
+
+ /* unused */
+ port@2 {
+ reg = <2>;
+ };
+
+ /* unused */
+ port@3 {
+ reg = <3>;
+ };
+
+ /* to imaging subsystem */
+ port@4 {
+ reg = <4>;
+ };
+ };
+ };
--
2.7.4
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next prev parent reply other threads:[~2021-01-15 8:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-14 9:21 [PATCH v2 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs Liu Ying
2021-01-14 9:21 ` [PATCH v2 01/14] phy: Add LVDS configuration options Liu Ying
2021-01-14 9:22 ` [PATCH v2 02/14] media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner Liu Ying
2021-01-14 9:22 ` [PATCH v2 03/14] media: docs: " Liu Ying
2021-01-14 9:22 ` [PATCH v2 04/14] dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding Liu Ying
2021-01-25 21:09 ` Rob Herring
2021-01-14 9:22 ` [PATCH v2 05/14] drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support Liu Ying
2021-01-14 9:22 ` Liu Ying [this message]
2021-01-25 21:10 ` [PATCH v2 06/14] dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding Rob Herring
2021-01-14 9:22 ` [PATCH v2 07/14] drm/bridge: imx: Add i.MX8qm/qxp display pixel link support Liu Ying
2021-01-14 9:22 ` [PATCH v2 08/14] dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding Liu Ying
2021-01-25 21:13 ` Rob Herring
2021-01-26 9:00 ` Liu Ying
2021-01-14 9:22 ` [PATCH v2 09/14] drm/bridge: imx: Add i.MX8qxp pixel link to DPI support Liu Ying
2021-01-14 9:22 ` [PATCH v2 10/14] drm/bridge: imx: Add LDB driver helper support Liu Ying
2021-01-14 9:22 ` [PATCH v2 11/14] dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge binding Liu Ying
2021-01-25 21:19 ` Rob Herring
2021-01-26 9:02 ` Liu Ying
2021-01-14 9:22 ` [PATCH v2 12/14] drm/bridge: imx: Add LDB support for i.MX8qxp Liu Ying
2021-01-14 9:22 ` [PATCH v2 13/14] drm/bridge: imx: Add LDB support for i.MX8qm Liu Ying
2021-01-14 9:22 ` [PATCH v2 14/14] MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs Liu Ying
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