From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PULL] drm-intel-next Date: Fri, 14 Feb 2014 14:30:35 +0100 Message-ID: <20140214133035.GA29941@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ea0-f170.google.com (mail-ea0-f170.google.com [209.85.215.170]) by gabe.freedesktop.org (Postfix) with ESMTP id A5342FAA19 for ; Fri, 14 Feb 2014 05:30:45 -0800 (PST) Received: by mail-ea0-f170.google.com with SMTP id g15so3976938eak.15 for ; Fri, 14 Feb 2014 05:30:44 -0800 (PST) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: Dave Airlie Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org Hi Dave, First pull request for 3.15! One week later than usual since our QA was celbrating Chines New Year ;-) drm-intel-next-2014-02-07: - Yet more steps towards atomic modeset from Ville. - DP panel power sequencing improvements from Paulo. - irq code cleanups from Ville. - 5.4 GHz dp lane clock support for bdw/hsw from Todd. - Clock readout support for hsw/bdw (aka fastboot) from Jesse. - Make pipe underruns report at ERROR level (Ville). This is to check our improved watermarks code. - Full ppgtt support from Ben for gen7. - More fbc fixes and improvements from Ville all over the place, unfortunat= ely not yet enabled by default on more platforms. - w/a cleanups from Ville. - HiZ stall optimization settings (Chia-I Wu). - Display register mmio offset refactor patch from Antti. - RPS improvements for corner-cases from Jeff McGee. And a few notes: - 2 weeks of vacation for me, so this is a "send pull request and disappear" thing ;-) - Full ppgtt has some rather gross regressions still, especially in some corner-cases where we recourse into our code (e.g. when waiting for ring space or low mem) and then get a bit surprised. The (imo likely) contingency plan for 3.15 is to disable it. Note that the old code is still being tested in -nightly with the full QA suite on snb (since the tlbs are busted there, so no full ppgtt support). There's 1-2 issues still even in that mode due to the topic/ppgtt merge, but nothing truly dramatic. - I have a big pile of drm doc patches that I wanted to polish a bit more and flush out before vacation. I guess that'll happen in 2 weeks ... Cheers, Daniel The following changes since commit ef64cf9d06049e4e9df661f3be60b217e476bee1: Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouv= eau/linux-2.6 into drm-next (2014-01-30 10:46:06 +1000) are available in the git repository at: ssh://git.freedesktop.org/git/drm-intel tags/drm-intel-next-2014-02-07 for you to fetch changes up to b8a5ff8d7c676a04e0da5ec16bb068dd39459042: drm/i915: Update rps interrupt limits (2014-02-07 10:26:17 +0100) ---------------------------------------------------------------- - Yet more steps towards atomic modeset from Ville. - DP panel power sequencing improvements from Paulo. - irq code cleanups from Ville. - 5.4 GHz dp lane clock support for bdw/hsw from Todd. - Clock readout support for hsw/bdw (aka fastboot) from Jesse. - Make pipe underruns report at ERROR level (Ville). This is to check our improved watermarks code. - Full ppgtt support from Ben for gen7. - More fbc fixes and improvements from Ville all over the place, unfortunat= ely not yet enabled by default on more platforms. - w/a cleanups from Ville. - HiZ stall optimization settings (Chia-I Wu). - Display register mmio offset refactor patch from Antti. - RPS improvements for corner-cases from Jeff McGee. ---------------------------------------------------------------- Antti Koskipaa (1): drm/i915: Reorganize display pipe register accesses Ben Widawsky (54): drm/i915: Provide PDP updates via MMIO drm/i915: Don't unconditionally try to deref aliasing ppgtt drm/i915: Allow ggtt lookups to not WARN drm/i915: Takedown drm_mm on failed gtt setup drm/i915: Handle inactivating objects for all VMAs drm/i915: Add vm to error BO capture drm/i915: Don't use gtt mapping for !gtt error objects drm/i915: Identify active VM for batchbuffer capture drm/i915: Make pin count per VMA drm/i915: Create bind/unbind abstraction for VMAs drm/i915: Remove vm arg from relocate entry drm/i915: Add a context open function drm/i915: relax context alignment drm/i915: Simplify ring handling in execbuf drm/i915: Permit contexts on all rings drm/i915: Track which ring a context ran on drm/i915: Better reset handling for contexts drm/i915: Split context enabling from init drm/i915: Generalize default context setup drm/i915: PPGTT vfuncs should take a ppgtt argument drm/i915: Use drm_mm for PPGTT PDEs drm/i915: One hopeful eviction on PPGTT alloc drm/i915: Use platform specific ppgtt enable drm/i915: Extract mm switching to function drm/i915: Use LRI for switching PP_DIR_BASE drm/i915: Flush TLBs after !RCS PP_DIR_BASE drm/i915: Generalize PPGTT init drm/i915: Reorganize intel_enable_ppgtt drm/i915: Add VM to context drm/i915: Write PDEs at init instead of enable drm/i915: Restore PDEs for all VMs drm/i915: Do aliasing PPGTT init with contexts drm/i915: Create a per file_priv default context drm/i915: Piggy back hangstats off of contexts drm/i915: Get context early in execbuf drm/i915: Defer request freeing drm/i915: Clean up VMAs before freeing drm/i915: Do not allow buffers at offset 0 drm/i915: Use multiple VMs -- the point of no return drm/i915: Remove extraneous mm_switch in ppgtt enable drm/i915: Add PPGTT dumper drm/i915: Dump all ppgtt drm/i915/ppgtt: Fix ioctl errno for "no such context" drm/i915/bdw: Return -ENONENT on default ctx destroy drm/i915: set ctx->initialized only after RCS drm/i915: Remove incorrect comment about struct mutex drm/i915: Create a USES_PPGTT macro drm/i915: Extract register state error capture drm/i915: Logically reorder error register capture drm/i915: Reorder struct members drm/i915: Move per ring error state to ring_error drm/i915: Add some more registers to error state drm/i915: Capture PPGTT info on error capture drm/i915: Generate a hang error code Chia-I Wu (2): drm/i915: enable HiZ Raw Stall Optimization on HSW drm/i915: enable HiZ Raw Stall Optimization on IVB Chris Wilson (10): drm/i915: Free requests after object release when retiring requests drm/i915: Place the Global GTT VM first in the list of VM drm/i915: Always pin the default context drm/i915: Include HW status page in error capture drm/i915: VM eviction only targets address space not physical pages drm/i915: Only print information for filing bug reports once drm/i915: Don't access snooped pages through the GTT (even for error = capture) drm/i915: Convert EFAULT into a silent SIGBUS drm/i915: Treat using a purged buffer as a source of EFAULT drm/i915: Prevent recursion by retiring requests when the ring is full Damien Lespiau (6): drm/i915: Don't use i915_preliminary_hw_support to mean pre-production drm/i915: Turn get_aux_clock_divider() into per-platform vfuncs drm/i915: Factor out a function returning the AUX_CTL value to start = a send drm/i915: Reorder the AUX_CTL bits in descending order drm/i915: Introduce a get_aux_send_ctl() vfunc drm/i915: Constify the drm_i915_private pointer a bit more Daniel Vetter (15): Merge commit drm-intel-fixes into topic/ppgtt drm/i915: Reject the pin ioctl on gen6+ drm/i915: Drop I915_PARAM_HAS_FULL_PPGTT again drm/i915: Reject non-default contexts on non-render again Revert "drm/i915: Do not allow buffers at offset 0" drm/i915: Reject NEEDS_GTT relocations with full ppgtt drm/i915: Don't check for NEEDS_GTT when deciding the address space drm/i915: fix ppgtt dump code for DEBUG_FS=3Dn drm/i915: Only restore backlight combination mode reg for ums drm/i915: drop ironlake_ prefix from edp panel/backlight functions drm/i915: Shuffle modeset reset handling around Merge branch 'topic/ppgtt' into drm-intel-next-queued drm/i915: GEN7_MSG_CONTROL is ivb-only drm/i915: Kerneldoc for i915_gem_evict.c Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-q= ueued Deepak S (2): drm/i915: Disable/Enable PM Intrrupts based on the current freq. drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx = is power gated. Imre Deak (7): drm/i915: clean up HPD IRQ debug printing drm/i915: fix wait_remaining_ms_from_jiffies drm/i915: fix initial timestamps for PP sequencing logic drm/i915: vlv: don't unmask IIR[DISPLAY_PIPE_A/B_VBLANK] interrupt drm/i915: factor out valleyview_pipestat_irq_handler drm/i915: vlv: s/spin_lock_irqsave/spin_lock/ in irq handler drm/i915: unify FLIP_DONE macro names Jani Nikula (4): drm/i915: drop the i915.fbpercrtc module parameter drm/i915: quirk invert brightness for Acer Aspire 5336 drm/i915: move module parameters into a struct, in a new file drm/i915: drop i915_ prefix from enable_rc6, enable_fbc, enable_ppgtt= parameters Jeff McGee (2): drm/i915: Restore rps/rc6 on reset drm/i915: Update rps interrupt limits Jesse Barnes (3): drm/i915: clock readout support for DDI v3 drm/i915: always check clocks when comparing pipe configs drm/i915: fix WRPLL clock calculation Mika Kuoppala (6): drm/i915: Use i915_hw_context to set reset stats drm/i915: Tune down debug output when context is banned drm/i915: Use hangcheck score to find guilty context drm/i915: Get rid of acthd based guilty batch search drm/i915: check for oom when allocating private_default_ctx drm/i915: release mutex in i915_gem_init()'s error path Paulo Zanoni (5): drm/i915: init the DP panel power seq variables earlier drm/i915: save some time when waiting the eDP timings drm/i915: remove a column of zeros from the eDP wait definitions drm/i915: don't wait for power cycle when waiting for power off drm/i915: set the backlight panel delays registers to 1 Rodrigo Vivi (2): drm: dp helper: Add DP test sink CRC definition. drm/i915: debugfs: Add support for probing DP sink CRC. Todd Previte (1): drm/i915: Enable 5.4Ghz (HBR2) link rate for Displayport 1.2-capable = devices Ville Syrj=E4l=E4 (49): drm/i915: Pre-compute pipe enabled state drm/i915: Prepare to track new pipe config per pipe drm/i915: Use new_config and new_enabled to simplify the VLV cdclk co= de drm/i915: Don't oops if the initial modeset fails drm/i915: Set crtc->new_config to NULL for pipes that are about to be= disabled drm/i915: Add intel_hpd_irq_uninstall() drm/i915: Make irq_received bool drm/i915: Kill dev_priv->irq_received drm/i915: Fix new_config and new_enabled for load detect drm/i915: Shuffle sprite register writes into a tighter group drm/i915: Limit FIFO underrun reports on GMCH platforms drm/i915: Make underruns DRM_ERROR drm/i915: Don't write IVB_FBC_RT_BASE drm/i915: Don't set persistent FBC mode on ILK/SNB drm/i915: Don't set DPFC_HT_MODIFY bit on CTG/ILK/SNB drm/i915: Improve FBC plane defines a bit drm/i915: Use 1/2 compression ratio limit for 16bpp on FBC2 drm/i915: Actually write the correct bits to DPFC_CONTROL on CTG drm/i915: Kill most of the FBC register save/restore drm/i915: Don't preserve DPFC_CONTROL bits ILK/SNB drm/i915: Fix FBC1 enable message drm/i915: Fix FBC_FENCE_OFF drm/i915: We implement WaDisableL3Bank2xClockGate:vlv drm/i915: We implement WaEnableVGAAccessThroughIOPort:ctg, elk, ilk, = snb, ivb, vlv, hsw drm/i915: WaPsdDispatchEnable seems to be another name for WaDisableP= SDDualDispatchEnable drm/i915: We implement WaDisableL3CacheAging:vlv drm/i915: WaApplyL3ControlAndL3ChickenMode isn't applicable for VLV drm/i915: We implement WaDisableRCCUnitClockGating:snb drm/i915: We implement WaMiSetContext_Hang drm/i915: Implement WaIncreaseL3CreditsForVLVB0:vlv drm/i915: WaDisableVDSUnitClockGating isn't applicable to SNB drm/i915: WaDisableRCCUnitClockGating isn't applicable to IVB drm/i915: WaDisableRCCUnitClockGating isn't applicaple to VLV drm/i915: WaDisableRHWOOptimizationForRenderHang isn't applicable to = HSW drm/i915: WaDisableRHWOOptimizationForRenderHang isn't applicable to = VLV drm/i915: Drop bogus comment about RCPB unit clock gating on IVB drm/i915: Drop WaDisableRCZUnitClockGating:hsw drm/i915: Drop WaApplyL3ControlAndL3ChickenMode:hsw drm/i915: Drop WaDisableRCPBUnitClockGating:vlv drm/i915: Add debugfs hooks for messign with watermark latencies drm/i915: Drop WaDisableVDSUtnitClockGating:vlv drm/i915: Drop WaDisableTDLUnitClockGating:vlv drm/i915: gen7_setup_fixed_func_scheduler() actually implements WaVST= hreadDispatchOverride drm/i915: Don't apply WaVSThreadDispatchOverride on HSW drm/i915: VLV wants WaVSThreadDispatchOverride too drm/i915: Clarify WaDisable4x2SubspanOptimization situation for VLV Revert "drm/i915: set conservative clock gating values on VLV v2" drm/i915: Fix IVB GT2 WaDisableDopClockGating and WaDisablePSDDualDis= patchEnable drm/i915: Drop WaDisablePSDDualDispatchEnable:ivb for IVB GT2 drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_debugfs.c | 301 ++++++++++++- drivers/gpu/drm/i915/i915_dma.c | 6 +- drivers/gpu/drm/i915/i915_drv.c | 182 +++----- drivers/gpu/drm/i915/i915_drv.h | 415 ++++++++++++------ drivers/gpu/drm/i915/i915_gem.c | 412 +++++++----------- drivers/gpu/drm/i915/i915_gem_context.c | 435 ++++++++++++++----- drivers/gpu/drm/i915/i915_gem_evict.c | 49 ++- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 164 +++---- drivers/gpu/drm/i915/i915_gem_gtt.c | 675 ++++++++++++++++++++++---= ---- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 442 +++++++++++++------ drivers/gpu/drm/i915/i915_irq.c | 259 +++++------ drivers/gpu/drm/i915/i915_params.c | 155 +++++++ drivers/gpu/drm/i915/i915_reg.h | 336 ++++++++------ drivers/gpu/drm/i915/i915_suspend.c | 40 +- drivers/gpu/drm/i915/i915_sysfs.c | 10 + drivers/gpu/drm/i915/i915_ums.c | 8 + drivers/gpu/drm/i915/intel_bios.c | 4 +- drivers/gpu/drm/i915/intel_crt.c | 2 + drivers/gpu/drm/i915/intel_ddi.c | 101 ++++- drivers/gpu/drm/i915/intel_display.c | 216 ++++++--- drivers/gpu/drm/i915/intel_dp.c | 365 +++++++++++----- drivers/gpu/drm/i915/intel_drv.h | 28 +- drivers/gpu/drm/i915/intel_fbdev.c | 4 +- drivers/gpu/drm/i915/intel_hdmi.c | 6 +- drivers/gpu/drm/i915/intel_lvds.c | 6 +- drivers/gpu/drm/i915/intel_overlay.c | 8 +- drivers/gpu/drm/i915/intel_panel.c | 17 +- drivers/gpu/drm/i915/intel_pm.c | 294 +++++++------ drivers/gpu/drm/i915/intel_ringbuffer.c | 37 +- drivers/gpu/drm/i915/intel_ringbuffer.h | 2 + drivers/gpu/drm/i915/intel_sprite.c | 18 +- drivers/gpu/drm/i915/intel_uncore.c | 8 +- include/drm/drm_dp_helper.h | 10 + 35 files changed, 3342 insertions(+), 1676 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_params.c -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch