From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PULL] drm-intel-next Date: Mon, 2 Jun 2014 08:05:27 +0200 Message-ID: <20140602060507.GA686@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 800956E451 for ; Sun, 1 Jun 2014 23:05:39 -0700 (PDT) Received: by mail-wg0-f43.google.com with SMTP id l18so4466372wgh.26 for ; Sun, 01 Jun 2014 23:05:38 -0700 (PDT) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Dave Airlie Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org Hi Dave, drm-intel-next-2014-05-23: - prep refactoring for execlists (Oscar Mateo) - corner-case fixes for runtime pm (Imre) - tons of vblank improvements from Ville - prep work for atomic plane/sprite updates (Ville) - more chv code, now almost complete (tons of different people) - refactoring and improvements for drm_irq.c merged through drm-intel-next - g4x/ilk reset improvements (Ville) - removal of encoder->mode_set - moved audio state tracking into pipe_config - shuffled fb pinning out of the platform crtc modeset callbacks into core = code - userptr support (Chris) - OOM handling improvements from Chris, with now have a neat oom notifier w= hich jumps additional debug information. - topdown allocation of ppgtt PDEs (Ben) - fixes and small improvements all over Final pull request for 3.16. QA finished testing last week, but I was goofing off over an extended w/e a bit hence the delay. Cheers, Daniel The following changes since commit 263432b021cd252570001c10404367e948ac10f0: Merge branch 'ast-updates' of ssh://people.freedesktop.org/~/linux into d= rm-next (2014-05-19 11:15:08 +1000) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-05-23 for you to fetch changes up to f83d6518a13020e3cf7abbcc6b4e6d34459d9a9f: drm/i915: Kill private_default_ctx off (2014-05-22 23:44:44 +0200) ---------------------------------------------------------------- - prep refactoring for execlists (Oscar Mateo) - corner-case fixes for runtime pm (Imre) - tons of vblank improvements from Ville - prep work for atomic plane/sprite updates (Ville) - more chv code, now almost complete (tons of different people) - refactoring and improvements for drm_irq.c merged through drm-intel-next - g4x/ilk reset improvements (Ville) - removal of encoder->mode_set - moved audio state tracking into pipe_config - shuffled fb pinning out of the platform crtc modeset callbacks into core = code - userptr support (Chris) - OOM handling improvements from Chris, with now have a neat oom notifier w= hich jumps additional debug information. - topdown allocation of ppgtt PDEs (Ben) - fixes and small improvements all over ---------------------------------------------------------------- Ben Widawsky (3): drm/i915: Use topdown allocation for PPGTT PDEs on gen6/7 drm/i915: Make aliasing a 2nd class VM drm/i915/bdw: Implement a basic PM interrupt handler Brad Volkin (1): drm/i915: Use hash tables for the command parser Chon Ming Lee (8): drm/i915/chv: Add DPIO offset for Cherryview. v3 drm/i915/chv: Update Cherryview DPLL changes to support Port D. v2 drm/i915/chv: Add vlv_pipe_to_channel drm/i915/chv: Trigger phy common lane reset drm/i915/chv: find the best divisor for the target clock v4 drm/i915/chv: Add update and enable pll for Cherryview drm/i915/chv: Add phy supports for Cherryview drm/i915/chv: Pipe select change for DP and HDMI Chris Wilson (13): drm/i915: Improve fallback ring waiting drm/i915: Flush request queue when waiting for ring space drm/i915: Use the connector name in fbdev debug messages drm/i915: Introduce mapping of user pages into video memory (userptr)= ioctl drm/i915: Only unpin the default ctx object if it exists drm/i915: Retire requests before creating a new one drm/i915: Translate ENOSPC from shmem_get_page() to ENOMEM drm/i915: Include bound and active pages in the count of shrinkable o= bjects drm/i915: Refactor common lock handling between shrinker count/scan drm/i915: Invalidate our pages under memory pressure drm/i915: Implement an oom-notifier for last resort shrinking drm/i915: Only discard backing storage on releasing the last ref drm/i915: Hold CRTC lock whilst freezing the planes Damien Lespiau (8): drm/i915/chv: Implement stolen memory size detection x86/gpu: Implement stolen memory size early quirk for CHV drm/i915: Don't cast void* pointers drm/i915: Use ilk_wm_max_level() in latency debugfs files drm/i915: Introduce a for_each_intel_crtc() macro drm/i915: Use for_each_intel_crtc() when iterating through intel_crtcs drm/i915: Introduce a for_each_crtc() macro drm/i915: Use for_each_crtc() when iterating through the CRTCs Daniel Vetter (47): drm/i915: Drop unecessary casts in i915_irq.c drm/i915: WARN_ON fence pin leaks drm/i915: Work-around garbage DR4 from UXA drm/i915: use dev_priv directly in i915_driver_unload drm/i915: Don't drop pinned fences drm/i915: Only do gtt cleanup in vma_unbind for the global vma drm/i915/hdmi: Enable hdmi mode on g4x, too drm/i915: Track hdmi mode in the pipe config drm/i915/sdvo: Use pipe_config->limited_color_range consistently drm/i915: state readout and cross checking for limited_color_range drm/i915/sdvo: use config->has_hdmi_sink drm/i915: Simplify audio handling on DDI ports drm/i915: Track has_audio in the pipe config drm/i915/dp: Move port A pll setup to g4x_pre_enable_dp drm/i915/dp: Remove ->mode_set callback drm/i915/hdmi: Remove redundant IS_VLV checks drm/i915/hdmi: Remove ->mode_set callback drm/i915/lvds: Remove ->mode_set callback drm/i915/ddi: Remove ->mode_set callback drm/i915/dsi: Remove ->mode_set callback drm/i915: Stop calling encoder->mode_set drm/i915: Make ->update_primary_plane infallible drm/i915: More cargo-culted locking for intel_update_fbc drm/i915: Sprinkle intel_edp_psr_update over crtc_enable/disable drm/i915: Inline set_base into crtc_mode_set drm/i915: Move fb pinning into __intel_set_mode drm/i915: Don't die in wait_for_pending_flips drm/i915: Shovel hw setup code out of i9xx_crtc_mode_set drm/i915: Move lowfreq_avail around a bit in ilk/hsw_crtc_mode_set drm/i915: Shovel hw setup code out of ilk_crtc_mode_set drm/i915: Shovel hw setup code out of hsw_crtc_mode_set drm/i915: Extract i9xx_set_pll_dividers drm/i915: Extract vlv_prepare_pll drm/i915: Only update shared dpll state when needed drm/i915: Extract intel_prepare_shared_dpll drm/i915: s/ironlake_/intel_ for the enable_share_dpll function drm/i915: Drop now misleading DDI comment from dp_link_down drm/i915: Remove drm_vblank_pre/post_modeset calls drm/doc: Discourage usage of MODESET_CTL ioctl drm/irq: kerneldoc polish drm/irq: Add kms-native crtc interface functions drm/i915: Use new kms-native vblank functions drm/i915: rip our vblank reset hacks for runtime PM drm/i915: Accurately initialize fifo underrun state on gmch platforms Merge branch 'topic/drm-vblank-rework' into drm-intel-next-queued drm/irq: Coding style fix drm/i915: move bsd dispatch index somewhere better Deepak S (1): drm/i915: Enable PM Interrupts target via Display Interface. Imre Deak (10): drm/i915: add various missing GTI/Gunit register definitions drm/i915: propagate the error code from runtime PM callbacks drm/i915: vlv: add runtime PM support drm/i915: vlv: enable runtime PM drm/i915: rename IOSF sideband opcodes according to the spec drm/i915: vlv/chv: fix DSI sideband register accessing drm/i915: add missing unregister_oom_notifier to the error/unload path drm/i915: remove user GTT mappings early during runtime suspend drm/i915: fix possible RPM ref leaking during RPS disabling drm/i915: disable GT power saving early during system suspend Jani Nikula (1): drm/i915: shuffle panel code Jesse Barnes (1): drm/i915: drop encoder hot_plug calls at resume Mika Kuoppala (7): drm/i915: add render state initialization drm/i915: add null render states for gen6, gen7 and gen8 drm/i915: Bail out early on gen6_signal if no semaphores drm/i915: Fix rc6 options debug info drm/i915: Enable rc6 with bdw drm/i915: Be careful with non-disp bit in PMINTRMSK drm/i915: Add null state batch to active list Oscar Mateo (8): drm/i915: Ringbuffer signal func for the second BSD ring drm/i915: Gracefully handle obj not bound to GGTT in is_pin_display drm/i915: s/intel_ring_buffer/intel_engine_cs drm/i915: Split the ringbuffers from the rings (1/3) drm/i915: Split the ringbuffers from the rings (2/3) drm/i915: Split the ringbuffers from the rings (3/3) drm/i915: s/i915_hw_context/intel_context drm/i915: Kill private_default_ctx off Paulo Zanoni (2): drm/i915: don't read HSW_AUD_PIN_ELD_CP_VLD when the power well is off drm/i915: grab the audio power domain when enabling audio on HSW+ Peter Hurley (1): drm: Use correct spinlock flavor in drm_vblank_get() Rafael Barbalho (3): drm/i915/chv: Flush caches when programming page tables drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHV drm/i915/chv: Add CHV display support Robin Schroer (1): drivers/gpu/drm/i915/intel_display: coding style fixes Shashank Sharma (1): drm/i915: Add MIPI mmio reg base Shobhit Kumar (3): drm/i915: Correct MIPI operation mode as per expected values from VBT drm/i915: MIPI init count programming as generic parameter drm/i915: MIPI PPS delays added Ville Syrj=E4l=E4 (69): drm/i915/chv: PPAT setup for Cherryview drm/i915/chv: Enable aliasing PPGTT for CHV drm/i915/chv: Add PIPESTAT register bits for Cherryview drm/i915/chv: Add DPFLIPSTAT register bits for Cherryview drm/i915/chv: Add display interrupt registers bits for Cherryview drm/i915/chv: Add DPINVGTT registers defines for Cherryview drm/i915: Convert gmch platforms over to ilk_crtc_{enable, disable}_p= lanes() drm/i915/chv: Preliminary interrupt support for Cherryview drm/i915/chv: Add Cherryview interrupt registers into debugfs drm/i915/chv: Initial clock gating support for Cherryview srm/i915/chv: Add Cherryview PCI IDs drm/i915/chv: Add DDL register defines for Cherryview drm/i915/chv: Add DPLL state readout support drm/i915/chv: CHV doesn't have CRT output x86/gpu: Sprinkle const, __init and __initconst to stolen memory quir= ks drm/i915: Disable/enable planes as the first/last thing during modese= t on gmch platforms drm/i915: Kill vblank waits after pipe enable on gmch platforms drm/i915: Convert uncleared FIFO underrun message to errors drm/i915: Drop bogus comments about display reset drm/i915: Fix ILK reset wait drm/i915: Fix ILK GPU reset domain bits drm/i915/chv: Implement WaDisablePartialInstShootdown:chv drm/i915/chv: Implement WaDisableThreadStallDopClockGating:chv drm/i915/chv: Implement WaVSRefCountFullforceMissDisable:chv and WaDS= RefCountFullforceMissDisable:chv drm/i915/chv: Implement WaDisableSemaphoreAndSyncFlipWait:chv drm/i915/chv: Implement WaDisableCSUnitClockGating:chv drm/i915/chv: Implement WaDisableSDEUnitClockGating:chv drm/i915/chv: Add some workaround notes drm/i915/chv: Clarify VLV/CHV PIPESTAT bits a bit more drrm/i915/chv: Use valleyview_pipestat_irq_handler() for CHV drm/i915/chv: Make CHV irq handler loop until all interrupts are cons= umed drm/i915/chv: Configure crtc_mask correctly for CHV drm/i915/chv: Fix gmbus for port D drm/i915/chv: Add cursor pipe offsets drm/i915/chv: Bump num_pipes to 3 drm/i915/chv: Fix PORT_TO_PIPE for CHV drm/i915/chv: Register port D encoders and connectors drm/i915/chv: Fix CHV PLL state tracking drm/i915/chv: Move data lane deassert to encoder pre_enable drm/i915/chv: Turn off dclkp after the PLL has been disabled drm/i915/chv: Reset data lanes in encoder .post_disable() hook drm/i915/chv: Set soft reset override bit for data lane resets drm/i915/chv: Don't use PCS group access reads drm/i915/chv: Don't do group access reads from TX lanes either drm/i915/chv: Use RMW to toggle swing calc init drm/i915/chv: Add a bunch of pre production workarounds drm/i915: Drop /** */ comments from i915_reg.h drm/i915: Kill RMW from ILK reset code drm/i915: Clear GDSR after reset on ILK drm: Make the vblank disable timer per-crtc drm: Make blocking vblank wait return when the vblank interrupts get = disabled drm: Add drm_vblank_on() drm/i915: Fix mmio vs. CS flip race on ILK+ drm/i915: Wait for vblank in hsw_enable_ips() drm/i915: Drop the excessive vblank waits from modeset codepaths drm/i915: Move buffer pinning and ring selection to intel_crtc_page_f= lip() drm/i915: Re-enable vblank irqs for already active pipes drm/i915: Add a brief description of the VLV display PHY internals drm/i915: Provide DPIO diagrams as docboox tables drm/i915: Check for FIFO underuns when disabling reporting on gmch pl= atforms drm/i915: Check for FIFO underruns at the end of modeset on gmch drm/i915: Simplify the uncleared FIFO underrun detection drm/i915: Shuffle fifo underrun disable/enable points for gmch platfo= rms drm/i915: Wait for pending page flips before enabling/disabling the p= rimary plane drm/i915: Add a small adjustment to the pixel counter on interlaced m= odes drm/i915: Improve gen3/4 frame counter drm/i915: Draw a picture about video timings drm/i915: Fix gen2 and hsw+ scanline counter drm/i915: Implement WaVcpClkGateDisableForMediaReset:ctg, elk Documentation/DocBook/drm.tmpl | 107 +- arch/x86/kernel/early-quirks.c | 46 +- drivers/gpu/drm/drm_irq.c | 356 +++++-- drivers/gpu/drm/i915/Kconfig | 1 + drivers/gpu/drm/i915/Makefile | 7 + drivers/gpu/drm/i915/i915_cmd_parser.c | 170 ++- drivers/gpu/drm/i915/i915_debugfs.c | 162 +-- drivers/gpu/drm/i915/i915_dma.c | 46 +- drivers/gpu/drm/i915/i915_drv.c | 497 ++++++++- drivers/gpu/drm/i915/i915_drv.h | 201 +++- drivers/gpu/drm/i915/i915_gem.c | 367 +++++-- drivers/gpu/drm/i915/i915_gem_context.c | 79 +- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 8 + drivers/gpu/drm/i915/i915_gem_execbuffer.c | 37 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 113 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 5 +- drivers/gpu/drm/i915/i915_gem_render_state.c | 198 ++++ drivers/gpu/drm/i915/i915_gem_userptr.c | 711 +++++++++++++ drivers/gpu/drm/i915/i915_gpu_error.c | 14 +- drivers/gpu/drm/i915/i915_irq.c | 466 +++++++-- drivers/gpu/drm/i915/i915_reg.h | 644 +++++++++--- drivers/gpu/drm/i915/i915_suspend.c | 2 - drivers/gpu/drm/i915/i915_sysfs.c | 2 +- drivers/gpu/drm/i915/i915_trace.h | 26 +- drivers/gpu/drm/i915/intel_ddi.c | 97 +- drivers/gpu/drm/i915/intel_display.c | 1381 ++++++++++++++++-----= ---- drivers/gpu/drm/i915/intel_dp.c | 348 ++++++- drivers/gpu/drm/i915/intel_drv.h | 44 +- drivers/gpu/drm/i915/intel_dsi.c | 39 +- drivers/gpu/drm/i915/intel_dsi.h | 13 +- drivers/gpu/drm/i915/intel_fbdev.c | 30 +- drivers/gpu/drm/i915/intel_hdmi.c | 228 +++- drivers/gpu/drm/i915/intel_lvds.c | 14 - drivers/gpu/drm/i915/intel_overlay.c | 12 +- drivers/gpu/drm/i915/intel_panel.c | 150 +-- drivers/gpu/drm/i915/intel_pm.c | 182 ++-- drivers/gpu/drm/i915/intel_renderstate.h | 48 + drivers/gpu/drm/i915/intel_renderstate_gen6.c | 289 ++++++ drivers/gpu/drm/i915/intel_renderstate_gen7.c | 253 +++++ drivers/gpu/drm/i915/intel_renderstate_gen8.c | 479 +++++++++ drivers/gpu/drm/i915/intel_ringbuffer.c | 376 ++++--- drivers/gpu/drm/i915/intel_ringbuffer.h | 138 +-- drivers/gpu/drm/i915/intel_sdvo.c | 33 +- drivers/gpu/drm/i915/intel_sideband.c | 51 +- drivers/gpu/drm/i915/intel_sprite.c | 8 +- drivers/gpu/drm/i915/intel_uncore.c | 61 +- include/drm/drmP.h | 10 +- include/drm/i915_pciids.h | 6 + include/uapi/drm/i915_drm.h | 16 + 49 files changed, 6789 insertions(+), 1782 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_gem_render_state.c create mode 100644 drivers/gpu/drm/i915/i915_gem_userptr.c create mode 100644 drivers/gpu/drm/i915/intel_renderstate.h create mode 100644 drivers/gpu/drm/i915/intel_renderstate_gen6.c create mode 100644 drivers/gpu/drm/i915/intel_renderstate_gen7.c create mode 100644 drivers/gpu/drm/i915/intel_renderstate_gen8.c -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch