From mboxrd@z Thu Jan 1 00:00:00 1970 From: wangyan wang Subject: [PATCH V6 4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 Date: Mon, 25 Feb 2019 10:09:08 +0800 Message-ID: <20190225020912.29120-5-wangyan.wang@mediatek.com> References: <20190225020912.29120-1-wangyan.wang@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20190225020912.29120-1-wangyan.wang@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Michael Turquette , Stephen Boyd , CK Hu Cc: wangyan wang , Matthias Brugger , Philipp Zabel , David Airlie , Daniel Vetter , chunhui dai , Colin Ian King , Sean Wang , Ryder Lee , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, srv_heupstream@mediatek.com List-Id: dri-devel@lists.freedesktop.org From: chunhui dai Due to a clerical error,there is one zero less for 12800000. Fix it for 128000000. Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623") Reviewed-by: CK Hu Signed-off-by: chunhui dai Signed-off-by: wangyan wang --- drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index 43bc058d5528..88dd9e812ca0 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -114,8 +114,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, if (rate <= 64000000) pos_div = 3; - else if (rate <= 12800000) - pos_div = 1; + else if (rate <= 128000000) + pos_div = 2; else pos_div = 1; -- 2.14.1