From: Daniel Vetter <daniel@ffwll.ch>
To: Thomas Zimmermann <tzimmermann@suse.de>
Cc: David Airlie <airlied@linux.ie>, Sean Paul <sean@poorly.run>,
Emil Velikov <emil.l.velikov@gmail.com>,
dri-devel <dri-devel@lists.freedesktop.org>,
Gerd Hoffmann <kraxel@redhat.com>,
Sam Ravnborg <sam@ravnborg.org>
Subject: Re: [PATCH 1/2] drm/shmem: Use cached mappings by default
Date: Fri, 15 May 2020 16:10:44 +0200 [thread overview]
Message-ID: <20200515141044.GH206103@phenom.ffwll.local> (raw)
In-Reply-To: <6cec8a8a-d642-cd93-906a-eafab49a12d7@suse.de>
On Fri, May 15, 2020 at 08:58:02AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 14.05.20 um 22:36 schrieb Rob Herring:
> > On Thu, May 14, 2020 at 7:40 AM Daniel Vetter <daniel@ffwll.ch> wrote:
> >>
> >> On Wed, May 13, 2020 at 05:03:11PM +0200, Thomas Zimmermann wrote:
> >>> SHMEM-buffer backing storage is allocated from system memory; which is
> >>> typically cachable. Currently, only virtio uses cachable mappings; udl
> >>> uses its own vmap/mmap implementation for cachable mappings. Other
> >>> drivers default to writecombine mappings.
> >>
> >> I'm pretty sure this breaks all these drivers. quick grep on a few
> >> functions says this is used by lima, panfrost, v3d. And they definitely
> >> need uncached/wc stuff afaiui. Or I'm completely missing something?
> >
>
> OK. I think I'll just make a patch that adds a .gem_create_object helper
> that sets the map_cached flag. So drivers can opt-in.
>
> > Yes, that would be my guess. DMA is usually non-coherent on Arm.
>
> Can one of you give me some pointer to what you're looking at? For
> example, I grepped for use of vmap within lima and only found [1].
> That's a for memcpy with no DMA involved. There's got to be something
> I'm missing.
>
> Best regards
> Thomas
>
> [1]
> https://cgit.freedesktop.org/drm/drm-tip/tree/drivers/gpu/drm/lima/lima_sched.c#n391
$ git grep drm_gem_shmem_mmap
We also need correct access from userspace, otherwise the gpu is going to
be sad.
-Daniel
>
> >
> > Rob
> >
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2020-05-15 14:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-13 15:03 [PATCH 0/2] Default to cachable mappings for GEM SHMEM Thomas Zimmermann
2020-05-13 15:03 ` [PATCH 1/2] drm/shmem: Use cached mappings by default Thomas Zimmermann
2020-05-13 15:06 ` Thomas Zimmermann
2020-05-14 12:40 ` Daniel Vetter
2020-05-14 15:27 ` Thomas Zimmermann
2020-05-14 20:36 ` Rob Herring
2020-05-15 6:58 ` Thomas Zimmermann
2020-05-15 14:10 ` Daniel Vetter [this message]
2020-05-18 8:13 ` Thomas Zimmermann
2020-05-18 8:23 ` Gerd Hoffmann
2020-05-18 8:50 ` Thomas Zimmermann
2020-05-18 10:11 ` Gerd Hoffmann
2020-05-18 14:40 ` Daniel Vetter
2020-05-19 6:31 ` Thomas Zimmermann
2020-05-13 15:03 ` [PATCH 2/2] drm/udl: Use GEM vmap/mmap function from SHMEM helpers Thomas Zimmermann
2020-05-13 15:49 ` Daniel Vetter
2020-05-13 17:19 ` Thomas Zimmermann
2020-05-14 12:44 ` Daniel Vetter
2020-05-19 6:36 ` Thomas Zimmermann
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