From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Davis <ben.davis@arm.com>
Cc: Jonas Karlman <jonas@kwiboo.se>,
airlied@linux.ie, liviu.dudau@arm.com, matteo.franchin@arm.com,
dri-devel@lists.freedesktop.org, tzimmermann@suse.de, nd@arm.com
Subject: Re: [PATCH v2] drm: drm_fourcc: add NV15, Q410, Q401 YUV formats
Date: Fri, 29 May 2020 13:53:28 +0200 [thread overview]
Message-ID: <20200529115328.GC1630358@phenom.ffwll.local> (raw)
In-Reply-To: <20200529114726.13926-1-ben.davis@arm.com>
On Fri, May 29, 2020 at 12:47:26PM +0100, Ben Davis wrote:
> DRM_FORMAT_NV15 is a 2 plane format suitable for linear and 16x16
Is there a specific modifier for this 16x16 block linear format? Feels a
bit confusing, would be great to add that to the commit message so usage
is clearer. We have DRM_FORMAT_MOD_SAMSUNG_16_16_TILE, maybe that needs
another name (but same number) if this is commonly used across multiple
different gpu.
-Daniel
> block-linear memory layouts. The format is similar to P010 with 4:2:0
> sub-sampling but has no padding between components. Instead, luminance
> and chrominance samples are grouped into 4s so that each group is packed
> into an integer number of bytes:
>
> YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes
>
> The '15' suffix refers to the optimum effective bits per pixel which is
> achieved when the total number of luminance samples is a multiple of 8.
>
> Q410 and Q401 are both 3 plane non-subsampled formats with 16 bits per
> component, but only 10 bits are used and 6 are padded. 'Q' is chosen
> as the first letter to denote 3 plane YUV444, (and is the next letter
> along from P which is usually 2 plane).
>
> V2: Updated block_w of NV15 to {4, 2, 0}
>
> NV15:
> Tested-by: Jonas Karlman <jonas@kwiboo.se>
>
> Reviewed-by: Brian Starkey <brian.starkey@arm.com>
> Signed-off-by: Ben Davis <ben.davis@arm.com>
> ---
> drivers/gpu/drm/drm_fourcc.c | 12 ++++++++++++
> include/uapi/drm/drm_fourcc.h | 24 ++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index b234bfaeda06..722c7ebe4e88 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -274,6 +274,18 @@ const struct drm_format_info *__drm_format_info(u32 format)
> { .format = DRM_FORMAT_YUV420_10BIT, .depth = 0,
> .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
> .is_yuv = true },
> + { .format = DRM_FORMAT_NV15, .depth = 0,
> + .num_planes = 2, .char_per_block = { 5, 5, 0 },
> + .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
> + .vsub = 2, .is_yuv = true },
> + { .format = DRM_FORMAT_Q410, .depth = 0,
> + .num_planes = 3, .char_per_block = { 2, 2, 2 },
> + .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
> + .vsub = 0, .is_yuv = true },
> + { .format = DRM_FORMAT_Q401, .depth = 0,
> + .num_planes = 3, .char_per_block = { 2, 2, 2 },
> + .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
> + .vsub = 0, .is_yuv = true },
> };
>
> unsigned int i;
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 9e488d10f8b4..bed51236aed9 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -236,6 +236,12 @@ extern "C" {
> #define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
> #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
> #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
> +/*
> + * 2 plane YCbCr
> + * index 0 = Y plane, [39:0] Y3:Y2:Y1:Y0 little endian
> + * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
> + */
> +#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */
>
> /*
> * 2 plane YCbCr MSB aligned
> @@ -265,6 +271,24 @@ extern "C" {
> */
> #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */
>
> +
> +/* 3 plane non-subsampled (444) YCbCr
> + * 16 bits per component, but only 10 bits are used and 6 bits are padded
> + * index 0: Y plane, [15:0] Y:x [10:6] little endian
> + * index 1: Cb plane, [15:0] Cb:x [10:6] little endian
> + * index 2: Cr plane, [15:0] Cr:x [10:6] little endian
> + */
> +#define DRM_FORMAT_Q410 fourcc_code('Q', '4', '1', '0')
> +
> +/* 3 plane non-subsampled (444) YCrCb
> + * 16 bits per component, but only 10 bits are used and 6 bits are padded
> + * index 0: Y plane, [15:0] Y:x [10:6] little endian
> + * index 1: Cr plane, [15:0] Cr:x [10:6] little endian
> + * index 2: Cb plane, [15:0] Cb:x [10:6] little endian
> + */
> +#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
> +
> +
> /*
> * 3 plane YCbCr
> * index 0: Y plane, [7:0] Y
> --
> 2.24.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2020-05-29 11:53 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 11:47 [PATCH v2] drm: drm_fourcc: add NV15, Q410, Q401 YUV formats Ben Davis
2020-05-29 11:53 ` Daniel Vetter [this message]
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