From: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
To: bhanuprakash.modem@intel.com, dri-devel@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Subject: [v6 2/3] drm/i915/dp: Attach and set drm connector VRR property
Date: Sat, 20 Jun 2020 02:41:05 +0530 [thread overview]
Message-ID: <20200619211106.19207-3-bhanuprakash.modem@intel.com> (raw)
In-Reply-To: <20200612230444.10121-1-manasi.d.navare@intel.com>
From: Aditya Swarup <aditya.swarup@intel.com>
This function sets the VRR property for connector based
on the platform support, EDID monitor range and DP sink
DPCD capability of outputing video without msa
timing information.
v5:
* Fix the vrr prop not being set in kernel (Manasi)
* Unset the prop on connector disconnect (Manasi)
v4:
* Rebase (Mansi)
v3:
* intel_dp_is_vrr_capable can be used for debugfs, make it
non static (Manasi)
v2:
* Just set this in intel_dp_get_modes instead of new hook (Jani)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 27 +++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 42589cae766d..d0dba81cfb07 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6149,6 +6149,9 @@ intel_dp_detect(struct drm_connector *connector,
if (status == connector_status_disconnected) {
memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
+ /*Reset the immutable VRR Capable property */
+ drm_connector_set_vrr_capable_property(connector,
+ false);
if (intel_dp->is_mst) {
drm_dbg_kms(&dev_priv->drm,
@@ -6256,6 +6259,23 @@ intel_dp_force(struct drm_connector *connector)
intel_display_power_put(dev_priv, aux_domain, wakeref);
}
+bool intel_dp_is_vrr_capable(struct drm_connector *connector)
+{
+ struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
+ const struct drm_display_info *info = &connector->display_info;
+ struct drm_i915_private *dev_priv = to_i915(connector->dev);
+
+ /*
+ * DP Sink is capable of Variable refresh video timings if
+ * Ignore MSA bit is set in DPCD.
+ * EDID monitor range also should be atleast 10 for reasonable
+ * Adaptive sync/ VRR end user experience.
+ */
+ return INTEL_GEN(dev_priv) >= 12 &&
+ drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&
+ info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;
+}
+
static int intel_dp_get_modes(struct drm_connector *connector)
{
struct intel_connector *intel_connector = to_intel_connector(connector);
@@ -6264,6 +6284,10 @@ static int intel_dp_get_modes(struct drm_connector *connector)
edid = intel_connector->detect_edid;
if (edid) {
int ret = intel_connector_update_modes(connector, edid);
+
+ if (intel_dp_is_vrr_capable(connector))
+ drm_connector_set_vrr_capable_property(connector,
+ true);
if (ret)
return ret;
}
@@ -7325,6 +7349,9 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT;
}
+
+ if (INTEL_GEN(dev_priv) >= 12)
+ drm_connector_attach_vrr_capable_property(connector);
}
static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 0a8950f744f6..db895a3cd93f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -14,6 +14,7 @@ enum pipe;
enum port;
struct drm_connector_state;
struct drm_encoder;
+struct drm_connector;
struct drm_i915_private;
struct drm_modeset_acquire_ctx;
struct drm_dp_vsc_sdp;
@@ -120,6 +121,7 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
unsigned int type);
bool intel_digital_port_connected(struct intel_encoder *encoder);
void intel_dp_process_phy_request(struct intel_dp *intel_dp);
+bool intel_dp_is_vrr_capable(struct drm_connector *connector);
static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
{
--
2.20.1
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next prev parent reply other threads:[~2020-06-19 13:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 23:04 [PATCH v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs Manasi Navare
2020-06-12 23:04 ` [PATCH v6 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD Manasi Navare
2020-06-18 23:23 ` Manasi Navare
2020-06-12 23:04 ` [PATCH v6 2/3] drm/i915/dp: Attach and set drm connector VRR property Manasi Navare
2020-06-12 23:04 ` [PATCH v6 3/3] drm/i915/dp: Expose connector VRR monitor range via debugfs Manasi Navare
2020-06-12 23:56 ` [PATCH v7 " Manasi Navare
2020-06-15 21:36 ` Emil Velikov
2020-06-15 21:48 ` Manasi Navare
2020-06-16 15:34 ` Emil Velikov
2020-06-18 18:35 ` Manasi Navare
2020-06-13 2:00 ` [Intel-gfx] [PATCH v6 " kernel test robot
2020-06-13 5:41 ` kernel test robot
2020-06-16 5:43 ` kernel test robot
2020-06-19 21:11 ` [v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs Bhanuprakash Modem
2020-06-19 21:11 ` [v6 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD Bhanuprakash Modem
2020-06-19 21:11 ` Bhanuprakash Modem [this message]
2020-06-19 21:11 ` [v8 3/3] drm/debug: Expose connector VRR monitor range via debugfs Bhanuprakash Modem
2020-06-19 21:23 [v6 0/3] VRR capable attach prop in i915, DPCD helper, VRR debugfs Bhanuprakash Modem
2020-06-19 21:23 ` [v6 2/3] drm/i915/dp: Attach and set drm connector VRR property Bhanuprakash Modem
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