dri-devel.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: CQ Tang <cq.tang@intel.com>,
	Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>,
	dri-devel@lists.freedesktop.org,
	Michal Wajdeczko <michal.wajdeczko@intel.com>
Subject: [RFC PATCH 083/162] drm/i915: Update the helper to set correct mapping
Date: Fri, 27 Nov 2020 12:05:59 +0000	[thread overview]
Message-ID: <20201127120718.454037-84-matthew.auld@intel.com> (raw)
In-Reply-To: <20201127120718.454037-1-matthew.auld@intel.com>

From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>

Determine the possible coherent map type based on object location,
and if target has llc or if user requires an always coherent
mapping.

Cc: Matthew Auld <matthew.auld@intel.com>
Cc: CQ Tang <cq.tang@intel.com>
Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c            |  3 ++-
 drivers/gpu/drm/i915/gt/intel_engine_pm.c            |  2 +-
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c |  4 ++--
 drivers/gpu/drm/i915/gt/intel_ring.c                 |  9 ++++++---
 drivers/gpu/drm/i915/gt/intel_timeline.c             |  8 ++++++--
 drivers/gpu/drm/i915/gt/selftest_context.c           |  3 ++-
 drivers/gpu/drm/i915/gt/selftest_execlists.c         |  3 ++-
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c         |  4 ++--
 drivers/gpu/drm/i915/gt/uc/intel_guc.c               |  4 +++-
 drivers/gpu/drm/i915/gt/uc/intel_huc.c               |  4 +++-
 drivers/gpu/drm/i915/i915_drv.h                      | 11 +++++++++--
 drivers/gpu/drm/i915/selftests/igt_spinner.c         |  4 ++--
 12 files changed, 40 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 420c6a35f3ed..677c97ded81d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -680,7 +680,8 @@ static int init_status_page(struct intel_engine_cs *engine)
 	if (ret)
 		goto err;
 
-	vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+	vaddr = i915_gem_object_pin_map(obj,
+					i915_coherent_map_type(engine->i915, obj, true));
 	if (IS_ERR(vaddr)) {
 		ret = PTR_ERR(vaddr);
 		goto err_unpin;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 5d51144ef074..1b2009b4dcb7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -24,7 +24,7 @@ static void dbg_poison_ce(struct intel_context *ce)
 
 	if (ce->state) {
 		struct drm_i915_gem_object *obj = ce->state->obj;
-		int type = i915_coherent_map_type(ce->engine->i915);
+		int type = i915_coherent_map_type(ce->engine->i915, obj, true);
 		void *map;
 
 		if (!i915_gem_object_trylock(ce->state->obj))
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 7eec42b27bc1..582a9044727e 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3535,8 +3535,8 @@ __execlists_context_pre_pin(struct intel_context *ce,
 	GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
 
 	*vaddr = i915_gem_object_pin_map(ce->state->obj,
-					i915_coherent_map_type(ce->engine->i915) |
-					I915_MAP_OVERRIDE);
+					 i915_coherent_map_type(ce->engine->i915, ce->state->obj, false) |
+					 I915_MAP_OVERRIDE);
 	if (IS_ERR(*vaddr))
 		return PTR_ERR(*vaddr);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index 4034a4bac7f0..d636c6ed88b7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -51,9 +51,12 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
 
 	if (i915_vma_is_map_and_fenceable(vma))
 		addr = (void __force *)i915_vma_pin_iomap(vma);
-	else
-		addr = i915_gem_object_pin_map(vma->obj,
-					       i915_coherent_map_type(vma->vm->i915));
+	else {
+		int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
+
+		addr = i915_gem_object_pin_map(vma->obj, type);
+	}
+
 	if (IS_ERR(addr)) {
 		ret = PTR_ERR(addr);
 		goto err_ring;
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index b2d04717db20..065943781586 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -31,6 +31,7 @@ static int __hwsp_alloc(struct intel_gt *gt, struct intel_timeline_hwsp *hwsp)
 {
 	struct drm_i915_private *i915 = gt->i915;
 	struct drm_i915_gem_object *obj;
+	int type;
 	int ret;
 
 	obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
@@ -47,7 +48,8 @@ static int __hwsp_alloc(struct intel_gt *gt, struct intel_timeline_hwsp *hwsp)
 	}
 
 	/* Pin early so we can call i915_ggtt_pin_unlocked(). */
-	hwsp->vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+	type = i915_coherent_map_type(i915, obj, true);
+	hwsp->vaddr = i915_gem_object_pin_map(obj, type);
 	if (IS_ERR(hwsp->vaddr)) {
 		ret = PTR_ERR(hwsp->vaddr);
 		goto out_unlock;
@@ -235,9 +237,11 @@ intel_timeline_pin_map(struct intel_timeline *timeline)
 	if (!timeline->hwsp_cacheline) {
 		struct drm_i915_gem_object *obj = timeline->hwsp_ggtt->obj;
 		u32 ofs = offset_in_page(timeline->hwsp_offset);
+		int type;
 		void *vaddr;
 
-		vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+		type = i915_coherent_map_type(timeline->gt->i915, obj, true);
+		vaddr = i915_gem_object_pin_map(obj, type);
 		if (IS_ERR(vaddr))
 			return PTR_ERR(vaddr);
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index d9b0ebc938f1..86b6795dc4f3 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -89,7 +89,8 @@ static int __live_context_size(struct intel_engine_cs *engine)
 		goto err;
 
 	vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
-						 i915_coherent_map_type(engine->i915));
+						 i915_coherent_map_type(engine->i915,
+									ce->state->obj, false));
 	if (IS_ERR(vaddr)) {
 		err = PTR_ERR(vaddr);
 		intel_context_unpin(ce);
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 124011f6fb51..cb17da6a616f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -5854,7 +5854,8 @@ static int compare_isolation(struct intel_engine_cs *engine,
 	}
 
 	lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
-				      i915_coherent_map_type(engine->i915));
+					       i915_coherent_map_type(engine->i915,
+								      ce->state->obj, true));
 	if (IS_ERR(lrc)) {
 		err = PTR_ERR(lrc);
 		goto err_B1;
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index e3027cebab5b..bc93dba3c8df 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -88,7 +88,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
 	h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
 
 	vaddr = i915_gem_object_pin_map_unlocked(h->obj,
-						 i915_coherent_map_type(gt->i915));
+						 i915_coherent_map_type(gt->i915, h->obj, false));
 	if (IS_ERR(vaddr)) {
 		err = PTR_ERR(vaddr);
 		goto err_unpin_hws;
@@ -149,7 +149,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
 		return ERR_CAST(obj);
 	}
 
-	vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915));
+	vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
 	if (IS_ERR(vaddr)) {
 		i915_gem_object_put(obj);
 		i915_vm_put(vm);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index a65661eb5d5d..b54b9de31c3e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -694,7 +694,9 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
 
-	vaddr = i915_gem_object_pin_map_unlocked(vma->obj, I915_MAP_WB);
+	vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
+						 i915_coherent_map_type(guc_to_gt(guc)->i915,
+									vma->obj, true));
 	if (IS_ERR(vaddr)) {
 		i915_vma_unpin_and_release(&vma, 0);
 		return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 2126dd81ac38..56d2144dc6a0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -82,7 +82,9 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc)
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
 
-	vaddr = i915_gem_object_pin_map_unlocked(vma->obj, I915_MAP_WB);
+	vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
+						 i915_coherent_map_type(gt->i915,
+									vma->obj, true));
 	if (IS_ERR(vaddr)) {
 		i915_vma_unpin_and_release(&vma, 0);
 		return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ce8d5ff8b9f4..13cb4936f15c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -78,6 +78,7 @@
 #include "gem/i915_gem_context_types.h"
 #include "gem/i915_gem_shrinker.h"
 #include "gem/i915_gem_stolen.h"
+#include "gem/i915_gem_lmem.h"
 
 #include "gt/intel_engine.h"
 #include "gt/intel_gt_types.h"
@@ -2027,9 +2028,15 @@ static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
 }
 
 static inline enum i915_map_type
-i915_coherent_map_type(struct drm_i915_private *i915)
+i915_coherent_map_type(struct drm_i915_private *i915,
+		       struct drm_i915_gem_object *obj, bool always_coherent)
 {
-	return HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
+	if (i915_gem_object_is_lmem(obj))
+		return I915_MAP_WC;
+	if (HAS_LLC(i915) || always_coherent)
+		return I915_MAP_WB;
+	else
+		return I915_MAP_WC;
 }
 
 static inline u64 i915_cs_timestamp_ns_to_ticks(struct drm_i915_private *i915, u64 val)
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 9c461edb0b73..b2a1f98c97f5 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -93,9 +93,9 @@ int igt_spinner_pin(struct igt_spinner *spin,
 	}
 
 	if (!spin->batch) {
-		unsigned int mode =
-			i915_coherent_map_type(spin->gt->i915);
+		unsigned int mode;
 
+		mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
 		vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
 		if (IS_ERR(vaddr))
 			return PTR_ERR(vaddr);
-- 
2.26.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-11-27 12:11 UTC|newest]

Thread overview: 208+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-27 12:04 [RFC PATCH 000/162] DG1 + LMEM enabling Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 001/162] drm/i915/selftest: also consider non-contiguous objects Matthew Auld
2020-11-27 19:44   ` Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 002/162] drm/i915/selftest: assert we get 2M GTT pages Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 003/162] drm/i915/selftest: handle local-memory in perf_memcpy Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 004/162] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h Matthew Auld
2020-11-27 19:55   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 005/162] drm/i915/gt: Rename lrc.c to execlists_submission.c Matthew Auld
2020-11-27 19:56   ` Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 006/162] drm/i915: split gen8+ flush and bb_start emission functions to their own file Matthew Auld
2020-11-27 19:58   ` Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 007/162] drm/i915: split wa_bb code to its " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 008/162] HAX drm/i915: Work around the selftest timeline lock splat workaround Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 009/162] drm/i915: Introduce drm_i915_lock_isolated Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 010/162] drm/i915: Lock hwsp objects isolated for pinning at create time Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 011/162] drm/i915: Pin timeline map after first timeline pin, v5 Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 012/162] drm/i915: Move cmd parser pinning to execbuffer Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 013/162] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2 Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 014/162] drm/i915: Ensure we hold the object mutex in pin correctly v2 Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 015/162] drm/i915: Add gem object locking to madvise Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 016/162] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 017/162] drm/i915: Rework struct phys attachment handling Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 018/162] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2 Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 019/162] drm/i915: make lockdep slightly happier about execbuf Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 020/162] drm/i915: Disable userptr pread/pwrite support Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 021/162] drm/i915: No longer allow exporting userptr through dma-buf Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 022/162] drm/i915: Reject more ioctls for userptr Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 023/162] drm/i915: Reject UNSYNCHRONIZED for userptr, v2 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 024/162] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 025/162] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v5 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 026/162] drm/i915: Flatten obj->mm.lock Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 027/162] drm/i915: Populate logical context during first pin Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 028/162] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 029/162] drm/i915: Handle ww locking in init_status_page Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 030/162] drm/i915: Rework clflush to work correctly without obj->mm.lock Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 031/162] drm/i915: Pass ww ctx to intel_pin_to_display_plane Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 032/162] drm/i915: Add object locking to vm_fault_cpu Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 033/162] drm/i915: Move pinning to inside engine_wa_list_verify() Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 034/162] drm/i915: Take reservation lock around i915_vma_pin Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 035/162] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 036/162] drm/i915: Make __engine_unpark() compatible with ww locking v2 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 037/162] drm/i915: Take obj lock around set_domain ioctl Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 038/162] drm/i915: Defer pin calls in buffer pool until first use by caller Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 039/162] drm/i915: Fix pread/pwrite to work with new locking rules Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 040/162] drm/i915: Fix workarounds selftest, part 1 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 041/162] drm/i915: Prepare for obj->mm.lock removal Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 042/162] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 043/162] drm/i915: Add ww locking around vm_access() Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 044/162] drm/i915: Increase ww locking for perf Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 045/162] drm/i915: Lock ww in ucode objects correctly Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 046/162] drm/i915: Add ww locking to dma-buf ops Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 047/162] drm/i915: Add missing ww lock in intel_dsb_prepare Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 048/162] drm/i915: Fix ww locking in shmem_create_from_object Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 049/162] drm/i915: Use a single page table lock for each gtt Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 050/162] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 051/162] drm/i915/selftests: Prepare client blit " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 052/162] drm/i915/selftests: Prepare coherency tests " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 053/162] drm/i915/selftests: Prepare context " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 054/162] drm/i915/selftests: Prepare dma-buf " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 055/162] drm/i915/selftests: Prepare execbuf " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 056/162] drm/i915/selftests: Prepare mman testcases " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 057/162] drm/i915/selftests: Prepare object tests " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 058/162] drm/i915/selftests: Prepare object blit " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 059/162] drm/i915/selftests: Prepare igt_gem_utils " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 060/162] drm/i915/selftests: Prepare context selftest " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 061/162] drm/i915/selftests: Prepare hangcheck " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 062/162] drm/i915/selftests: Prepare execlists " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 063/162] drm/i915/selftests: Prepare mocs tests " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 064/162] drm/i915/selftests: Prepare ring submission " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 065/162] drm/i915/selftests: Prepare timeline tests " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 066/162] drm/i915/selftests: Prepare i915_request " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 067/162] drm/i915/selftests: Prepare memory region " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 068/162] drm/i915/selftests: Prepare cs engine " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 069/162] drm/i915/selftests: Prepare gtt " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 070/162] drm/i915: Finally remove obj->mm.lock Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 071/162] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 072/162] drm/i915: Avoid some false positives in assert_object_held() Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 073/162] drm/i915: Reference contending lock objects Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 074/162] drm/i915: Break out dma_resv ww locking utilities to separate files Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 075/162] drm/i915: Introduce a for_i915_gem_ww(){} Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 076/162] drm/i915: Untangle the vma pages_mutex Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 077/162] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 078/162] drm/i915: Return error value when bo not in LMEM for discrete Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 079/162] drm/i915/dmabuf: Disallow LMEM objects from dma-buf Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 080/162] drm/i915/lmem: Fail driver init if LMEM training failed Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 081/162] HAX drm/i915/lmem: support CPU relocations Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 082/162] HAX drm/i915/lmem: support pread and pwrite Matthew Auld
2020-11-27 12:05 ` Matthew Auld [this message]
2020-11-27 12:06 ` [RFC PATCH 084/162] drm/i915: introduce kernel blitter_context Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 085/162] drm/i915/region: support basic eviction Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 086/162] drm/i915: Add blit functions that can be called from within a WW transaction Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 087/162] drm/i915: Delay publishing objects on the eviction lists Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 088/162] drm/i915: support basic object migration Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 089/162] drm/i915/dg1: Fix occasional migration error Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 090/162] drm/i915/query: Expose memory regions through the query uAPI Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 091/162] drm/i915: Store gt in memory region Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 092/162] drm/i915/uapi: introduce drm_i915_gem_create_ext Matthew Auld
2020-11-27 13:25   ` [Intel-gfx] " Chris Wilson
2020-12-01 15:06     ` Thomas Hellström (Intel)
2020-11-27 19:21   ` Chris Wilson
2020-12-01 12:55   ` Chris Wilson
2020-12-01 13:43     ` Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 093/162] drm/i915/lmem: allocate cmd ring in lmem Matthew Auld
2020-11-27 13:27   ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 094/162] drm/i915/dg1: Do not check r->sgt.pfn for NULL Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 095/162] drm/i915/dg1: Introduce dmabuf mmap to LMEM Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 096/162] drm/i915: setup the LMEM region Matthew Auld
2020-11-30 10:14   ` Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 097/162] drm/i915: Distinction of memory regions Matthew Auld
2020-11-27 13:30   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 098/162] drm/i915/gtt: map the PD up front Matthew Auld
2020-11-27 13:31   ` Chris Wilson
2021-01-12 10:47     ` [Intel-gfx] " Matthew Auld
2021-01-12 14:33       ` Daniel Vetter
2020-11-27 12:06 ` [RFC PATCH 099/162] drm/i915/gtt/dgfx: place the PD in LMEM Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 100/162] drm/i915/gtt: make flushing conditional Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 101/162] drm/i915/gtt/dg1: add PTE_LM plumbing for PPGTT Matthew Auld
2020-11-27 13:35   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 102/162] drm/i915/gtt/dg1: add PTE_LM plumbing for GGTT Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 103/162] drm/i915: allocate context from LMEM Matthew Auld
2020-11-27 13:37   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 104/162] drm/i915: move engine scratch to LMEM Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 105/162] drm/i915: Provide a way to disable PCIe relaxed write ordering Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 106/162] drm/i915: i915 returns -EBUSY on thread contention Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 107/162] drm/i915: setup GPU device lmem region Matthew Auld
2020-11-30 11:18   ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 108/162] drm/i915: Fix object page offset within a region Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 109/162] drm/i915: add i915_gem_object_is_devmem() function Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 110/162] drm/i915: finish memory region support for stolen objects Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 111/162] drm/i915/lmem: support optional CPU clearing for special internal use Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 112/162] drm/i915/guc: put all guc objects in lmem when available Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 113/162] drm/i915: Create stolen memory region from local memory Matthew Auld
2020-12-07 13:39   ` [Intel-gfx] " Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 114/162] drm/i915/lmem: Bypass aperture when lmem is available Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 115/162] drm/i915/lmem: reset the lmem buffer created by fbdev Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 116/162] drm/i915/dsb: Enable lmem for dsb Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 117/162] drm/i915: Reintroduce mem->reserved Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
2020-11-27 13:52   ` [Intel-gfx] " Chris Wilson
2020-11-30 11:09     ` Matthew Auld
2020-11-30 11:22       ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 119/162] drm/i915/dg1: Read OPROM via SPI controller Matthew Auld
2020-11-30 10:16   ` [Intel-gfx] " Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 120/162] drm/i915/oprom: Basic sanitization Matthew Auld
2020-11-30 10:24   ` [Intel-gfx] " Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 121/162] drm/i915: WA for zero memory channel Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 122/162] drm/i915/dg1: Compute MEM Bandwidth using MCHBAR Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 123/162] drm/i915/dg1: Double memory bandwidth available Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 124/162] drm/i915/lmem: allocate HWSP in lmem Matthew Auld
2020-11-27 13:55   ` [Intel-gfx] " Chris Wilson
2020-11-30 17:17     ` Matthew Auld
2020-11-30 17:35       ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 125/162] drm/i915/lmem: Limit block size to 4G Matthew Auld
2020-11-27 14:02   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 126/162] drm/i915/gem: Update shmem available memory Matthew Auld
2020-11-27 14:04   ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 127/162] drm/i915: Allow non-uniform subslices in gen12+ Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 128/162] drm/i915/dg1: intel_memory_region_evict() changes for eviction Matthew Auld
2020-11-27 14:07   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 129/162] drm/i915/dg1: i915_gem_object_memcpy(..) infrastructure Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 130/162] drm/i915/dg1: Eviction logic Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 131/162] drm/i915/dg1: Add enable_eviction modparam Matthew Auld
2020-11-30 12:20   ` Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 132/162] drm/i915/dg1: Add lmem_size modparam Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 133/162] drm/i915/dg1: Track swap in/out stats via debugfs Matthew Auld
2020-11-27 14:09   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 134/162] drm/i915/dg1: Measure swap in/out timing stats Matthew Auld
2020-11-27 14:11   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 135/162] drm/i915: define intel_partial_pages_for_sg_table Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 136/162] drm/i915: create and destroy dummy vma Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 137/162] drm/i915: blt copy between objs using pre-created vma windows Matthew Auld
2020-11-27 14:19   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 138/162] drm/i915/dg1: Eliminate eviction mutex Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 139/162] drm/i915/dg1: Keep engine awake across whole blit Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 140/162] drm/i915: window_blt_copy is used for swapin and swapout Matthew Auld
2020-11-27 14:20   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 141/162] drm/i915: Lmem eviction statistics by category Matthew Auld
2020-11-27 14:21   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 142/162] drm/i915/gem/selftest: test and measure window based blt cpy Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 143/162] drm/i915: suspend/resume eviction Matthew Auld
2020-11-27 14:22   ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 144/162] drm/i915: Reset blitter context when unpark engine Matthew Auld
2020-11-27 14:26   ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 145/162] drm/i915/dg1: Add dedicated context for blitter eviction Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 146/162] drm/i915/pm: suspend and restore ppgtt mapping Matthew Auld
2020-11-27 14:29   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 147/162] drm/i915/gt: Allocate default ctx objects in SMEM Matthew Auld
2020-11-27 14:30   ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 148/162] drm/i915: suspend/resume enable blitter eviction Matthew Auld
2020-11-27 14:32   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 149/162] drm/i915: suspend/resume handling of perma-pinned objects Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 150/162] drm/i915: need consider system BO snoop for dgfx Matthew Auld
2020-11-27 14:36   ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 151/162] drm/i915: move eviction to prepare hook Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 152/162] drm/i915: Perform execbuffer object locking as a separate step Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 153/162] drm/i915: Implement eviction locking v2 Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 154/162] drm/i915: Support ww eviction Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 155/162] drm/i915: Use a ww transaction in the fault handler Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 156/162] drm/i915: Use a ww transaction in i915_gem_object_pin_map_unlocked() Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 157/162] drm/i915: Improve accuracy of eviction stats Matthew Auld
2020-11-27 14:40   ` [Intel-gfx] " Chris Wilson
2020-11-30 10:36     ` Tvrtko Ursulin
2020-11-27 12:07 ` [RFC PATCH 158/162] drm/i915: Support ww locks in suspend/resume Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 159/162] drm/i915/dg1: Fix mapping type for default state object Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 160/162] drm/i915/dg1: Fix GPU hang due to shmemfs page drop Matthew Auld
2020-11-27 14:44   ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 161/162] drm/i915/dg1: allow pci to auto probe Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 162/162] drm/i915: drop fake lmem Matthew Auld

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201127120718.454037-84-matthew.auld@intel.com \
    --to=matthew.auld@intel.com \
    --cc=cq.tang@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=michal.wajdeczko@intel.com \
    --cc=venkata.s.dhanalakota@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).