From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6CCFC433E0 for ; Tue, 9 Feb 2021 21:03:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DA9364E6B for ; Tue, 9 Feb 2021 21:03:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DA9364E6B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 814E36E52C; Tue, 9 Feb 2021 21:03:07 +0000 (UTC) Received: from mail-oo1-f41.google.com (mail-oo1-f41.google.com [209.85.161.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91BD96E52C for ; Tue, 9 Feb 2021 21:03:05 +0000 (UTC) Received: by mail-oo1-f41.google.com with SMTP id f1so26202oou.0 for ; Tue, 09 Feb 2021 13:03:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=VOtt3prjmqypaQTJ4pYSOiaPQHntAWw3Q/krYTfHSSk=; b=jIrGDj5bj5It2fC51OTCy41v4TmPaVMXD91OofhUXHojoaj3btZDQQreRqGLeWG9px qqOlUimQ88Ik6v3SeGCAAPECwZScIHhXv+k67ji15RaldCYqIHgAV9ZQ+jQACNRDH5z4 6djBTOFFr0N4pp/Lp6bHcn2eBlUh1xjtuDlP9U6qD8FwT4nkpOsECm9XuV+vGNkKdQ28 4hR0jQnUUdIPyMFnTZKqeYtHRCDzN9mNRH5hh5rXgYicyfAniGdhPpQ76XaDUKcFnVI8 YdXVP4BOMo3viY/0IFbp0632jLyj9M1fNNF7ChJKOv34F8aCg5UhqDhC4SbqxdRXnHOh sEaw== X-Gm-Message-State: AOAM5314J1eDsU4agMFXVLfQujhm80ODSbCPPCKLxve0rSeDB+2LSAeY +CsQddE5EKvZITUTf3B1FA== X-Google-Smtp-Source: ABdhPJxZR0I7iOxekYCbNXoQvdkurgLtI6UNYp7oKlGrjOT91AqHiylCg2zCTplwkzqaYRmDj/mP3g== X-Received: by 2002:a4a:b987:: with SMTP id e7mr17130855oop.92.1612904584869; Tue, 09 Feb 2021 13:03:04 -0800 (PST) Received: from robh.at.kernel.org (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id v17sm4510401ott.7.2021.02.09.13.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Feb 2021 13:03:03 -0800 (PST) Received: (nullmailer pid 178168 invoked by uid 1000); Tue, 09 Feb 2021 21:03:02 -0000 Date: Tue, 9 Feb 2021 15:03:02 -0600 From: Rob Herring To: Heiko Stuebner Subject: Re: [PATCH 2/6] dt-bindings: display: rockchip-dsi: add optional #phy-cells property Message-ID: <20210209210302.GA178138@robh.at.kernel.org> References: <20210202145632.1263136-1-heiko@sntech.de> <20210202145632.1263136-3-heiko@sntech.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210202145632.1263136-3-heiko@sntech.de> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, dafna.hirschfeld@collabora.com, cmuellner@linux.com, hjc@rock-chips.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, helen.koike@collabora.com, robh+dt@kernel.org, sebastian.fricke@posteo.net, Heiko Stuebner , ezequiel@collabora.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, 02 Feb 2021 15:56:28 +0100, Heiko Stuebner wrote: > From: Heiko Stuebner > > The Rockchip DSI controller on some SoCs also controls a bidrectional > dphy, which would be connected to an Image Signal Processor as a phy > in the rx configuration. > > So allow a #phy-cells property for the dsi controller. > > Signed-off-by: Heiko Stuebner > --- > .../bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel