From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"kernel test robot" <lkp@intel.com>,
dri-devel@lists.freedesktop.org
Subject: [PATCH v9 02/70] drm/i915: Pin timeline map after first timeline pin, v4.
Date: Tue, 23 Mar 2021 16:49:51 +0100 [thread overview]
Message-ID: <20210323155059.628690-3-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20210323155059.628690-1-maarten.lankhorst@linux.intel.com>
We're starting to require the reservation lock for pinning,
so wait until we have that.
Update the selftests to handle this correctly, and ensure pin is
called in live_hwsp_rollover_user() and mock_hwsp_freelist().
Changes since v1:
- Fix NULL + XX arithmatic, use casts. (kbuild)
Changes since v2:
- Clear entire cacheline when pinning.
Changes since v3:
- CACHELINE_BYTES -> TIMELINE_SEQNO_BYTES. (jekstrand)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 40 ++++++++++----
drivers/gpu/drm/i915/gt/intel_timeline.h | 2 +
drivers/gpu/drm/i915/gt/mock_engine.c | 22 +++++++-
drivers/gpu/drm/i915/gt/selftest_timeline.c | 61 +++++++++++----------
drivers/gpu/drm/i915/i915_selftest.h | 2 +
5 files changed, 83 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index efe2030cfe5e..f19cf6d2fa85 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -52,14 +52,29 @@ static int __timeline_active(struct i915_active *active)
return 0;
}
+I915_SELFTEST_EXPORT int
+intel_timeline_pin_map(struct intel_timeline *timeline)
+{
+ struct drm_i915_gem_object *obj = timeline->hwsp_ggtt->obj;
+ u32 ofs = offset_in_page(timeline->hwsp_offset);
+ void *vaddr;
+
+ vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ if (IS_ERR(vaddr))
+ return PTR_ERR(vaddr);
+
+ timeline->hwsp_map = vaddr;
+ timeline->hwsp_seqno = memset(vaddr + ofs, 0, TIMELINE_SEQNO_BYTES);
+ clflush(vaddr + ofs);
+
+ return 0;
+}
+
static int intel_timeline_init(struct intel_timeline *timeline,
struct intel_gt *gt,
struct i915_vma *hwsp,
unsigned int offset)
{
- void *vaddr;
- u32 *seqno;
-
kref_init(&timeline->kref);
atomic_set(&timeline->pin_count, 0);
@@ -76,14 +91,8 @@ static int intel_timeline_init(struct intel_timeline *timeline,
timeline->hwsp_ggtt = hwsp;
}
- vaddr = i915_gem_object_pin_map(hwsp->obj, I915_MAP_WB);
- if (IS_ERR(vaddr))
- return PTR_ERR(vaddr);
-
- timeline->hwsp_map = vaddr;
- seqno = vaddr + timeline->hwsp_offset;
- WRITE_ONCE(*seqno, 0);
- timeline->hwsp_seqno = seqno;
+ timeline->hwsp_map = NULL;
+ timeline->hwsp_seqno = (void *)(long)timeline->hwsp_offset;
GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size);
@@ -113,7 +122,8 @@ static void intel_timeline_fini(struct rcu_head *rcu)
struct intel_timeline *timeline =
container_of(rcu, struct intel_timeline, rcu);
- i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
+ if (timeline->hwsp_map)
+ i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
i915_vma_put(timeline->hwsp_ggtt);
i915_active_fini(&timeline->active);
@@ -173,6 +183,12 @@ int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww)
if (atomic_add_unless(&tl->pin_count, 1, 0))
return 0;
+ if (!tl->hwsp_map) {
+ err = intel_timeline_pin_map(tl);
+ if (err)
+ return err;
+ }
+
err = i915_ggtt_pin(tl->hwsp_ggtt, ww, 0, PIN_HIGH);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h
index b1f81d947f8d..57308c4d664a 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.h
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
@@ -98,4 +98,6 @@ intel_timeline_is_last(const struct intel_timeline *tl,
return list_is_last_rcu(&rq->link, &tl->requests);
}
+I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
+
#endif
diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c
index 5662f7c2f719..42fd86658ee7 100644
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -13,9 +13,20 @@
#include "mock_engine.h"
#include "selftests/mock_request.h"
-static void mock_timeline_pin(struct intel_timeline *tl)
+static int mock_timeline_pin(struct intel_timeline *tl)
{
+ int err;
+
+ if (WARN_ON(!i915_gem_object_trylock(tl->hwsp_ggtt->obj)))
+ return -EBUSY;
+
+ err = intel_timeline_pin_map(tl);
+ i915_gem_object_unlock(tl->hwsp_ggtt->obj);
+ if (err)
+ return err;
+
atomic_inc(&tl->pin_count);
+ return 0;
}
static void mock_timeline_unpin(struct intel_timeline *tl)
@@ -133,6 +144,8 @@ static void mock_context_destroy(struct kref *ref)
static int mock_context_alloc(struct intel_context *ce)
{
+ int err;
+
ce->ring = mock_ring(ce->engine);
if (!ce->ring)
return -ENOMEM;
@@ -143,7 +156,12 @@ static int mock_context_alloc(struct intel_context *ce)
return PTR_ERR(ce->timeline);
}
- mock_timeline_pin(ce->timeline);
+ err = mock_timeline_pin(ce->timeline);
+ if (err) {
+ intel_timeline_put(ce->timeline);
+ ce->timeline = NULL;
+ return err;
+ }
return 0;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index be46465a57c9..fa4b965ed5ee 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -59,6 +59,7 @@ static void __mock_hwsp_record(struct mock_hwsp_freelist *state,
tl = xchg(&state->history[idx], tl);
if (tl) {
radix_tree_delete(&state->cachelines, hwsp_cacheline(tl));
+ intel_timeline_unpin(tl);
intel_timeline_put(tl);
}
}
@@ -78,6 +79,12 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state,
if (IS_ERR(tl))
return PTR_ERR(tl);
+ err = intel_timeline_pin(tl, NULL);
+ if (err) {
+ intel_timeline_put(tl);
+ return err;
+ }
+
cacheline = hwsp_cacheline(tl);
err = radix_tree_insert(&state->cachelines, cacheline, tl);
if (err) {
@@ -85,6 +92,7 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist *state,
pr_err("HWSP cacheline %lu already used; duplicate allocation!\n",
cacheline);
}
+ intel_timeline_unpin(tl);
intel_timeline_put(tl);
return err;
}
@@ -452,7 +460,7 @@ static int emit_ggtt_store_dw(struct i915_request *rq, u32 addr, u32 value)
}
static struct i915_request *
-tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
+checked_tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
{
struct i915_request *rq;
int err;
@@ -463,6 +471,13 @@ tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
goto out;
}
+ if (READ_ONCE(*tl->hwsp_seqno) != tl->seqno) {
+ pr_err("Timeline created with incorrect breadcrumb, found %x, expected %x\n",
+ *tl->hwsp_seqno, tl->seqno);
+ intel_timeline_unpin(tl);
+ return ERR_PTR(-EINVAL);
+ }
+
rq = intel_engine_create_kernel_request(engine);
if (IS_ERR(rq))
goto out_unpin;
@@ -484,25 +499,6 @@ tl_write(struct intel_timeline *tl, struct intel_engine_cs *engine, u32 value)
return rq;
}
-static struct intel_timeline *
-checked_intel_timeline_create(struct intel_gt *gt)
-{
- struct intel_timeline *tl;
-
- tl = intel_timeline_create(gt);
- if (IS_ERR(tl))
- return tl;
-
- if (READ_ONCE(*tl->hwsp_seqno) != tl->seqno) {
- pr_err("Timeline created with incorrect breadcrumb, found %x, expected %x\n",
- *tl->hwsp_seqno, tl->seqno);
- intel_timeline_put(tl);
- return ERR_PTR(-EINVAL);
- }
-
- return tl;
-}
-
static int live_hwsp_engine(void *arg)
{
#define NUM_TIMELINES 4096
@@ -535,13 +531,13 @@ static int live_hwsp_engine(void *arg)
struct intel_timeline *tl;
struct i915_request *rq;
- tl = checked_intel_timeline_create(gt);
+ tl = intel_timeline_create(gt);
if (IS_ERR(tl)) {
err = PTR_ERR(tl);
break;
}
- rq = tl_write(tl, engine, count);
+ rq = checked_tl_write(tl, engine, count);
if (IS_ERR(rq)) {
intel_timeline_put(tl);
err = PTR_ERR(rq);
@@ -608,14 +604,14 @@ static int live_hwsp_alternate(void *arg)
if (!intel_engine_can_store_dword(engine))
continue;
- tl = checked_intel_timeline_create(gt);
+ tl = intel_timeline_create(gt);
if (IS_ERR(tl)) {
err = PTR_ERR(tl);
goto out;
}
intel_engine_pm_get(engine);
- rq = tl_write(tl, engine, count);
+ rq = checked_tl_write(tl, engine, count);
intel_engine_pm_put(engine);
if (IS_ERR(rq)) {
intel_timeline_put(tl);
@@ -1258,6 +1254,10 @@ static int live_hwsp_rollover_user(void *arg)
if (!tl->has_initial_breadcrumb)
goto out;
+ err = intel_context_pin(ce);
+ if (err)
+ goto out;
+
tl->seqno = -4u;
WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno);
@@ -1267,7 +1267,7 @@ static int live_hwsp_rollover_user(void *arg)
this = intel_context_create_request(ce);
if (IS_ERR(this)) {
err = PTR_ERR(this);
- goto out;
+ goto out_unpin;
}
pr_debug("%s: create fence.seqnp:%d\n",
@@ -1286,17 +1286,18 @@ static int live_hwsp_rollover_user(void *arg)
if (i915_request_wait(rq[2], 0, HZ / 5) < 0) {
pr_err("Wait for timeline wrap timed out!\n");
err = -EIO;
- goto out;
+ goto out_unpin;
}
for (i = 0; i < ARRAY_SIZE(rq); i++) {
if (!i915_request_completed(rq[i])) {
pr_err("Pre-wrap request not completed!\n");
err = -EINVAL;
- goto out;
+ goto out_unpin;
}
}
-
+out_unpin:
+ intel_context_unpin(ce);
out:
for (i = 0; i < ARRAY_SIZE(rq); i++)
i915_request_put(rq[i]);
@@ -1338,13 +1339,13 @@ static int live_hwsp_recycle(void *arg)
struct intel_timeline *tl;
struct i915_request *rq;
- tl = checked_intel_timeline_create(gt);
+ tl = intel_timeline_create(gt);
if (IS_ERR(tl)) {
err = PTR_ERR(tl);
break;
}
- rq = tl_write(tl, engine, count);
+ rq = checked_tl_write(tl, engine, count);
if (IS_ERR(rq)) {
intel_timeline_put(tl);
err = PTR_ERR(rq);
diff --git a/drivers/gpu/drm/i915/i915_selftest.h b/drivers/gpu/drm/i915/i915_selftest.h
index d53d207ab6eb..f54de0499be7 100644
--- a/drivers/gpu/drm/i915/i915_selftest.h
+++ b/drivers/gpu/drm/i915/i915_selftest.h
@@ -107,6 +107,7 @@ int __i915_subtests(const char *caller,
#define I915_SELFTEST_DECLARE(x) x
#define I915_SELFTEST_ONLY(x) unlikely(x)
+#define I915_SELFTEST_EXPORT
#else /* !IS_ENABLED(CONFIG_DRM_I915_SELFTEST) */
@@ -116,6 +117,7 @@ static inline int i915_perf_selftests(struct pci_dev *pdev) { return 0; }
#define I915_SELFTEST_DECLARE(x)
#define I915_SELFTEST_ONLY(x) 0
+#define I915_SELFTEST_EXPORT static
#endif
--
2.31.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-03-23 15:59 UTC|newest]
Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 15:49 [PATCH v9 00/70] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 01/70] drm/i915: Do not share hwsp across contexts any more, v8 Maarten Lankhorst
2021-03-23 15:49 ` Maarten Lankhorst [this message]
2021-03-23 15:49 ` [PATCH v9 03/70] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 04/70] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2 Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 05/70] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 06/70] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 07/70] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 08/70] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 09/70] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2 Maarten Lankhorst
2021-03-23 15:49 ` [PATCH v9 10/70] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 11/70] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2021-03-24 13:57 ` [Intel-gfx] " Jason Ekstrand
2021-03-23 15:50 ` [PATCH v9 12/70] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 13/70] drm/i915: Reject more ioctls for userptr, v2 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 14/70] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 15/70] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 16/70] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v7 Maarten Lankhorst
2021-03-24 11:28 ` [Intel-gfx] " Daniel Vetter
2021-03-24 11:34 ` Thomas Hellström (Intel)
2021-03-25 9:23 ` [PATCH] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v8 Maarten Lankhorst
2021-03-25 9:55 ` Thomas Hellström (Intel)
2021-03-25 10:27 ` Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 17/70] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2021-03-24 11:13 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 18/70] drm/i915: Populate logical context during first pin Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 19/70] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 20/70] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 21/70] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 22/70] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 23/70] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 24/70] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 25/70] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2021-03-24 12:35 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 26/70] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v3 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 27/70] drm/i915: Make __engine_unpark() compatible with ww locking Maarten Lankhorst
2021-03-24 12:37 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 28/70] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2021-03-24 14:12 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 29/70] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 30/70] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2021-03-24 14:45 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 31/70] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2021-03-24 16:16 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 32/70] drm/i915: Prepare for obj->mm.lock removal, v2 Maarten Lankhorst
2021-03-23 16:18 ` [Intel-gfx] " Matthew Auld
2021-03-23 20:25 ` Thomas Hellström
2021-03-23 15:50 ` [PATCH v9 33/70] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 34/70] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2021-03-24 16:21 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 35/70] drm/i915: Increase ww locking for perf Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 36/70] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 37/70] drm/i915: Add ww locking to dma-buf ops, v2 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 38/70] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 39/70] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 40/70] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 41/70] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 42/70] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 43/70] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 44/70] drm/i915/selftests: Prepare context " Maarten Lankhorst
2021-03-24 16:40 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 45/70] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 46/70] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 47/70] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 48/70] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 49/70] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 50/70] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 51/70] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 52/70] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 53/70] drm/i915/selftests: Prepare execlists and lrc selftests " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 54/70] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 55/70] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 56/70] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 57/70] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 58/70] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 59/70] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 60/70] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 61/70] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 62/70] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 63/70] drm/i915: Move gt_revoke() slightly Maarten Lankhorst
2021-03-24 17:00 ` [Intel-gfx] " Daniel Vetter
2021-03-24 17:15 ` Ville Syrjälä
2021-03-24 17:16 ` Daniel Vetter
2021-03-24 17:58 ` Ville Syrjälä
2021-03-23 15:50 ` [PATCH v9 64/70] drm/i915: Add missing -EDEADLK path in execbuffer ggtt pinning Maarten Lankhorst
2021-03-24 17:05 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 65/70] drm/i915: Fix pin_map in scheduler selftests Maarten Lankhorst
2021-03-24 17:14 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 66/70] drm/i915: Add ww parameter to get_pages() callback Maarten Lankhorst
2021-03-24 17:20 ` [Intel-gfx] " Daniel Vetter
2021-03-23 15:50 ` [PATCH v9 67/70] drm/i915: Add ww context to prepare_(read/write) Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 68/70] drm/i915: Pass ww ctx to pin_map Maarten Lankhorst
2021-03-23 17:30 ` [Intel-gfx] " Matthew Auld
2021-03-24 9:31 ` Maarten Lankhorst
2021-03-24 10:11 ` Daniel Vetter
2021-03-24 11:54 ` [PATCH] drm/i915: Pass ww ctx to pin_map, v2 Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 69/70] drm/i915: Pass ww ctx to i915_gem_object_pin_pages Maarten Lankhorst
2021-03-23 15:50 ` [PATCH v9 70/70] drm/i915: Remove asynchronous vma binding Maarten Lankhorst
2021-03-24 17:19 ` [Intel-gfx] " Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210323155059.628690-3-maarten.lankhorst@linux.intel.com \
--to=maarten.lankhorst@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lkp@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).