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From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: David Airlie <airlied@linux.ie>, James Jones <jajones@nvidia.com>,
	dri-devel@lists.freedesktop.org,
	Thomas Zimmermann <tzimmermann@suse.de>,
	linux-tegra@vger.kernel.org, Dmitry Osipenko <digetx@gmail.com>
Subject: [PATCH v2 07/10] drm/tegra: gem: Add a clarifying comment
Date: Fri, 26 Mar 2021 15:51:36 +0100	[thread overview]
Message-ID: <20210326145139.467072-8-thierry.reding@gmail.com> (raw)
In-Reply-To: <20210326145139.467072-1-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

Clarify when a fixed IOV address can be used and when a buffer has to
be mapped before the IOVA can be used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/gpu/drm/tegra/plane.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/tegra/plane.c b/drivers/gpu/drm/tegra/plane.c
index 19e8847a164b..793da5d675d2 100644
--- a/drivers/gpu/drm/tegra/plane.c
+++ b/drivers/gpu/drm/tegra/plane.c
@@ -119,6 +119,14 @@ static int tegra_dc_pin(struct tegra_dc *dc, struct tegra_plane_state *state)
 		dma_addr_t phys_addr, *phys;
 		struct sg_table *sgt;
 
+		/*
+		 * If we're not attached to a domain, we already stored the
+		 * physical address when the buffer was allocated. If we're
+		 * part of a group that's shared between all display
+		 * controllers, we've also already mapped the framebuffer
+		 * through the SMMU. In both cases we can short-circuit the
+		 * code below and retrieve the stored IOV address.
+		 */
 		if (!domain || dc->client.group)
 			phys = &phys_addr;
 		else
-- 
2.30.2

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  parent reply	other threads:[~2021-03-26 14:51 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-26 14:51 [PATCH v2 00/10] drm/tegra: Various improvements Thierry Reding
2021-03-26 14:51 ` [PATCH v2 01/10] drm/fourcc: Add macros to determine the modifier vendor Thierry Reding
2021-03-26 14:54   ` Simon Ser
2021-03-26 16:29     ` Thierry Reding
2021-04-27 18:40       ` Daniel Stone
2021-06-09 16:28         ` Daniel Stone
2021-06-10  8:58           ` Thierry Reding
2021-06-10 10:00             ` Daniel Stone
2021-03-26 14:51 ` [PATCH v2 02/10] drm/arm: malidp: Use fourcc_mod_is_vendor() helper Thierry Reding
2021-06-09 18:27   ` Daniel Vetter
2021-03-26 14:51 ` [PATCH v2 03/10] drm/tegra: dc: Inherit DMA mask Thierry Reding
2021-03-26 14:51 ` [PATCH v2 04/10] drm/tegra: dc: Parameterize maximum resolution Thierry Reding
2021-03-26 14:51 ` [PATCH v2 05/10] drm/tegra: dc: Implement hardware cursor on Tegra186 and later Thierry Reding
2021-03-26 15:58   ` Dmitry Osipenko
2021-03-26 14:51 ` [PATCH v2 06/10] drm/tegra: fb: Add diagnostics for framebuffer modifiers Thierry Reding
2021-03-26 14:51 ` Thierry Reding [this message]
2021-03-26 14:51 ` [PATCH v2 08/10] gpu: host1x: Add early init and late exit callbacks Thierry Reding
2021-03-26 14:51 ` [PATCH v2 09/10] drm/tegra: Count number of display controllers at runtime Thierry Reding
2021-03-26 14:51 ` [PATCH v2 10/10] drm/tegra: Support sector layout on Tegra194 Thierry Reding

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