From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: [PATCH 5/6] drm/i915/icl: Stop conflating mask and readback verify
Date: Thu, 29 Apr 2021 10:12:53 +0100 [thread overview]
Message-ID: <20210429091254.855248-6-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20210429091254.855248-1-tvrtko.ursulin@linux.intel.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Add a new helper wa_write_no_verify for Wa_1604278689:icl,ehl which is
a write only register. This allows the mask to correctly reflect what
bits the workaround writes versus which bits it will verify during read-
back. In turn this will allow more safety checks to be added in a
following patch.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 07579bb9b6a7..cd84c2a86787 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -186,6 +186,12 @@ wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 set)
wa_write_clr_set(wal, reg, ~0, set);
}
+static void
+wa_write_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 set)
+{
+ wa_add(wal, reg, ~0, set, 0);
+}
+
static void
wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 set)
{
@@ -616,9 +622,7 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
/* Wa_1604278689:icl,ehl */
wa_write(wal, IVB_FBC_RT_BASE, 0xFFFFFFFF & ~ILK_FBC_RT_VALID);
- wa_write_clr_set(wal, IVB_FBC_RT_BASE_UPPER,
- 0, /* write-only register; skip validation */
- 0xFFFFFFFF);
+ wa_write_no_verify(wal, IVB_FBC_RT_BASE_UPPER, 0xFFFFFFFF);
/* Wa_1406306137:icl,ehl */
wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN11_DIS_PICK_2ND_EU);
--
2.30.2
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-04-29 9:13 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 9:12 [PATCH 0/6] Workaround building improvements Tvrtko Ursulin
2021-04-29 9:12 ` [PATCH 1/6] drm/i915: Drop duplicate WaDisable4x2SubspanOptimization:hsw Tvrtko Ursulin
2021-05-01 6:58 ` [Intel-gfx] " Lucas De Marchi
2021-04-29 9:12 ` [PATCH 2/6] drm/i915/debugfs: Expose read mask in i915_wa_registers Tvrtko Ursulin
2021-05-01 6:56 ` [Intel-gfx] " Lucas De Marchi
2021-04-29 9:12 ` [PATCH 3/6] drm/i915: Add a separate low-level helper for masked workarounds Tvrtko Ursulin
2021-05-01 6:55 ` Lucas De Marchi
2021-05-04 8:14 ` Tvrtko Ursulin
2021-04-29 9:12 ` [PATCH 4/6] drm/i915/icl: Use appropriate helper for a masked workaround Tvrtko Ursulin
2021-04-29 9:12 ` Tvrtko Ursulin [this message]
2021-04-29 9:12 ` [PATCH 6/6] drm/i915: Add more checks when building workaround lists Tvrtko Ursulin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210429091254.855248-6-tvrtko.ursulin@linux.intel.com \
--to=tvrtko.ursulin@linux.intel.com \
--cc=Intel-gfx@lists.freedesktop.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=tvrtko.ursulin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).