From: jason-jh.lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, Jitao shi <jitao.shi@mediatek.com>,
fshao@chromium.org, David Airlie <airlied@linux.ie>,
"jason-jh . lin" <jason-jh.lin@mediatek.com>,
singo.chang@mediatek.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
Fabien Parent <fparent@baylibre.com>,
nancy.lin@mediatek.com, linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 5/5] dt-bindings: mediatek: display: add mt8195 SoC binding
Date: Thu, 22 Jul 2021 17:26:24 +0800 [thread overview]
Message-ID: <20210722092624.14401-6-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20210722092624.14401-1-jason-jh.lin@mediatek.com>
Add mt8195 SoC display binding.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
---
.../display/mediatek/mediatek,disp.yaml | 24 +++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
index f16ee592735d..db0491ddb1d2 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
@@ -54,6 +54,7 @@ properties:
- items:
- enum:
- mediatek,mt8192-disp-ovl
+ - mediatek,mt8195-disp-ovl
- enum:
- mediatek,mt8183-disp-ovl
@@ -73,6 +74,8 @@ properties:
- const: mediatek,mt8173-disp-rdma
- items:
- const: mediatek,mt8183-disp-rdma
+ - items:
+ - const: mediatek,mt8195-disp-rdma
- items:
- enum:
- mediatek,mt7623-disp-rdma
@@ -95,6 +98,7 @@ properties:
- items:
- enum:
- mediatek,mt8192-disp-ccorr
+ - mediatek,mt8195-disp-ccorr
- enum:
- mediatek,mt8183-disp-ccorr
@@ -115,6 +119,7 @@ properties:
- enum:
- mediatek,mt8183-disp-color
- mediatek,mt8192-disp-color
+ - mediatek,mt8195-disp-color
- enum:
- mediatek,mt8173-disp-color
@@ -124,6 +129,7 @@ properties:
- items:
- enum:
- mediatek,mt8192-disp-dither
+ - mediatek,mt8195-disp-dither
- enum:
- mediatek,mt8183-disp-dither
@@ -135,6 +141,7 @@ properties:
- mediatek,mt2712-disp-aal
- mediatek,mt8183-disp-aal
- mediatek,mt8192-disp-aal
+ - mediatek,mt8195-disp-aal
- enum:
- mediatek,mt8173-disp-aal
@@ -146,10 +153,17 @@ properties:
- items:
- enum:
- mediatek,mt8192-disp-gamma
+ - mediatek,mt8195-disp-gamma
- enum:
- mediatek,mt8183-disp-gamma
+ # DSC: see Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml for details.
+ - items:
+ - const: mediatek,mt8195-disp-dsc
+
# MERGE: merge streams from two RDMA sources
+ - items:
+ - const: mediatek,mt8195-disp-merge
# POSTMASK: control round corner for display frame
- items:
@@ -209,6 +223,8 @@ properties:
- const: mediatek,mt8183-disp-mutex
- items:
- const: mediatek,mt8192-disp-mutex
+ - items:
+ - const: mediatek,mt8195-disp-mutex
# OD: overdrive
- items:
@@ -237,7 +253,7 @@ properties:
mediatek,larb:
description: The compatible property should be one of DMA function blocks,
such as "mediatek,<chip>-disp-ovl", "mediatek,<chip>-disp-rdma" or
- "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167 and mt8173.
+ "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167, mt8173 and mt8195.
Should contain a phandle pointing to the local arbiter device as defined in
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml.
It must sort according to the local arbiter index, like larb0, larb1, larb2...
@@ -248,7 +264,7 @@ properties:
iommus:
description: The compatible property should be one of DMA function blocks,
such as "mediatek,<chip>-disp-ovl", "mediatek,<chip>-disp-rdma" or
- "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167 and mt8173.
+ "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167, mt8173 and mt8195.
Should point to the respective IOMMU block with master port as argument, see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
@@ -442,3 +458,7 @@ examples:
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
clocks = <&mmsys CLK_MM_DISP_OD>;
};
+
+ dsc0: disp_dsc_wrap@1c009000 {
+ /* See mediatek,dsc.yaml for details */
+ };
--
2.18.0
prev parent reply other threads:[~2021-07-22 9:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-22 9:26 [PATCH v1 0/5] add mt8195 SoC DRM binding jason-jh.lin
2021-07-22 9:26 ` [PATCH v1 1/5] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding jason-jh.lin
2021-07-23 11:13 ` Enric Balletbo Serra
2021-07-26 7:02 ` Jason-JH Lin
2021-07-26 10:08 ` Enric Balletbo Serra
2021-07-27 2:53 ` Jason-JH Lin
2021-07-28 10:56 ` Enric Balletbo Serra
2021-07-29 9:31 ` Jason-JH Lin
2021-07-22 9:26 ` [PATCH v1 2/5] dt-bindings: mediatek: display: Change format to yaml jason-jh.lin
2021-07-22 9:26 ` [PATCH v1 3/5] dt-bindings: mediatek: display: add MERGE additional description jason-jh.lin
2021-07-22 9:26 ` [PATCH v1 4/5] dt-bindings: mediatek: add mediatek, dsc.yaml for mt8195 SoC binding jason-jh.lin
2021-07-22 9:26 ` jason-jh.lin [this message]
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