From: Andi Shyti <andi.shyti@linux.intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>,
DRI Devel <dri-devel@lists.freedesktop.org>
Cc: "Michał Winiarski" <michal.winiarski@intel.com>,
"Andi Shyti" <andi@etezian.org>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Chris Wilson" <chris@chris-wilson.co.uk>,
"Andi Shyti" <andi.shyti@linux.intel.com>
Subject: [PATCH v8 13/16] drm/i915/gt: Use to_gt() helper for GGTT accesses
Date: Tue, 14 Dec 2021 21:33:43 +0200 [thread overview]
Message-ID: <20211214193346.21231-14-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20211214193346.21231-1-andi.shyti@linux.intel.com>
From: Michał Winiarski <michal.winiarski@intel.com>
GGTT is currently available both through i915->ggtt and gt->ggtt, and we
eventually want to get rid of the i915->ggtt one.
Use to_gt() for all i915->ggtt accesses to help with the future
refactoring.
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +-
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 971e737b37b2..ec3b998392ff 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -89,7 +89,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *i915)
* beyond the end of the batch buffer, across the page boundary,
* and beyond the end of the GTT if we do not provide a guard.
*/
- ret = ggtt_init_hw(&i915->ggtt);
+ ret = ggtt_init_hw(to_gt(i915)->ggtt);
if (ret)
return ret;
@@ -725,14 +725,14 @@ int i915_init_ggtt(struct drm_i915_private *i915)
{
int ret;
- ret = init_ggtt(&i915->ggtt);
+ ret = init_ggtt(to_gt(i915)->ggtt);
if (ret)
return ret;
if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) {
- ret = init_aliasing_ppgtt(&i915->ggtt);
+ ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
if (ret)
- cleanup_init_ggtt(&i915->ggtt);
+ cleanup_init_ggtt(to_gt(i915)->ggtt);
}
return 0;
@@ -775,7 +775,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
*/
void i915_ggtt_driver_release(struct drm_i915_private *i915)
{
- struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
fini_aliasing_ppgtt(ggtt);
@@ -790,7 +790,7 @@ void i915_ggtt_driver_release(struct drm_i915_private *i915)
*/
void i915_ggtt_driver_late_release(struct drm_i915_private *i915)
{
- struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1);
dma_resv_fini(&ggtt->vm._resv);
@@ -1232,7 +1232,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915)
{
int ret;
- ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915));
+ ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915));
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index f8948de72036..beabf3bc9b75 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -728,8 +728,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
swizzle_y = I915_BIT_6_SWIZZLE_NONE;
}
- i915->ggtt.bit_6_swizzle_x = swizzle_x;
- i915->ggtt.bit_6_swizzle_y = swizzle_y;
+ to_gt(i915)->ggtt->bit_6_swizzle_x = swizzle_x;
+ to_gt(i915)->ggtt->bit_6_swizzle_y = swizzle_y;
}
/*
@@ -896,7 +896,7 @@ void intel_gt_init_swizzling(struct intel_gt *gt)
struct intel_uncore *uncore = gt->uncore;
if (GRAPHICS_VER(i915) < 5 ||
- i915->ggtt.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
+ to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
return;
intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index fde2dcb59809..21215a080088 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -15,7 +15,7 @@
static int init_fake_lmem_bar(struct intel_memory_region *mem)
{
struct drm_i915_private *i915 = mem->i915;
- struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
unsigned long n;
int ret;
@@ -131,7 +131,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
if (!i915->params.fake_lmem_start)
return ERR_PTR(-ENODEV);
- GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));
+ GEM_BUG_ON(i915_ggtt_has_aperture(to_gt(i915)->ggtt));
/* Your mappable aperture belongs to me now! */
mappable_end = pci_resource_len(pdev, 2);
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 8a873f6bda7f..37c38bdd5f47 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -19,7 +19,7 @@ __igt_reset_stolen(struct intel_gt *gt,
intel_engine_mask_t mask,
const char *msg)
{
- struct i915_ggtt *ggtt = >->i915->ggtt;
+ struct i915_ggtt *ggtt = gt->ggtt;
const struct resource *dsm = >->i915->dsm;
resource_size_t num_pages, page;
struct intel_engine_cs *engine;
--
2.34.1
next prev parent reply other threads:[~2021-12-14 19:35 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-14 19:33 [PATCH v8 00/16] More preparation for multi gt patches Andi Shyti
2021-12-14 19:33 ` [PATCH v8 01/16] drm/i915: Store backpointer to GT in uncore Andi Shyti
2021-12-14 19:33 ` [PATCH v8 02/16] drm/i915: Introduce to_gt() helper Andi Shyti
2021-12-14 19:33 ` [PATCH v8 03/16] drm/i915/display: Use " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 04/16] drm/i915/gt: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 05/16] drm/i915/gem: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 06/16] drm/i915/gvt: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 07/16] drm/i915/selftests: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 08/16] drm/i915/pxp: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 09/16] drm/i915: " Andi Shyti
2021-12-14 19:33 ` [PATCH v8 10/16] drm/i915: Rename i915->gt to i915->gt0 Andi Shyti
2021-12-14 19:33 ` [PATCH v8 11/16] drm/i915/gem: Use to_gt() helper for GGTT accesses Andi Shyti
2021-12-17 0:41 ` Sundaresan, Sujaritha
2021-12-18 4:44 ` Matt Roper
2021-12-14 19:33 ` [PATCH v8 12/16] drm/i915/display: " Andi Shyti
2021-12-16 23:13 ` [Intel-gfx] " Sundaresan, Sujaritha
2021-12-18 4:45 ` Matt Roper
2021-12-14 19:33 ` Andi Shyti [this message]
2021-12-16 23:12 ` [Intel-gfx] [PATCH v8 13/16] drm/i915/gt: " Sundaresan, Sujaritha
2021-12-18 4:46 ` Matt Roper
2021-12-14 19:33 ` [PATCH v8 14/16] drm/i915/selftests: " Andi Shyti
2021-12-16 23:11 ` [Intel-gfx] " Sundaresan, Sujaritha
2021-12-18 4:49 ` Matt Roper
2021-12-14 19:33 ` [PATCH v8 15/16] drm/i915: " Andi Shyti
2021-12-18 4:54 ` Matt Roper
2021-12-18 13:49 ` Andi Shyti
2021-12-14 19:33 ` [PATCH v8 16/16] drm/i915: Remove unused i915->ggtt Andi Shyti
2021-12-16 21:26 ` [Intel-gfx] " Sundaresan, Sujaritha
2021-12-18 5:05 ` Matt Roper
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211214193346.21231-14-andi.shyti@linux.intel.com \
--to=andi.shyti@linux.intel.com \
--cc=andi@etezian.org \
--cc=chris@chris-wilson.co.uk \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
--cc=michal.winiarski@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).