[PATCH 00/33] drm/vc4: Misc fixes

[PATCH 00/33] drm/vc4: Misc fixes

[Maxime Ripard]

Hi,

Here's a collection of small fixes that have been used in the downstream
kernel for a while, affecting several parts of the vc4 driver.

Let me know what you think,
Maxime

Dave Stevenson (21):
  drm/vc4: drv: Adopt the dma configuration from the HVS or V3D
    component
  drm/vc4: plane: Fix margin calculations for the right/bottom edges
  drm/vc4: plane: Add alpha_blend_mode property to each plane.
  drm/vc4: hvs: Add debugfs node that dumps the current display lists
  drm/vc4: dpi: Add support for composite syncs to vc4_dpi
  drm/vc4: dpi: Add option for inverting pixel clock and output enable
  drm/vc4: dpi: Ensure a default format is selected
  drm/vc4: dsi: Release workaround buffer and DMA
  drm/vc4: dsi: Correct DSI divider calculations
  drm/vc4: dsi: Correct pixel order for DSI0
  drm/vc4: dsi: Register dsi0 as the correct vc4 encoder type
  drm/vc4: dsi: Fix dsi0 interrupt support
  drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable
    iteration
  drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumps
  drm/vc4: hdmi: Reset HDMI MISC_CONTROL register
  drm/vc4: hdmi: Switch to pm_runtime_status_suspended
  drm/vc4: hdmi: Move HDMI reset to pm_resume
  drm/vc4: hdmi: Add HDMI format detection registers to register list
  drm/vc4: hdmi: Add MISC_CONTROL register for vc4
  drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes
  drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI block

Dom Cobley (8):
  drm/vc4: plane: Remove subpixel positioning check
  drm/vc4: hdmi: Clear unused infoframe packet RAM registers
  drm/vc4: hdmi: Avoid full hdmi audio fifo writes
  drm/vc4: hdmi: Stop checking for enabled output in audio
  drm/vc4: hdmi: Skip writes to disabled packet RAM
  drm/vc4: hdmi: Remove VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT
  drm/vc4: hdmi: Report that 3d/stereo is allowed
  drm/vc4: hdmi: Force modeset when bpc or format changes

Mateusz Kwiatkowski (1):
  drm/vc4: hdmi: Fix timings for interlaced modes

Maxime Ripard (2):
  drm/vc4: kms: Warn if clk_set_min_rate fails
  drm/vc4: kms: Use maximum FIFO load for the HVS clock rate

Phil Elwell (1):
  drm/vc4: hdmi: Disable audio if dmas property is present but empty

 drivers/gpu/drm/vc4/vc4_crtc.c      |  14 +-
 drivers/gpu/drm/vc4/vc4_dpi.c       |  99 +++++++------
 drivers/gpu/drm/vc4/vc4_drv.c       |  19 +++
 drivers/gpu/drm/vc4/vc4_dsi.c       | 152 +++++++++++++++-----
 drivers/gpu/drm/vc4/vc4_hdmi.c      | 210 ++++++++++++++++++----------
 drivers/gpu/drm/vc4/vc4_hdmi.h      |  14 +-
 drivers/gpu/drm/vc4/vc4_hdmi_regs.h |  38 ++++-
 drivers/gpu/drm/vc4/vc4_hvs.c       |  42 ++++++
 drivers/gpu/drm/vc4/vc4_kms.c       |   8 +-
 drivers/gpu/drm/vc4/vc4_plane.c     |  92 ++++++++----
 10 files changed, 503 insertions(+), 185 deletions(-)

-- 
2.36.1

[PATCH 01/33] drm/vc4: drv: Adopt the dma configuration from the HVS or V3D component

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

vc4_drv isn't necessarily under the /soc node in DT as it is a
virtual device, but it is the one that does the allocations.
The DMA addresses are consumed by primarily the HVS or V3D, and
those require VideoCore cache alias address mapping, and so will be
under /soc.

During probe find the a suitable device node for HVS or V3D,
and adopt the DMA configuration of that node.

Cc: <stable@vger.kernel.org>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_drv.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 162bc18e7497..14a7d529144d 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -209,6 +209,15 @@ static void vc4_match_add_drivers(struct device *dev,
 	}
 }
 
+const struct of_device_id vc4_dma_range_matches[] = {
+	{ .compatible = "brcm,bcm2711-hvs" },
+	{ .compatible = "brcm,bcm2835-hvs" },
+	{ .compatible = "brcm,bcm2835-v3d" },
+	{ .compatible = "brcm,cygnus-v3d" },
+	{ .compatible = "brcm,vc4-v3d" },
+	{}
+};
+
 static int vc4_drm_bind(struct device *dev)
 {
 	struct platform_device *pdev = to_platform_device(dev);
@@ -227,6 +236,16 @@ static int vc4_drm_bind(struct device *dev)
 		vc4_drm_driver.driver_features &= ~DRIVER_RENDER;
 	of_node_put(node);
 
+	node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
+					       NULL);
+	if (node) {
+		ret = of_dma_configure(dev, node, true);
+		of_node_put(node);
+
+		if (ret)
+			return ret;
+	}
+
 	vc4 = devm_drm_dev_alloc(dev, &vc4_drm_driver, struct vc4_dev, base);
 	if (IS_ERR(vc4))
 		return PTR_ERR(vc4);
-- 
2.36.1

[PATCH 02/33] drm/vc4: kms: Warn if clk_set_min_rate fails

[Maxime Ripard]

We currently ignore the clk_set_min_rate return code assuming it would
succeed. However, it can fail if we ask for a rate higher than the
current maximum for example.

Since we can't fail in atomic_commit, at least warn on failure.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_kms.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index c169bd72e53b..7a7c90d8520b 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -405,7 +405,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
 		 * Do a temporary request on the core clock during the
 		 * modeset.
 		 */
-		clk_set_min_rate(hvs->core_clk, core_rate);
+		WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate));
 	}
 
 	drm_atomic_helper_commit_modeset_disables(dev, state);
@@ -438,7 +438,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
 		 * Request a clock rate based on the current HVS
 		 * requirements.
 		 */
-		clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate);
+		WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate));
 
 		drm_dbg(dev, "Core clock actual rate: %lu Hz\n",
 			clk_get_rate(hvs->core_clk));
-- 
2.36.1

[PATCH 03/33] drm/vc4: kms: Use maximum FIFO load for the HVS clock rate

[Maxime Ripard]

The core clock computation takes into account both the load due to the
input (ie, planes) and its output (ie, encoders).

However, while the input load needs to consider all the planes, and thus
sum all of their associated loads, the output happens mostly in
parallel.

Therefore, we need to consider only the maximum of all the output loads,
and not the sum like we were doing. This resulted in a clock rate way
too high which could be discarded for being too high by the clock
framework.

Since recent changes, the clock framework will even downright reject it,
leading to a core clock being too low for its current needs.

Fixes: 16e101051f32 ("drm/vc4: Increase the core clock based on HVS load")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_kms.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index 7a7c90d8520b..69eae37e82f6 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -946,7 +946,9 @@ vc4_core_clock_atomic_check(struct drm_atomic_state *state)
 			continue;
 
 		num_outputs++;
-		cob_rate += hvs_new_state->fifo_state[i].fifo_load;
+		cob_rate = max_t(unsigned long,
+				 hvs_new_state->fifo_state[i].fifo_load,
+				 cob_rate);
 	}
 
 	pixel_rate = load_state->hvs_load;
-- 
2.36.1

[PATCH 04/33] drm/vc4: plane: Remove subpixel positioning check

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

There is little harm in ignoring fractional coordinates
(they just get truncated).

Without this:
modetest -M vc4 -F tiles,gradient -s 32:1920x1080-60 -P89@74:1920x1080*.1.1@XR24

is rejected. We have the same issue in Kodi when trying to
use zoom options on video.

Note: even if all coordinates are fully integer. e.g.
src:[0,0,1920,1080] dest:[-10,-10,1940,1100]

it will still get rejected as drm_atomic_helper_check_plane_state
uses drm_rect_clip_scaled which transforms this to fractional src coords

Fixes: 21af94cf1a4c ("drm/vc4: Add support for scaling of display planes.")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_plane.c | 22 +++++++++-------------
 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index b3438f4a81ce..650c652281e8 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -339,7 +339,6 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
 	struct drm_framebuffer *fb = state->fb;
 	struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
-	u32 subpixel_src_mask = (1 << 16) - 1;
 	int num_planes = fb->format->num_planes;
 	struct drm_crtc_state *crtc_state;
 	u32 h_subsample = fb->format->hsub;
@@ -361,18 +360,15 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
 	for (i = 0; i < num_planes; i++)
 		vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
 
-	/* We don't support subpixel source positioning for scaling. */
-	if ((state->src.x1 & subpixel_src_mask) ||
-	    (state->src.x2 & subpixel_src_mask) ||
-	    (state->src.y1 & subpixel_src_mask) ||
-	    (state->src.y2 & subpixel_src_mask)) {
-		return -EINVAL;
-	}
-
-	vc4_state->src_x = state->src.x1 >> 16;
-	vc4_state->src_y = state->src.y1 >> 16;
-	vc4_state->src_w[0] = (state->src.x2 - state->src.x1) >> 16;
-	vc4_state->src_h[0] = (state->src.y2 - state->src.y1) >> 16;
+	/*
+	 * We don't support subpixel source positioning for scaling,
+	 * but fractional coordinates can be generated by clipping
+	 * so just round for now
+	 */
+	vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1 << 16);
+	vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1 << 16);
+	vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1 << 16) - vc4_state->src_x;
+	vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1 << 16) - vc4_state->src_y;
 
 	vc4_state->crtc_x = state->dst.x1;
 	vc4_state->crtc_y = state->dst.y1;
-- 
2.36.1

[PATCH 05/33] drm/vc4: plane: Fix margin calculations for the right/bottom edges

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The current plane margin calculation code clips the right and bottom
edges of the range based using the left and top margins.

This is obviously wrong, so let's fix it.

Fixes: 666e73587f90 ("drm/vc4: Take margin setup into account when updating planes")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_plane.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 650c652281e8..a64324179650 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -310,16 +310,16 @@ static int vc4_plane_margins_adj(struct drm_plane_state *pstate)
 					       adjhdisplay,
 					       crtc_state->mode.hdisplay);
 	vc4_pstate->crtc_x += left;
-	if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - left)
-		vc4_pstate->crtc_x = crtc_state->mode.hdisplay - left;
+	if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - right)
+		vc4_pstate->crtc_x = crtc_state->mode.hdisplay - right;
 
 	adjvdisplay = crtc_state->mode.vdisplay - (top + bottom);
 	vc4_pstate->crtc_y = DIV_ROUND_CLOSEST(vc4_pstate->crtc_y *
 					       adjvdisplay,
 					       crtc_state->mode.vdisplay);
 	vc4_pstate->crtc_y += top;
-	if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - top)
-		vc4_pstate->crtc_y = crtc_state->mode.vdisplay - top;
+	if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - bottom)
+		vc4_pstate->crtc_y = crtc_state->mode.vdisplay - bottom;
 
 	vc4_pstate->crtc_w = DIV_ROUND_CLOSEST(vc4_pstate->crtc_w *
 					       adjhdisplay,
-- 
2.36.1

[PATCH 06/33] drm/vc4: plane: Add alpha_blend_mode property to each plane.

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

Move from only supporting the default of pre-multiplied
alpha to supporting user specified blend mode using the
standardised property.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_plane.c | 62 ++++++++++++++++++++++++++-------
 1 file changed, 49 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index a64324179650..ac250a592fad 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -664,6 +664,48 @@ static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = {
 	}
 };
 
+static u32 vc4_hvs4_get_alpha_blend_mode(struct drm_plane_state *state)
+{
+	if (!state->fb->format->has_alpha)
+		return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
+				     SCALER_POS2_ALPHA_MODE);
+
+	switch (state->pixel_blend_mode) {
+	case DRM_MODE_BLEND_PIXEL_NONE:
+		return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
+				     SCALER_POS2_ALPHA_MODE);
+	default:
+	case DRM_MODE_BLEND_PREMULTI:
+		return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
+				     SCALER_POS2_ALPHA_MODE) |
+			SCALER_POS2_ALPHA_PREMULT;
+	case DRM_MODE_BLEND_COVERAGE:
+		return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
+				     SCALER_POS2_ALPHA_MODE);
+	}
+}
+
+static u32 vc4_hvs5_get_alpha_blend_mode(struct drm_plane_state *state)
+{
+	if (!state->fb->format->has_alpha)
+		return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
+				     SCALER5_CTL2_ALPHA_MODE);
+
+	switch (state->pixel_blend_mode) {
+	case DRM_MODE_BLEND_PIXEL_NONE:
+		return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
+				     SCALER5_CTL2_ALPHA_MODE);
+	default:
+	case DRM_MODE_BLEND_PREMULTI:
+		return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
+				     SCALER5_CTL2_ALPHA_MODE) |
+			SCALER5_CTL2_ALPHA_PREMULT;
+	case DRM_MODE_BLEND_COVERAGE:
+		return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
+				     SCALER5_CTL2_ALPHA_MODE);
+	}
+}
+
 /* Writes out a full display list for an active plane to the plane's
  * private dlist state.
  */
@@ -946,13 +988,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
 		/* Position Word 2: Source Image Size, Alpha */
 		vc4_state->pos2_offset = vc4_state->dlist_count;
 		vc4_dlist_write(vc4_state,
-				VC4_SET_FIELD(fb->format->has_alpha ?
-					      SCALER_POS2_ALPHA_MODE_PIPELINE :
-					      SCALER_POS2_ALPHA_MODE_FIXED,
-					      SCALER_POS2_ALPHA_MODE) |
 				(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
-				(fb->format->has_alpha ?
-						SCALER_POS2_ALPHA_PREMULT : 0) |
+				vc4_hvs4_get_alpha_blend_mode(state) |
 				VC4_SET_FIELD(vc4_state->src_w[0],
 					      SCALER_POS2_WIDTH) |
 				VC4_SET_FIELD(vc4_state->src_h[0],
@@ -997,14 +1034,9 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
 		vc4_dlist_write(vc4_state,
 				VC4_SET_FIELD(state->alpha >> 4,
 					      SCALER5_CTL2_ALPHA) |
-				(fb->format->has_alpha ?
-					SCALER5_CTL2_ALPHA_PREMULT : 0) |
+				vc4_hvs5_get_alpha_blend_mode(state) |
 				(mix_plane_alpha ?
-					SCALER5_CTL2_ALPHA_MIX : 0) |
-				VC4_SET_FIELD(fb->format->has_alpha ?
-				      SCALER5_CTL2_ALPHA_MODE_PIPELINE :
-				      SCALER5_CTL2_ALPHA_MODE_FIXED,
-				      SCALER5_CTL2_ALPHA_MODE)
+					SCALER5_CTL2_ALPHA_MIX : 0)
 			       );
 
 		/* Position Word 1: Scaled Image Dimensions. */
@@ -1489,6 +1521,10 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
 	drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
 
 	drm_plane_create_alpha_property(plane);
+	drm_plane_create_blend_mode_property(plane,
+					     BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+					     BIT(DRM_MODE_BLEND_PREMULTI) |
+					     BIT(DRM_MODE_BLEND_COVERAGE));
 	drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
 					   DRM_MODE_ROTATE_0 |
 					   DRM_MODE_ROTATE_180 |
-- 
2.36.1

[PATCH 07/33] drm/vc4: hvs: Add debugfs node that dumps the current display lists

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

This allows easy analysis of display lists when debugging.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hvs.c | 42 +++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 2a58fc421cf6..5fdfc01fbc5a 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -94,6 +94,46 @@ static int vc4_hvs_debugfs_underrun(struct seq_file *m, void *data)
 	return 0;
 }
 
+static int vc4_hvs_debugfs_dlist(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct vc4_dev *vc4 = to_vc4_dev(dev);
+	struct vc4_hvs *hvs = vc4->hvs;
+	struct drm_printer p = drm_seq_file_printer(m);
+	unsigned int next_entry_start = 0;
+	unsigned int i, j;
+	u32 dlist_word, dispstat;
+
+	for (i = 0; i < SCALER_CHANNELS_COUNT; i++) {
+		dispstat = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(i)),
+					 SCALER_DISPSTATX_MODE);
+		if (dispstat == SCALER_DISPSTATX_MODE_DISABLED ||
+		    dispstat == SCALER_DISPSTATX_MODE_EOF) {
+			drm_printf(&p, "HVS chan %u disabled\n", i);
+			continue;
+		}
+
+		drm_printf(&p, "HVS chan %u:\n", i);
+
+		for (j = HVS_READ(SCALER_DISPLISTX(i)); j < 256; j++) {
+			dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j);
+			drm_printf(&p, "dlist: %02d: 0x%08x\n", j,
+				   dlist_word);
+			if (!next_entry_start ||
+			    next_entry_start == j) {
+				if (dlist_word & SCALER_CTL0_END)
+					break;
+				next_entry_start = j +
+					VC4_GET_FIELD(dlist_word,
+						      SCALER_CTL0_SIZE);
+			}
+		}
+	}
+
+	return 0;
+}
+
 /* The filter kernel is composed of dwords each containing 3 9-bit
  * signed integers packed next to each other.
  */
@@ -734,6 +774,8 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
 	vc4_debugfs_add_regset32(drm, "hvs_regs", &hvs->regset);
 	vc4_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun,
 			     NULL);
+	vc4_debugfs_add_file(drm, "hvs_dlists", vc4_hvs_debugfs_dlist,
+			     NULL);
 
 	return 0;
 }
-- 
2.36.1

[PATCH 08/33] drm/vc4: dpi: Add support for composite syncs to vc4_dpi

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The hardware can combine H&V syncs onto the output enable line
as composite syncs, so add the relevant configuration to do that.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dpi.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dpi.c b/drivers/gpu/drm/vc4/vc4_dpi.c
index c180eb60bee8..ffa55952c773 100644
--- a/drivers/gpu/drm/vc4/vc4_dpi.c
+++ b/drivers/gpu/drm/vc4/vc4_dpi.c
@@ -131,7 +131,7 @@ static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 	struct vc4_dpi *dpi = vc4_encoder->dpi;
 	struct drm_connector_list_iter conn_iter;
 	struct drm_connector *connector = NULL, *connector_scan;
-	u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
+	u32 dpi_c = DPI_ENABLE;
 	int ret;
 
 	/* Look up the connector attached to DPI so we can get the
@@ -182,15 +182,22 @@ static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
 	}
 
-	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
-		dpi_c |= DPI_HSYNC_INVERT;
-	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
-		dpi_c |= DPI_HSYNC_DISABLE;
+	if (mode->flags & DRM_MODE_FLAG_CSYNC) {
+		if (mode->flags & DRM_MODE_FLAG_NCSYNC)
+			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
+	} else {
+		dpi_c |= DPI_OUTPUT_ENABLE_MODE;
 
-	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
-		dpi_c |= DPI_VSYNC_INVERT;
-	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
-		dpi_c |= DPI_VSYNC_DISABLE;
+		if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+			dpi_c |= DPI_HSYNC_INVERT;
+		else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+			dpi_c |= DPI_HSYNC_DISABLE;
+
+		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
+			dpi_c |= DPI_VSYNC_INVERT;
+		else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+			dpi_c |= DPI_VSYNC_DISABLE;
+	}
 
 	DPI_WRITE(DPI_C, dpi_c);
 
-- 
2.36.1

[PATCH 09/33] drm/vc4: dpi: Add option for inverting pixel clock and output enable

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

DRM provides flags for inverting pixel clock and output enable
signals, but these were not mapped to the relevant registers.

Add those mappings.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dpi.c | 64 ++++++++++++++++++++---------------
 1 file changed, 37 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dpi.c b/drivers/gpu/drm/vc4/vc4_dpi.c
index ffa55952c773..695b759db9bc 100644
--- a/drivers/gpu/drm/vc4/vc4_dpi.c
+++ b/drivers/gpu/drm/vc4/vc4_dpi.c
@@ -148,35 +148,45 @@ static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 	}
 	drm_connector_list_iter_end(&conn_iter);
 
-	if (connector && connector->display_info.num_bus_formats) {
-		u32 bus_format = connector->display_info.bus_formats[0];
+	if (connector) {
+		if (connector->display_info.num_bus_formats) {
+			u32 bus_format = connector->display_info.bus_formats[0];
 
-		switch (bus_format) {
-		case MEDIA_BUS_FMT_RGB888_1X24:
-			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
-					       DPI_FORMAT);
-			break;
-		case MEDIA_BUS_FMT_BGR888_1X24:
-			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
-					       DPI_FORMAT);
-			dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
-			break;
-		case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
-			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
-					       DPI_FORMAT);
-			break;
-		case MEDIA_BUS_FMT_RGB666_1X18:
-			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
-					       DPI_FORMAT);
-			break;
-		case MEDIA_BUS_FMT_RGB565_1X16:
-			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
-					       DPI_FORMAT);
-			break;
-		default:
-			DRM_ERROR("Unknown media bus format %d\n", bus_format);
-			break;
+			switch (bus_format) {
+			case MEDIA_BUS_FMT_RGB888_1X24:
+				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
+						       DPI_FORMAT);
+				break;
+			case MEDIA_BUS_FMT_BGR888_1X24:
+				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
+						       DPI_FORMAT);
+				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
+						       DPI_ORDER);
+				break;
+			case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
+						       DPI_FORMAT);
+				break;
+			case MEDIA_BUS_FMT_RGB666_1X18:
+				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
+						       DPI_FORMAT);
+				break;
+			case MEDIA_BUS_FMT_RGB565_1X16:
+				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
+						       DPI_FORMAT);
+				break;
+			default:
+				DRM_ERROR("Unknown media bus format %d\n",
+					  bus_format);
+				break;
+			}
 		}
+
+		if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
+			dpi_c |= DPI_PIXEL_CLK_INVERT;
+
+		if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
+			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 	} else {
 		/* Default to 24bit if no connector found. */
 		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
-- 
2.36.1

[PATCH 10/33] drm/vc4: dpi: Ensure a default format is selected

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

In a couple of error/incomplete configuration cases, the
DPI_FORMAT bits wouldn't get set.

Enforce our RGB888 default in all these cases.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dpi.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dpi.c b/drivers/gpu/drm/vc4/vc4_dpi.c
index 695b759db9bc..44355b347ff2 100644
--- a/drivers/gpu/drm/vc4/vc4_dpi.c
+++ b/drivers/gpu/drm/vc4/vc4_dpi.c
@@ -148,10 +148,15 @@ static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 	}
 	drm_connector_list_iter_end(&conn_iter);
 
+	/* Default to 24bit if no connector or format found. */
+	dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
+
 	if (connector) {
 		if (connector->display_info.num_bus_formats) {
 			u32 bus_format = connector->display_info.bus_formats[0];
 
+			dpi_c &= ~DPI_FORMAT_MASK;
+
 			switch (bus_format) {
 			case MEDIA_BUS_FMT_RGB888_1X24:
 				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
@@ -187,9 +192,6 @@ static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 
 		if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
 			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
-	} else {
-		/* Default to 24bit if no connector found. */
-		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
 	}
 
 	if (mode->flags & DRM_MODE_FLAG_CSYNC) {
-- 
2.36.1

[PATCH 11/33] drm/vc4: dsi: Release workaround buffer and DMA

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

On Pi0-3 the driver allocates a buffer and requests a DMA channel
because the ARM can't write to DSI1's registers directly.

However, we never release that buffer or channel. Let's add a
device-managed action to release each.

Fixes: 4078f5757144 ("drm/vc4: Add DSI driver")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 98308a17e4ed..e82ee94cafc7 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1487,13 +1487,29 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi)
 				      dsi->clk_onecell);
 }
 
+static void vc4_dsi_dma_mem_release(void *ptr)
+{
+	struct vc4_dsi *dsi = ptr;
+	struct device *dev = &dsi->pdev->dev;
+
+	dma_free_coherent(dev, 4, dsi->reg_dma_mem, dsi->reg_dma_paddr);
+	dsi->reg_dma_mem = NULL;
+}
+
+static void vc4_dsi_dma_chan_release(void *ptr)
+{
+	struct vc4_dsi *dsi = ptr;
+
+	dma_release_channel(dsi->reg_dma_chan);
+	dsi->reg_dma_chan = NULL;
+}
+
 static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
 {
 	struct platform_device *pdev = to_platform_device(dev);
 	struct drm_device *drm = dev_get_drvdata(master);
 	struct vc4_dsi *dsi = dev_get_drvdata(dev);
 	struct vc4_dsi_encoder *vc4_dsi_encoder;
-	dma_cap_mask_t dma_mask;
 	int ret;
 
 	dsi->variant = of_device_get_match_data(dev);
@@ -1527,6 +1543,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
 	 * so set up a channel for talking to it.
 	 */
 	if (dsi->variant->broken_axi_workaround) {
+		dma_cap_mask_t dma_mask;
+
 		dsi->reg_dma_mem = dma_alloc_coherent(dev, 4,
 						      &dsi->reg_dma_paddr,
 						      GFP_KERNEL);
@@ -1535,8 +1553,13 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
 			return -ENOMEM;
 		}
 
+		ret = devm_add_action_or_reset(dev, vc4_dsi_dma_mem_release, dsi);
+		if (ret)
+			return ret;
+
 		dma_cap_zero(dma_mask);
 		dma_cap_set(DMA_MEMCPY, dma_mask);
+
 		dsi->reg_dma_chan = dma_request_chan_by_mask(&dma_mask);
 		if (IS_ERR(dsi->reg_dma_chan)) {
 			ret = PTR_ERR(dsi->reg_dma_chan);
@@ -1546,6 +1569,10 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
 			return ret;
 		}
 
+		ret = devm_add_action_or_reset(dev, vc4_dsi_dma_chan_release, dsi);
+		if (ret)
+			return ret;
+
 		/* Get the physical address of the device's registers.  The
 		 * struct resource for the regs gives us the bus address
 		 * instead.
-- 
2.36.1

[PATCH 12/33] drm/vc4: dsi: Correct DSI divider calculations

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The divider calculations tried to find the divider just faster than the
clock requested. However if it required a divider of 7 then the for loop
aborted without handling the "error" case, and could end up with a clock
lower than requested.

The integer divider from parent PLL to DSI clock is also capable of
going up to /255, not just /7 that the driver was trying.  This allows
for slower link frequencies on the DSI bus where the resolution permits.

Correct the loop so that we always have a clock greater than requested,
and covering the whole range of dividers.

Fixes: 86c1b9eff3f2 ("drm/vc4: Adjust modes in DSI to work around the integer PLL divider.")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index e82ee94cafc7..81a6c4e9576d 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -805,11 +805,9 @@ static bool vc4_dsi_encoder_mode_fixup(struct drm_encoder *encoder,
 	/* Find what divider gets us a faster clock than the requested
 	 * pixel clock.
 	 */
-	for (divider = 1; divider < 8; divider++) {
-		if (parent_rate / divider < pll_clock) {
-			divider--;
+	for (divider = 1; divider < 255; divider++) {
+		if (parent_rate / (divider + 1) < pll_clock)
 			break;
-		}
 	}
 
 	/* Now that we've picked a PLL divider, calculate back to its
-- 
2.36.1

[PATCH 13/33] drm/vc4: dsi: Correct pixel order for DSI0

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

For slightly unknown reasons, dsi0 takes a different pixel format
to dsi1, and that has to be set in the pixel valve.

Amend the setup accordingly.

Fixes: a86773d120d7 ("drm/vc4: Add support for feeding DSI encoders from the pixel valve.")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_crtc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 59b20c8f132b..f74270ad3e13 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -319,7 +319,8 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode
 	u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
 	bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
 		       vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
-	u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
+	bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
+	u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
 	u8 ppc = pv_data->pixels_per_clock;
 	bool debug_dump_regs = false;
 
-- 
2.36.1

[PATCH 14/33] drm/vc4: dsi: Register dsi0 as the correct vc4 encoder type

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

vc4_dsi was registering both dsi0 and dsi1 as VC4_ENCODER_TYPE_DSI1
which seemed to work OK for a single DSI display, but fails
if there are two DSI displays connected.

Update to register the correct type.

Fixes: 4078f5757144 ("drm/vc4: Add DSI driver")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 81a6c4e9576d..97a258c934af 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -1518,7 +1518,8 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
 		return -ENOMEM;
 
 	INIT_LIST_HEAD(&dsi->bridge_chain);
-	vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1;
+	vc4_dsi_encoder->base.type = dsi->variant->port ?
+			VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0;
 	vc4_dsi_encoder->dsi = dsi;
 	dsi->encoder = &vc4_dsi_encoder->base.base;
 
-- 
2.36.1

[PATCH 15/33] drm/vc4: dsi: Fix dsi0 interrupt support

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

DSI0 seemingly had very little or no testing as a load of
the register mappings were incorrect/missing, so host
transfers always timed out due to enabling/checking incorrect
bits in the interrupt enable and status registers.

Fixes: 4078f5757144 ("drm/vc4: Add DSI driver")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 111 ++++++++++++++++++++++++++--------
 1 file changed, 85 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 97a258c934af..333ea96fcde4 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -181,8 +181,50 @@
 
 #define DSI0_TXPKT_PIX_FIFO		0x20 /* AKA PIX_FIFO */
 
-#define DSI0_INT_STAT		0x24
-#define DSI0_INT_EN		0x28
+#define DSI0_INT_STAT			0x24
+#define DSI0_INT_EN			0x28
+# define DSI0_INT_FIFO_ERR		BIT(25)
+# define DSI0_INT_CMDC_DONE_MASK	VC4_MASK(24, 23)
+# define DSI0_INT_CMDC_DONE_SHIFT	23
+#  define DSI0_INT_CMDC_DONE_NO_REPEAT		1
+#  define DSI0_INT_CMDC_DONE_REPEAT		3
+# define DSI0_INT_PHY_DIR_RTF		BIT(22)
+# define DSI0_INT_PHY_D1_ULPS		BIT(21)
+# define DSI0_INT_PHY_D1_STOP		BIT(20)
+# define DSI0_INT_PHY_RXLPDT		BIT(19)
+# define DSI0_INT_PHY_RXTRIG		BIT(18)
+# define DSI0_INT_PHY_D0_ULPS		BIT(17)
+# define DSI0_INT_PHY_D0_LPDT		BIT(16)
+# define DSI0_INT_PHY_D0_FTR		BIT(15)
+# define DSI0_INT_PHY_D0_STOP		BIT(14)
+/* Signaled when the clock lane enters the given state. */
+# define DSI0_INT_PHY_CLK_ULPS		BIT(13)
+# define DSI0_INT_PHY_CLK_HS		BIT(12)
+# define DSI0_INT_PHY_CLK_FTR		BIT(11)
+/* Signaled on timeouts */
+# define DSI0_INT_PR_TO			BIT(10)
+# define DSI0_INT_TA_TO			BIT(9)
+# define DSI0_INT_LPRX_TO		BIT(8)
+# define DSI0_INT_HSTX_TO		BIT(7)
+/* Contention on a line when trying to drive the line low */
+# define DSI0_INT_ERR_CONT_LP1		BIT(6)
+# define DSI0_INT_ERR_CONT_LP0		BIT(5)
+/* Control error: incorrect line state sequence on data lane 0. */
+# define DSI0_INT_ERR_CONTROL		BIT(4)
+# define DSI0_INT_ERR_SYNC_ESC		BIT(3)
+# define DSI0_INT_RX2_PKT		BIT(2)
+# define DSI0_INT_RX1_PKT		BIT(1)
+# define DSI0_INT_CMD_PKT		BIT(0)
+
+#define DSI0_INTERRUPTS_ALWAYS_ENABLED	(DSI0_INT_ERR_SYNC_ESC | \
+					 DSI0_INT_ERR_CONTROL |	 \
+					 DSI0_INT_ERR_CONT_LP0 | \
+					 DSI0_INT_ERR_CONT_LP1 | \
+					 DSI0_INT_HSTX_TO |	 \
+					 DSI0_INT_LPRX_TO |	 \
+					 DSI0_INT_TA_TO |	 \
+					 DSI0_INT_PR_TO)
+
 # define DSI1_INT_PHY_D3_ULPS		BIT(30)
 # define DSI1_INT_PHY_D3_STOP		BIT(29)
 # define DSI1_INT_PHY_D2_ULPS		BIT(28)
@@ -892,6 +934,9 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder)
 
 		DSI_PORT_WRITE(PHY_AFEC0, afec0);
 
+		/* AFEC reset hold time */
+		mdelay(1);
+
 		DSI_PORT_WRITE(PHY_AFEC1,
 			       VC4_SET_FIELD(6,  DSI0_PHY_AFEC1_IDR_DLANE1) |
 			       VC4_SET_FIELD(6,  DSI0_PHY_AFEC1_IDR_DLANE0) |
@@ -1058,12 +1103,9 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder)
 		DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
 
 	/* Bring AFE out of reset. */
-	if (dsi->variant->port == 0) {
-	} else {
-		DSI_PORT_WRITE(PHY_AFEC0,
-			       DSI_PORT_READ(PHY_AFEC0) &
-			       ~DSI1_PHY_AFEC0_RESET);
-	}
+	DSI_PORT_WRITE(PHY_AFEC0,
+		       DSI_PORT_READ(PHY_AFEC0) &
+		       ~DSI_PORT_BIT(PHY_AFEC0_RESET));
 
 	vc4_dsi_ulps(dsi, false);
 
@@ -1182,13 +1224,28 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
 	/* Enable the appropriate interrupt for the transfer completion. */
 	dsi->xfer_result = 0;
 	reinit_completion(&dsi->xfer_completion);
-	DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-	if (msg->rx_len) {
-		DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-					DSI1_INT_PHY_DIR_RTF));
+	if (dsi->variant->port == 0) {
+		DSI_PORT_WRITE(INT_STAT,
+			       DSI0_INT_CMDC_DONE_MASK | DSI1_INT_PHY_DIR_RTF);
+		if (msg->rx_len) {
+			DSI_PORT_WRITE(INT_EN, (DSI0_INTERRUPTS_ALWAYS_ENABLED |
+						DSI0_INT_PHY_DIR_RTF));
+		} else {
+			DSI_PORT_WRITE(INT_EN,
+				       (DSI0_INTERRUPTS_ALWAYS_ENABLED |
+					VC4_SET_FIELD(DSI0_INT_CMDC_DONE_NO_REPEAT,
+						      DSI0_INT_CMDC_DONE)));
+		}
 	} else {
-		DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-					DSI1_INT_TXPKT1_DONE));
+		DSI_PORT_WRITE(INT_STAT,
+			       DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
+		if (msg->rx_len) {
+			DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
+						DSI1_INT_PHY_DIR_RTF));
+		} else {
+			DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
+						DSI1_INT_TXPKT1_DONE));
+		}
 	}
 
 	/* Send the packet. */
@@ -1205,7 +1262,7 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
 		ret = dsi->xfer_result;
 	}
 
-	DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
+	DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
 
 	if (ret)
 		goto reset_fifo_and_return;
@@ -1251,7 +1308,7 @@ static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
 		       DSI_PORT_BIT(CTRL_RESET_FIFOS));
 
 	DSI_PORT_WRITE(TXPKT1C, 0);
-	DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
+	DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
 	return ret;
 }
 
@@ -1388,26 +1445,28 @@ static irqreturn_t vc4_dsi_irq_handler(int irq, void *data)
 	DSI_PORT_WRITE(INT_STAT, stat);
 
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
+			 DSI_PORT_BIT(INT_ERR_SYNC_ESC), "LPDT sync");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_ERR_CONTROL, "data lane 0 sequence");
+			 DSI_PORT_BIT(INT_ERR_CONTROL), "data lane 0 sequence");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_ERR_CONT_LP0, "LP0 contention");
+			 DSI_PORT_BIT(INT_ERR_CONT_LP0), "LP0 contention");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_ERR_CONT_LP1, "LP1 contention");
+			 DSI_PORT_BIT(INT_ERR_CONT_LP1), "LP1 contention");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_HSTX_TO, "HSTX timeout");
+			 DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_LPRX_TO, "LPRX timeout");
+			 DSI_PORT_BIT(INT_LPRX_TO), "LPRX timeout");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_TA_TO, "turnaround timeout");
+			 DSI_PORT_BIT(INT_TA_TO), "turnaround timeout");
 	dsi_handle_error(dsi, &ret, stat,
-			 DSI1_INT_PR_TO, "peripheral reset timeout");
+			 DSI_PORT_BIT(INT_PR_TO), "peripheral reset timeout");
 
-	if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) {
+	if (stat & ((dsi->variant->port ? DSI1_INT_TXPKT1_DONE :
+					  DSI0_INT_CMDC_DONE_MASK) |
+		    DSI_PORT_BIT(INT_PHY_DIR_RTF))) {
 		complete(&dsi->xfer_completion);
 		ret = IRQ_HANDLED;
-	} else if (stat & DSI1_INT_HSTX_TO) {
+	} else if (stat & DSI_PORT_BIT(INT_HSTX_TO)) {
 		complete(&dsi->xfer_completion);
 		dsi->xfer_result = -ETIMEDOUT;
 		ret = IRQ_HANDLED;
-- 
2.36.1

[PATCH 16/33] drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable iteration

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

vc4_dsi_encoder_disable is partially an open coded version of
drm_bridge_chain_disable, but it missed a termination condition
in the loop for ->disable which meant that no post_disable
calls were made.

Add in the termination clause.

Fixes: 033bfe7538a1 ("drm/vc4: dsi: Fix bridge chain handling")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_dsi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index 333ea96fcde4..b7b2c76770dc 100644
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -803,6 +803,9 @@ static void vc4_dsi_encoder_disable(struct drm_encoder *encoder)
 	list_for_each_entry_reverse(iter, &dsi->bridge_chain, chain_node) {
 		if (iter->funcs->disable)
 			iter->funcs->disable(iter);
+
+		if (iter == dsi->bridge)
+			break;
 	}
 
 	vc4_dsi_ulps(dsi, true);
-- 
2.36.1

[PATCH 17/33] drm/vc4: hdmi: Disable audio if dmas property is present but empty

[Maxime Ripard]

From: Phil Elwell <phil@raspberrypi.org>

The dmas property is used to hold the dmaengine channel used for audio
output.

Older device trees were missing that property, so if it's not there we
disable the audio output entirely.

However, some overlays have set an empty value to that property, mostly
to workaround the fact that overlays cannot remove a property. Let's add
a test for that case and if it's empty, let's disable it as well.

Cc: <stable@vger.kernel.org>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 6aadb65eb640..c8571e17afa8 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2034,12 +2034,12 @@ static int vc4_hdmi_audio_init(struct vc4_hdmi *vc4_hdmi)
 	struct device *dev = &vc4_hdmi->pdev->dev;
 	struct platform_device *codec_pdev;
 	const __be32 *addr;
-	int index;
+	int index, len;
 	int ret;
 
-	if (!of_find_property(dev->of_node, "dmas", NULL)) {
+	if (!of_find_property(dev->of_node, "dmas", &len) || !len) {
 		dev_warn(dev,
-			 "'dmas' DT property is missing, no HDMI audio\n");
+			 "'dmas' DT property is missing or empty, no HDMI audio\n");
 		return 0;
 	}
 
-- 
2.36.1

[PATCH 18/33] drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumps

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The vc5 HDMI registers hadn't been added into the debugfs
register sets, therefore weren't dumped on request.
Add them in.

Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 39 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/vc4/vc4_hdmi.h |  8 +++++++
 2 files changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index c8571e17afa8..d23ed6e5bd65 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -144,6 +144,12 @@ static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
 
 	drm_print_regset32(&p, &vc4_hdmi->hdmi_regset);
 	drm_print_regset32(&p, &vc4_hdmi->hd_regset);
+	drm_print_regset32(&p, &vc4_hdmi->cec_regset);
+	drm_print_regset32(&p, &vc4_hdmi->csc_regset);
+	drm_print_regset32(&p, &vc4_hdmi->dvp_regset);
+	drm_print_regset32(&p, &vc4_hdmi->phy_regset);
+	drm_print_regset32(&p, &vc4_hdmi->ram_regset);
+	drm_print_regset32(&p, &vc4_hdmi->rm_regset);
 
 	return 0;
 }
@@ -2703,6 +2709,7 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi *vc4_hdmi)
 	struct platform_device *pdev = vc4_hdmi->pdev;
 	struct device *dev = &pdev->dev;
 	struct resource *res;
+	int ret;
 
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi");
 	if (!res)
@@ -2799,6 +2806,38 @@ static int vc5_hdmi_init_resources(struct vc4_hdmi *vc4_hdmi)
 		return PTR_ERR(vc4_hdmi->reset);
 	}
 
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->hdmi_regset, VC4_HDMI);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->hd_regset, VC4_HD);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->cec_regset, VC5_CEC);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->csc_regset, VC5_CSC);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->dvp_regset, VC5_DVP);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->phy_regset, VC5_PHY);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->ram_regset, VC5_RAM);
+	if (ret)
+		return ret;
+
+	ret = vc4_hdmi_build_regset(vc4_hdmi, &vc4_hdmi->rm_regset, VC5_RM);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index 51b27dcdcd9b..1520387b317f 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -179,6 +179,14 @@ struct vc4_hdmi {
 	struct debugfs_regset32 hdmi_regset;
 	struct debugfs_regset32 hd_regset;
 
+	/* VC5 only */
+	struct debugfs_regset32 cec_regset;
+	struct debugfs_regset32 csc_regset;
+	struct debugfs_regset32 dvp_regset;
+	struct debugfs_regset32 phy_regset;
+	struct debugfs_regset32 ram_regset;
+	struct debugfs_regset32 rm_regset;
+
 	/**
 	 * @hw_lock: Spinlock protecting device register access.
 	 */
-- 
2.36.1

[PATCH 19/33] drm/vc4: hdmi: Clear unused infoframe packet RAM registers

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

Using a hdmi analyser the bytes in packet ram
registers beyond the length were visible in the
infoframes and it flagged the checksum as invalid.

Zeroing unused words of packet RAM avoids this

Fixes: 21317b3fba54 ("drm/vc4: Set up the AVI and SPD infoframes.")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index d23ed6e5bd65..4b73b4fea7ec 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -460,9 +460,11 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder,
 	const struct vc4_hdmi_register *ram_packet_start =
 		&vc4_hdmi->variant->registers[HDMI_RAM_PACKET_START];
 	u32 packet_reg = ram_packet_start->offset + VC4_HDMI_PACKET_STRIDE * packet_id;
+	u32 packet_reg_next = ram_packet_start->offset +
+		VC4_HDMI_PACKET_STRIDE * (packet_id + 1);
 	void __iomem *base = __vc4_hdmi_get_field_base(vc4_hdmi,
 						       ram_packet_start->reg);
-	uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
+	uint8_t buffer[VC4_HDMI_PACKET_STRIDE] = {};
 	unsigned long flags;
 	ssize_t len, i;
 	int ret;
@@ -498,6 +500,13 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder,
 		packet_reg += 4;
 	}
 
+	/*
+	 * clear remainder of packet ram as it's included in the
+	 * infoframe and triggers a checksum error on hdmi analyser
+	 */
+	for (; packet_reg < packet_reg_next; packet_reg += 4)
+		writel(0, base + packet_reg);
+
 	HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
 		   HDMI_READ(HDMI_RAM_PACKET_CONFIG) | BIT(packet_id));
 
-- 
2.36.1

[PATCH 20/33] drm/vc4: hdmi: Avoid full hdmi audio fifo writes

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

We are getting occasional VC4_HD_MAI_CTL_ERRORF in
HDMI_MAI_CTL which seem to correspond with audio dropouts.

Reduce the threshold where we deassert DREQ to avoid the fifo
overfilling

Fixes: bb7d78568814 ("drm/vc4: Add HDMI audio support")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 4b73b4fea7ec..53cc0b7b664c 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1955,10 +1955,10 @@ static int vc4_hdmi_audio_prepare(struct device *dev, void *data,
 
 	/* Set the MAI threshold */
 	HDMI_WRITE(HDMI_MAI_THR,
-		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-		   VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
+		   VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) |
+		   VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) |
+		   VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) |
+		   VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW));
 
 	HDMI_WRITE(HDMI_MAI_CONFIG,
 		   VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
-- 
2.36.1

[PATCH 21/33] drm/vc4: hdmi: Reset HDMI MISC_CONTROL register

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The HDMI block can repeat pixels for double clocked modes,
and the firmware is now configuring the block to do this as
the PV is doing it incorrectly when at 2pixels/clock.
If the kernel doesn't reset it then we end up with strange
modes.

Reset MISC_CONTROL.

Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c      | 8 ++++++++
 drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 53cc0b7b664c..8142efa2d479 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -78,6 +78,9 @@
 #define VC5_HDMI_VERTB_VSPO_SHIFT		16
 #define VC5_HDMI_VERTB_VSPO_MASK		VC4_MASK(29, 16)
 
+#define VC5_HDMI_MISC_CONTROL_PIXEL_REP_SHIFT	0
+#define VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK	VC4_MASK(3, 0)
+
 #define VC5_HDMI_SCRAMBLER_CTL_ENABLE		BIT(0)
 
 #define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT	8
@@ -1116,6 +1119,11 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 	reg |= gcp_en ? VC5_HDMI_GCP_CONFIG_GCP_ENABLE : 0;
 	HDMI_WRITE(HDMI_GCP_CONFIG, reg);
 
+	reg = HDMI_READ(HDMI_MISC_CONTROL);
+	reg &= ~VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK;
+	reg |= VC4_SET_FIELD(0, VC5_HDMI_MISC_CONTROL_PIXEL_REP);
+	HDMI_WRITE(HDMI_MISC_CONTROL, reg);
+
 	HDMI_WRITE(HDMI_CLOCK_STOP, 0);
 
 	spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
index a040356b6bdc..549cc63dab39 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
@@ -127,6 +127,7 @@ enum vc4_hdmi_field {
 	HDMI_VERTB0,
 	HDMI_VERTB1,
 	HDMI_VID_CTL,
+	HDMI_MISC_CONTROL,
 };
 
 struct vc4_hdmi_register {
@@ -237,6 +238,7 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi0_fields[] = {
 	VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
 	VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
 	VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
+	VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
 	VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
 	VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
 	VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
@@ -319,6 +321,7 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi1_fields[] = {
 	VC4_HDMI_REG(HDMI_VERTB0, 0x0f0),
 	VC4_HDMI_REG(HDMI_VERTA1, 0x0f4),
 	VC4_HDMI_REG(HDMI_VERTB1, 0x0f8),
+	VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
 	VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
 	VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
 	VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
-- 
2.36.1

[PATCH 22/33] drm/vc4: hdmi: Switch to pm_runtime_status_suspended

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

If the controller isn't clocked or its domain powered up, the register
accesses will either stall the CPU or return garbage, respectively.

Thus, we had a warning in our register access function to complain when
that kind of risky accesses were performed.

In order to check the runtime_pm power state, we were using
pm_runtime_active(), but it turns out that it will become active only
once the runtime_resume hook has been executed.

This prevents us from doing any WARN-free register access in our
runtime_resume() implementation, while this is valid.

Let's switch to pm_runtime_status_suspended() instead.

Fixes: 14e193b95604 ("drm/vc4: hdmi: Warn if we access the controller while disabled")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
index 549cc63dab39..0198de96c7b2 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
@@ -423,7 +423,7 @@ static inline u32 vc4_hdmi_read(struct vc4_hdmi *hdmi,
 	const struct vc4_hdmi_variant *variant = hdmi->variant;
 	void __iomem *base;
 
-	WARN_ON(!pm_runtime_active(&hdmi->pdev->dev));
+	WARN_ON(pm_runtime_status_suspended(&hdmi->pdev->dev));
 
 	if (reg >= variant->num_registers) {
 		dev_warn(&hdmi->pdev->dev,
@@ -453,7 +453,7 @@ static inline void vc4_hdmi_write(struct vc4_hdmi *hdmi,
 
 	lockdep_assert_held(&hdmi->hw_lock);
 
-	WARN_ON(!pm_runtime_active(&hdmi->pdev->dev));
+	WARN_ON(pm_runtime_status_suspended(&hdmi->pdev->dev));
 
 	if (reg >= variant->num_registers) {
 		dev_warn(&hdmi->pdev->dev,
-- 
2.36.1

[PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
attached to the HDMI block, handled in Linux through runtime_pm.

That power domain is shared with the VEC block, so even if we put our
runtime_pm reference in the HDMI driver it would keep being on. If the
VEC is disabled though, the power domain would be disabled and we would
lose any initialization done in our bind implementation.

That initialization involves calling the reset function and initializing
the CEC registers.

Let's move the initialization to our runtime_resume implementation so
that we initialize everything properly if we ever need to.

Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to runtime_pm")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 41 ++++++++++++++++++----------------
 1 file changed, 22 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 8142efa2d479..654c4116b669 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -2543,8 +2543,6 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
 	struct cec_connector_info conn_info;
 	struct platform_device *pdev = vc4_hdmi->pdev;
 	struct device *dev = &pdev->dev;
-	unsigned long flags;
-	u32 value;
 	int ret;
 
 	if (!of_find_property(dev->of_node, "interrupts", NULL)) {
@@ -2563,15 +2561,6 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
 	cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
 	cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
 
-	spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
-	value = HDMI_READ(HDMI_CEC_CNTRL_1);
-	/* Set the logical address to Unregistered */
-	value |= VC4_HDMI_CEC_ADDR_MASK;
-	HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
-	spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
-
-	vc4_hdmi_cec_update_clk_div(vc4_hdmi);
-
 	if (vc4_hdmi->variant->external_irq_controller) {
 		ret = request_threaded_irq(platform_get_irq_byname(pdev, "cec-rx"),
 					   vc4_cec_irq_handler_rx_bare,
@@ -2587,10 +2576,6 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
 		if (ret)
 			goto err_remove_cec_rx_handler;
 	} else {
-		spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
-		HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
-		spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
-
 		ret = request_threaded_irq(platform_get_irq(pdev, 0),
 					   vc4_cec_irq_handler,
 					   vc4_cec_irq_handler_thread, 0,
@@ -2641,7 +2626,6 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
 }
 
 static void vc4_hdmi_cec_exit(struct vc4_hdmi *vc4_hdmi) {};
-
 #endif
 
 static int vc4_hdmi_build_regset(struct vc4_hdmi *vc4_hdmi,
@@ -2870,12 +2854,34 @@ static int __maybe_unused vc4_hdmi_runtime_suspend(struct device *dev)
 static int vc4_hdmi_runtime_resume(struct device *dev)
 {
 	struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
+	unsigned long __maybe_unused flags;
+	u32 __maybe_unused value;
 	int ret;
 
 	ret = clk_prepare_enable(vc4_hdmi->hsm_clock);
 	if (ret)
 		return ret;
 
+	if (vc4_hdmi->variant->reset)
+		vc4_hdmi->variant->reset(vc4_hdmi);
+
+#ifdef CONFIG_DRM_VC4_HDMI_CEC
+	spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
+	value = HDMI_READ(HDMI_CEC_CNTRL_1);
+	/* Set the logical address to Unregistered */
+	value |= VC4_HDMI_CEC_ADDR_MASK;
+	HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
+	spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
+
+	vc4_hdmi_cec_update_clk_div(vc4_hdmi);
+
+	if (!vc4_hdmi->variant->external_irq_controller) {
+		spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
+		HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
+		spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
+	}
+#endif
+
 	return 0;
 }
 
@@ -2965,9 +2971,6 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
 	pm_runtime_set_active(dev);
 	pm_runtime_enable(dev);
 
-	if (vc4_hdmi->variant->reset)
-		vc4_hdmi->variant->reset(vc4_hdmi);
-
 	if ((of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi0") ||
 	     of_device_is_compatible(dev->of_node, "brcm,bcm2711-hdmi1")) &&
 	    HDMI_READ(HDMI_VID_CTL) & VC4_HD_VID_CTL_ENABLE) {
-- 
2.36.1

[PATCH 24/33] drm/vc4: hdmi: Stop checking for enabled output in audio

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

The current HDMI driver, in vc4_hdmi_audio_can_stream() checks whether
the display output is enabled.

This has been there in one form or the other since the introduction of
the audio support in the VC4 HDMI driver in commit bb7d78568814
("drm/vc4: Add HDMI audio support"), but no justification for this check
is in the commit message, or in the discussions around the patches.

One can only assume this was done to prevent a user from playing audio
on the ALSA soundcard when the monitor doesn't support it.

However, this is causing some issues. Indeed, Kodi, for example, was
hitting some errors if it was streaming audio during a modeset. With the
theory above, it does make sense, but the display and audio threads are
typically completely different processes with no opportunity to
synchronise which makes it hard to workaround.

Removing that check also doesn't seem to cause any trouble, so let's
just remove it.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 30 +++---------------------------
 drivers/gpu/drm/vc4/vc4_hdmi.h |  6 ------
 2 files changed, 3 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 654c4116b669..0dc7e57715af 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -788,15 +788,6 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
 	mutex_unlock(&vc4_hdmi->mutex);
 }
 
-static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
-{
-	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-
-	mutex_lock(&vc4_hdmi->mutex);
-	vc4_hdmi->output_enabled = false;
-	mutex_unlock(&vc4_hdmi->mutex);
-}
-
 static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi,
 			       struct drm_connector_state *state,
 			       const struct drm_display_mode *mode)
@@ -1370,15 +1361,6 @@ static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
 	mutex_unlock(&vc4_hdmi->mutex);
 }
 
-static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
-{
-	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-
-	mutex_lock(&vc4_hdmi->mutex);
-	vc4_hdmi->output_enabled = true;
-	mutex_unlock(&vc4_hdmi->mutex);
-}
-
 static void vc4_hdmi_encoder_atomic_mode_set(struct drm_encoder *encoder,
 					     struct drm_crtc_state *crtc_state,
 					     struct drm_connector_state *conn_state)
@@ -1672,8 +1654,6 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
 	.atomic_check = vc4_hdmi_encoder_atomic_check,
 	.atomic_mode_set = vc4_hdmi_encoder_atomic_mode_set,
 	.mode_valid = vc4_hdmi_encoder_mode_valid,
-	.disable = vc4_hdmi_encoder_disable,
-	.enable = vc4_hdmi_encoder_enable,
 };
 
 static u32 vc4_hdmi_channel_map(struct vc4_hdmi *vc4_hdmi, u32 channel_mask)
@@ -1770,19 +1750,15 @@ static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai)
 
 static bool vc4_hdmi_audio_can_stream(struct vc4_hdmi *vc4_hdmi)
 {
-	lockdep_assert_held(&vc4_hdmi->mutex);
+	struct drm_display_info *display = &vc4_hdmi->connector.display_info;
 
-	/*
-	 * If the controller is disabled, prevent any ALSA output.
-	 */
-	if (!vc4_hdmi->output_enabled)
-		return false;
+	lockdep_assert_held(&vc4_hdmi->mutex);
 
 	/*
 	 * If the encoder is currently in DVI mode, treat the codec DAI
 	 * as missing.
 	 */
-	if (!(HDMI_READ(HDMI_RAM_PACKET_CONFIG) & VC4_HDMI_RAM_PACKET_ENABLE))
+	if (!display->is_hdmi)
 		return false;
 
 	return true;
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index 1520387b317f..1159b2992fb1 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -212,12 +212,6 @@ struct vc4_hdmi {
 	 */
 	struct drm_display_mode saved_adjusted_mode;
 
-	/**
-	 * @output_enabled: Is the HDMI controller currently active?
-	 * Protected by @mutex.
-	 */
-	bool output_enabled;
-
 	/**
 	 * @scdc_enabled: Is the HDMI controller currently running with
 	 * the scrambler on? Protected by @mutex.
-- 
2.36.1

[PATCH 25/33] drm/vc4: hdmi: Skip writes to disabled packet RAM

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

This path actually occurs when audio is started during a hdmi mode set.
As the data will be written by vc4_hdmi_set_infoframes when packet RAM
is enabled again, don't treat as an error

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 7 ++++++-
 drivers/gpu/drm/vc4/vc4_hdmi.h | 6 ++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 0dc7e57715af..c62e32f68974 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -601,7 +601,9 @@ static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder)
 	union hdmi_infoframe frame;
 
 	memcpy(&frame.audio, audio, sizeof(*audio));
-	vc4_hdmi_write_infoframe(encoder, &frame);
+
+	if (vc4_hdmi->packet_ram_enabled)
+		vc4_hdmi_write_infoframe(encoder, &frame);
 }
 
 static void vc4_hdmi_set_hdr_infoframe(struct drm_encoder *encoder)
@@ -741,6 +743,8 @@ static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder,
 
 	mutex_lock(&vc4_hdmi->mutex);
 
+	vc4_hdmi->packet_ram_enabled = false;
+
 	spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
 
 	HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, 0);
@@ -1351,6 +1355,7 @@ static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
 			   VC4_HDMI_RAM_PACKET_ENABLE);
 
 		spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
+		vc4_hdmi->packet_ram_enabled = true;
 
 		vc4_hdmi_set_infoframes(encoder);
 	}
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index 1159b2992fb1..c3ed2b07df23 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -212,6 +212,12 @@ struct vc4_hdmi {
 	 */
 	struct drm_display_mode saved_adjusted_mode;
 
+	/**
+	 * @packet_ram_enabled: Is the HDMI controller packet RAM currently
+	 * on? Protected by @mutex.
+	 */
+	bool packet_ram_enabled;
+
 	/**
 	 * @scdc_enabled: Is the HDMI controller currently running with
 	 * the scrambler on? Protected by @mutex.
-- 
2.36.1

[PATCH 26/33] drm/vc4: hdmi: Remove VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

This bit ensures data island packets are never generated when disallowed
by HDCP. As no Pi boards support HDCP this is providing an unnecessary
restriction

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index c62e32f68974..fd5ff2a9bd6c 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1347,9 +1347,6 @@ static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
 
 		WARN_ON(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
 			  VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
-		HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
-			   HDMI_READ(HDMI_SCHEDULER_CONTROL) |
-			   VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT);
 
 		HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
 			   VC4_HDMI_RAM_PACKET_ENABLE);
-- 
2.36.1

[PATCH 27/33] drm/vc4: hdmi: Add HDMI format detection registers to register list

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The block can detect what the incoming image timings are for
debug purposes. Add them to the list of registers understood
by the driver to allow easy dumping of the values.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 30 +++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
index 0198de96c7b2..5a56761e75af 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
@@ -128,6 +128,16 @@ enum vc4_hdmi_field {
 	HDMI_VERTB1,
 	HDMI_VID_CTL,
 	HDMI_MISC_CONTROL,
+	HDMI_FORMAT_DET_1,
+	HDMI_FORMAT_DET_2,
+	HDMI_FORMAT_DET_3,
+	HDMI_FORMAT_DET_4,
+	HDMI_FORMAT_DET_5,
+	HDMI_FORMAT_DET_6,
+	HDMI_FORMAT_DET_7,
+	HDMI_FORMAT_DET_8,
+	HDMI_FORMAT_DET_9,
+	HDMI_FORMAT_DET_10,
 };
 
 struct vc4_hdmi_register {
@@ -241,6 +251,16 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi0_fields[] = {
 	VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
 	VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
 	VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
 	VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
 	VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
 	VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
@@ -324,6 +344,16 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi1_fields[] = {
 	VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
 	VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
 	VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
+	VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
 	VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
 	VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
 	VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
-- 
2.36.1

[PATCH 28/33] drm/vc4: hdmi: Add MISC_CONTROL register for vc4

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

The MISC_CONTROL register allows configuration of pixel repetition
for pixel doubling in the HDMI block instead of PixelValve.
It was already defined for vc5, so add it for vc4.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
index 5a56761e75af..48db438550b1 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
@@ -200,6 +200,7 @@ static const struct vc4_hdmi_register __maybe_unused vc4_hdmi_fields[] = {
 	VC4_HDMI_REG(HDMI_VERTB0, 0x00d0),
 	VC4_HDMI_REG(HDMI_VERTA1, 0x00d4),
 	VC4_HDMI_REG(HDMI_VERTB1, 0x00d8),
+	VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x00e4),
 	VC4_HDMI_REG(HDMI_CEC_CNTRL_1, 0x00e8),
 	VC4_HDMI_REG(HDMI_CEC_CNTRL_2, 0x00ec),
 	VC4_HDMI_REG(HDMI_CEC_CNTRL_3, 0x00f0),
-- 
2.36.1

[PATCH 29/33] drm/vc4: hdmi: Report that 3d/stereo is allowed

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

Our HDMI controllers supports Stereo output so let's enable it.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index fd5ff2a9bd6c..95974f757b47 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -426,6 +426,7 @@ static int vc4_hdmi_connector_init(struct drm_device *dev,
 
 	connector->interlace_allowed = 1;
 	connector->doublescan_allowed = 0;
+	connector->stereo_allowed = 1;
 
 	if (vc4_hdmi->variant->supports_hdr)
 		drm_connector_attach_hdr_output_metadata_property(connector);
-- 
2.36.1

[PATCH 30/33] drm/vc4: hdmi: Fix timings for interlaced modes

[Maxime Ripard]

From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>

Increase the number of post-sync blanking lines on odd fields instead of
decreasing it on even fields. This makes the total number of lines
properly match the modelines.

Additionally fix the value of PV_VCONTROL_ODD_DELAY, which did not take
pixels_per_clock into account, causing some displays to invert the
fields when driven by bcm2711.

Fixes: 682e62c45406 ("drm/vc4: Fix support for interlaced modes on HDMI.")
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_crtc.c |  7 ++++---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++------
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index f74270ad3e13..e4e8c8a4c804 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -346,7 +346,8 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode
 				 PV_HORZB_HACTIVE));
 
 	CRTC_WRITE(PV_VERTA,
-		   VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+		   VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
+				 interlace,
 				 PV_VERTA_VBP) |
 		   VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
 				 PV_VERTA_VSYNC));
@@ -358,7 +359,7 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode
 	if (interlace) {
 		CRTC_WRITE(PV_VERTA_EVEN,
 			   VC4_SET_FIELD(mode->crtc_vtotal -
-					 mode->crtc_vsync_end - 1,
+					 mode->crtc_vsync_end,
 					 PV_VERTA_VBP) |
 			   VC4_SET_FIELD(mode->crtc_vsync_end -
 					 mode->crtc_vsync_start,
@@ -378,7 +379,7 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode
 			   PV_VCONTROL_CONTINUOUS |
 			   (is_dsi ? PV_VCONTROL_DSI : 0) |
 			   PV_VCONTROL_INTERLACE |
-			   VC4_SET_FIELD(mode->htotal * pixel_rep / 2,
+			   VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc),
 					 PV_VCONTROL_ODD_DELAY));
 		CRTC_WRITE(PV_VSYNCD_EVEN, 0);
 	} else {
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 95974f757b47..305807791ebd 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -983,12 +983,12 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 				   VC4_HDMI_VERTA_VFP) |
 		     VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL));
 	u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
-		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
+				   interlaced,
 				   VC4_HDMI_VERTB_VBP));
 	u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
 			  VC4_SET_FIELD(mode->crtc_vtotal -
-					mode->crtc_vsync_end -
-					interlaced,
+					mode->crtc_vsync_end,
 					VC4_HDMI_VERTB_VBP));
 	unsigned long flags;
 
@@ -1036,12 +1036,12 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 				   VC5_HDMI_VERTA_VFP) |
 		     VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL));
 	u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
-		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
+				   interlaced,
 				   VC4_HDMI_VERTB_VBP));
 	u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
 			  VC4_SET_FIELD(mode->crtc_vtotal -
-					mode->crtc_vsync_end -
-					interlaced,
+					mode->crtc_vsync_end,
 					VC4_HDMI_VERTB_VBP));
 	unsigned long flags;
 	unsigned char gcp;
-- 
2.36.1

[PATCH 31/33] drm/vc4: hdmi: Force modeset when bpc or format changes

[Maxime Ripard]

From: Dom Cobley <popcornmix@gmail.com>

Whenever the maximum BPC is changed, vc4_hdmi_encoder_compute_config()
might pick up a different BPC or format depending on the display
capabilities.

That change will have a number of side effects, including the clock
rates and whether the scrambling is enabled.

However, only drm_crtc_state.connectors_changed will be set to true,
since that properly only affects the connector.

This means that while drm_atomic_crtc_needs_modeset() will return true,
and thus drm_atomic_helper_commit_modeset_enables() will call our
encoder atomic_enable() hook, mode_changed will be false.

So crtc_set_mode() will not call our encoder .atomic_mode_set() hook. We
use this hook in vc4 to set the vc4_hdmi_connector_state.output_bpc (and
output_format), and will then reuse the value in .atomic_enable() to select
whether or not scrambling should be enabled.

However, since our clock rate is pre-computed during .atomic_check(), we
end up with the clocks properly configured, but the scrambling disabled,
leading to a blank screen.

Let's set mode_changed to true in our HDMI driver to force the update of
output_bpc, and thus prevent the issue entirely.

Fixes: ba8c0faebbb0 ("drm/vc4: hdmi: Enable 10/12 bpc output")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 305807791ebd..03fa2d4c1827 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1604,9 +1604,14 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
 					 struct drm_crtc_state *crtc_state,
 					 struct drm_connector_state *conn_state)
 {
+	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
+	struct drm_connector *connector = &vc4_hdmi->connector;
+	struct drm_connector_state *old_conn_state =
+		drm_atomic_get_old_connector_state(conn_state->state, connector);
+	struct vc4_hdmi_connector_state *old_vc4_state =
+		conn_state_to_vc4_hdmi_conn_state(old_conn_state);
 	struct vc4_hdmi_connector_state *vc4_state = conn_state_to_vc4_hdmi_conn_state(conn_state);
 	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
-	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
 	unsigned long long tmds_char_rate = mode->clock * 1000;
 	unsigned long long tmds_bit_rate;
 	int ret;
@@ -1635,6 +1640,11 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
 	if (ret)
 		return ret;
 
+	/* vc4_hdmi_encoder_compute_config may have changed output_bpc and/or output_format */
+	if (vc4_state->output_bpc != old_vc4_state->output_bpc ||
+	    vc4_state->output_format != old_vc4_state->output_format)
+		crtc_state->mode_changed = true;
+
 	return 0;
 }
 
-- 
2.36.1

[PATCH 32/33] drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

For interlaced modes the timings were not being correctly
programmed into the HDMI block, so correct them.

Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 03fa2d4c1827..75cba7edaf51 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1035,13 +1035,13 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 		     VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay,
 				   VC5_HDMI_VERTA_VFP) |
 		     VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL));
-	u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
-		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-				   interlaced,
+	u32 vertb = (VC4_SET_FIELD(mode->htotal >> (2 - pixel_rep),
+				   VC5_HDMI_VERTB_VSPO) |
+		     VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
 				   VC4_HDMI_VERTB_VBP));
 	u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
 			  VC4_SET_FIELD(mode->crtc_vtotal -
-					mode->crtc_vsync_end,
+					mode->crtc_vsync_end - interlaced,
 					VC4_HDMI_VERTB_VBP));
 	unsigned long flags;
 	unsigned char gcp;
-- 
2.36.1

[PATCH 33/33] drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI block

[Maxime Ripard]

From: Dave Stevenson <dave.stevenson@raspberrypi.com>

With the change to 2 pixels/clock, the pixel doubling in the PV
results in doubling each pair of pixels, ie ABABCDCD instead of
AABBCCDD.

Move the pixel doubling to the HDMI block, however this means
that DBLCLK modes now fall foul of requiring even values for
all the horizontal timing parameters.
As both 480i and 576i fail this, attempt to fix up DBLCLK modes
that have odd timings values.

Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_crtc.c |  4 +++-
 drivers/gpu/drm/vc4/vc4_hdmi.c | 34 ++++++++++++++++++++++++++++------
 2 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index e4e8c8a4c804..bf8f84b87580 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -316,7 +316,9 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode
 	struct drm_crtc_state *crtc_state = crtc->state;
 	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 	bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE;
-	u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
+	bool is_hdmi = vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0 ||
+		       vc4_encoder->type == VC4_ENCODER_TYPE_HDMI1;
+	u32 pixel_rep = ((mode->flags & DRM_MODE_FLAG_DBLCLK) && !is_hdmi) ? 2 : 1;
 	bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
 		       vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
 	bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 75cba7edaf51..5075f9cbab02 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -78,6 +78,8 @@
 #define VC5_HDMI_VERTB_VSPO_SHIFT		16
 #define VC5_HDMI_VERTB_VSPO_MASK		VC4_MASK(29, 16)
 
+#define VC4_HDMI_MISC_CONTROL_PIXEL_REP_SHIFT	0
+#define VC4_HDMI_MISC_CONTROL_PIXEL_REP_MASK	VC4_MASK(3, 0)
 #define VC5_HDMI_MISC_CONTROL_PIXEL_REP_SHIFT	0
 #define VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK	VC4_MASK(3, 0)
 
@@ -991,6 +993,7 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 					mode->crtc_vsync_end,
 					VC4_HDMI_VERTB_VBP));
 	unsigned long flags;
+	u32 reg;
 
 	spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
 
@@ -1017,6 +1020,11 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 	HDMI_WRITE(HDMI_VERTB0, vertb_even);
 	HDMI_WRITE(HDMI_VERTB1, vertb);
 
+	reg = HDMI_READ(HDMI_MISC_CONTROL);
+	reg &= ~VC4_HDMI_MISC_CONTROL_PIXEL_REP_MASK;
+	reg |= VC4_SET_FIELD(pixel_rep - 1, VC4_HDMI_MISC_CONTROL_PIXEL_REP);
+	HDMI_WRITE(HDMI_MISC_CONTROL, reg);
+
 	spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
 }
 
@@ -1117,7 +1125,7 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
 
 	reg = HDMI_READ(HDMI_MISC_CONTROL);
 	reg &= ~VC5_HDMI_MISC_CONTROL_PIXEL_REP_MASK;
-	reg |= VC4_SET_FIELD(0, VC5_HDMI_MISC_CONTROL_PIXEL_REP);
+	reg |= VC4_SET_FIELD(pixel_rep - 1, VC5_HDMI_MISC_CONTROL_PIXEL_REP);
 	HDMI_WRITE(HDMI_MISC_CONTROL, reg);
 
 	HDMI_WRITE(HDMI_CLOCK_STOP, 0);
@@ -1616,11 +1624,25 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
 	unsigned long long tmds_bit_rate;
 	int ret;
 
-	if (vc4_hdmi->variant->unsupported_odd_h_timings &&
-	    !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
-	    ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
-	     (mode->hsync_end % 2) || (mode->htotal % 2)))
-		return -EINVAL;
+	if (vc4_hdmi->variant->unsupported_odd_h_timings) {
+		if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+			/* Only try to fixup DBLCLK modes to get 480i and 576i
+			 * working.
+			 * A generic solution for all modes with odd horizontal
+			 * timing values seems impossible based on trying to
+			 * solve it for 1366x768 monitors.
+			 */
+			if ((mode->hsync_start - mode->hdisplay) & 1)
+				mode->hsync_start--;
+			if ((mode->hsync_end - mode->hsync_start) & 1)
+				mode->hsync_end--;
+		}
+
+		/* Now check whether we still have odd values remaining */
+		if ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
+		    (mode->hsync_end % 2) || (mode->htotal % 2))
+			return -EINVAL;
+	}
 
 	/*
 	 * The 1440p@60 pixel rate is in the same range than the first
-- 
2.36.1

Re: [PATCH 02/33] drm/vc4: kms: Warn if clk_set_min_rate fails

[Dave Stevenson]

On Mon, 13 Jun 2022 at 15:48, Maxime Ripard <maxime@cerno.tech> wrote:
>
> We currently ignore the clk_set_min_rate return code assuming it would
> succeed. However, it can fail if we ask for a rate higher than the
> current maximum for example.
>
> Since we can't fail in atomic_commit, at least warn on failure.
>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

> ---
>  drivers/gpu/drm/vc4/vc4_kms.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
> index c169bd72e53b..7a7c90d8520b 100644
> --- a/drivers/gpu/drm/vc4/vc4_kms.c
> +++ b/drivers/gpu/drm/vc4/vc4_kms.c
> @@ -405,7 +405,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
>                  * Do a temporary request on the core clock during the
>                  * modeset.
>                  */
> -               clk_set_min_rate(hvs->core_clk, core_rate);
> +               WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate));
>         }
>
>         drm_atomic_helper_commit_modeset_disables(dev, state);
> @@ -438,7 +438,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state)
>                  * Request a clock rate based on the current HVS
>                  * requirements.
>                  */
> -               clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate);
> +               WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate));
>
>                 drm_dbg(dev, "Core clock actual rate: %lu Hz\n",
>                         clk_get_rate(hvs->core_clk));
> --
> 2.36.1
>

Re: [PATCH 03/33] drm/vc4: kms: Use maximum FIFO load for the HVS clock rate

[Dave Stevenson]

On Mon, 13 Jun 2022 at 15:48, Maxime Ripard <maxime@cerno.tech> wrote:
>
> The core clock computation takes into account both the load due to the
> input (ie, planes) and its output (ie, encoders).
>
> However, while the input load needs to consider all the planes, and thus
> sum all of their associated loads, the output happens mostly in
> parallel.
>
> Therefore, we need to consider only the maximum of all the output loads,
> and not the sum like we were doing. This resulted in a clock rate way
> too high which could be discarded for being too high by the clock
> framework.
>
> Since recent changes, the clock framework will even downright reject it,
> leading to a core clock being too low for its current needs.
>
> Fixes: 16e101051f32 ("drm/vc4: Increase the core clock based on HVS load")
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

> ---
>  drivers/gpu/drm/vc4/vc4_kms.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
> index 7a7c90d8520b..69eae37e82f6 100644
> --- a/drivers/gpu/drm/vc4/vc4_kms.c
> +++ b/drivers/gpu/drm/vc4/vc4_kms.c
> @@ -946,7 +946,9 @@ vc4_core_clock_atomic_check(struct drm_atomic_state *state)
>                         continue;
>
>                 num_outputs++;
> -               cob_rate += hvs_new_state->fifo_state[i].fifo_load;
> +               cob_rate = max_t(unsigned long,
> +                                hvs_new_state->fifo_state[i].fifo_load,
> +                                cob_rate);
>         }
>
>         pixel_rate = load_state->hvs_load;
> --
> 2.36.1
>

Re: [PATCH 00/33] drm/vc4: Misc fixes

[Maxime Ripard]

On Mon, 13 Jun 2022 16:47:27 +0200, Maxime Ripard wrote:
> Here's a collection of small fixes that have been used in the downstream
> kernel for a while, affecting several parts of the vc4 driver.
> 
> Let me know what you think,
> Maxime
> 
> Dave Stevenson (21):
>   drm/vc4: drv: Adopt the dma configuration from the HVS or V3D
>     component
>   drm/vc4: plane: Fix margin calculations for the right/bottom edges
>   drm/vc4: plane: Add alpha_blend_mode property to each plane.
>   drm/vc4: hvs: Add debugfs node that dumps the current display lists
>   drm/vc4: dpi: Add support for composite syncs to vc4_dpi
>   drm/vc4: dpi: Add option for inverting pixel clock and output enable
>   drm/vc4: dpi: Ensure a default format is selected
>   drm/vc4: dsi: Release workaround buffer and DMA
>   drm/vc4: dsi: Correct DSI divider calculations
>   drm/vc4: dsi: Correct pixel order for DSI0
>   drm/vc4: dsi: Register dsi0 as the correct vc4 encoder type
>   drm/vc4: dsi: Fix dsi0 interrupt support
>   drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable
>     iteration
>   drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumps
>   drm/vc4: hdmi: Reset HDMI MISC_CONTROL register
>   drm/vc4: hdmi: Switch to pm_runtime_status_suspended
>   drm/vc4: hdmi: Move HDMI reset to pm_resume
>   drm/vc4: hdmi: Add HDMI format detection registers to register list
>   drm/vc4: hdmi: Add MISC_CONTROL register for vc4
>   drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes
>   drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI block
> 
> [...]

Applied to drm/drm-misc (drm-misc-next).

Thanks!
Maxime

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Florian Fainelli]

[-- Attachment #1: Type: text/plain, Size: 1432 bytes --]

On 6/13/22 07:47, Maxime Ripard wrote:
> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
> 
> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
> attached to the HDMI block, handled in Linux through runtime_pm.
> 
> That power domain is shared with the VEC block, so even if we put our
> runtime_pm reference in the HDMI driver it would keep being on. If the
> VEC is disabled though, the power domain would be disabled and we would
> lose any initialization done in our bind implementation.
> 
> That initialization involves calling the reset function and initializing
> the CEC registers.
> 
> Let's move the initialization to our runtime_resume implementation so
> that we initialize everything properly if we ever need to.
> 
> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to runtime_pm")
> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

After seeing the same warning as Stefan reported in the link below, but 
on the Raspberry Pi 4B:

https://www.spinics.net/lists/dri-devel/msg354170.html

a separate bisection effort led me to this commit, before is fine, after 
produces 4 warnings during boot, see attached log.

Is there a fix that we can try that would also cover the Raspberry Pi 
4B? Is it possible that this series precipitates the problem:

https://www.spinics.net/lists/arm-kernel/msg984638.html
-- 
Florian

[-- Attachment #2: bcm2711-vc4-warn.log --]
[-- Type: text/x-log, Size: 37798 bytes --]

Starting start4.elf @ 0xfec00200 partition -1
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 5.19.0-rc2 (florian@silverado) (arm-buildroot-linux-gnueabi-gcc.br_real (Buildroot 2022.05-448-g7ff22c698a0d) 11.3.0, GNU ld (GNU Binutils)
 2.37) #73 SMP Thu Aug 4 16:09:03 PDT 2022
[    0.000000] CPU: ARMv7 Processor [410fd083] revision 3 (ARMv7), cr=30c5383d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] OF: fdt: Machine model: Raspberry Pi 4 Model B Rev 1.1
[    0.000000] earlycon: bcm2835aux0 at MMIO32 0x00000000fe215040 (options '115200n8')
[    0.000000] printk: bootconsole [bcm2835aux0] enabled
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000037400000, size 64 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000000000-0x000000002fffffff]
[    0.000000]   Normal   empty
[    0.000000]   HighMem  [mem 0x0000000030000000-0x00000000fbffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000003b3fffff]
[    0.000000]   node   0: [mem 0x0000000040000000-0x00000000fbffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000fbffffff]
[    0.000000] ------------[ cut here ]------------
[    0.000000] WARNING: CPU: 0 PID: 0 at arch/arm/mm/physaddr.c:40 __virt_to_phys+0x84/0xbc
[    0.000000] virt_to_phys used for non-linear address: 00000000 (0x0)
[    0.000000] Modules linked in:
[    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.19.0-rc2 #73
[    0.000000] Hardware name: BCM2711
[    0.000000]  unwind_backtrace from show_stack+0x18/0x1c
[    0.000000]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.000000]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.000000]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.000000]  warn_slowpath_fmt from __virt_to_phys+0x84/0xbc
[    0.000000]  __virt_to_phys from pcpu_embed_first_chunk+0x588/0x7cc
[    0.000000]  pcpu_embed_first_chunk from setup_per_cpu_areas+0x24/0xa0
[    0.000000]  setup_per_cpu_areas from start_kernel+0x1a8/0x6b8
[    0.000000]  start_kernel from 0x0
[    0.000000] ---[ end trace 0000000000000000 ]---
[    0.000000] percpu: Embedded 16 pages/cpu s35860 r8192 d21484 u65536
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1011200
[    0.000000] Kernel command line:  dma.dmachans=0x71f5 bcm2709.boardrev=0xc03111 bcm2709.serial=0x4b11cb83 bcm2709.uart_clock=48000000 bcm2709.disk_led_gpio=42 bcm270
9.disk_led_active_low=0 smsc95xx.macaddr=DC:A6:32:1C:A0:82 vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000  earlycon earlyprintk
[    0.000000] Unknown kernel command line parameters "earlyprintk", will be passed to user space.
[    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] software IO TLB: mapped [mem 0x0000000029079000-0x000000002d079000] (64MB)
[    0.000000] Memory: 3851564K/4050944K available (10240K kernel code, 1703K rwdata, 3832K rodata, 16384K init, 478K bss, 133844K reserved, 65536K cma-reserved, 319897
6K highmem)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] ftrace: allocating 38049 entries in 112 pages
[    0.000000] ftrace: allocated 112 pages with 3 groups
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000]  Rude variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] GIC: Using split EOI/Deactivate mode
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483647500ns
[    0.008440] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
[    0.017863] bcm2835: system timer (irq = 25)
[    0.022380] arch_timer: cp15 timer(s) running at 54.00MHz (phys).
[    0.028537] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xc743ce346, max_idle_ns: 440795203123 ns
[    0.039433] sched_clock: 56 bits at 54MHz, resolution 18ns, wraps every 4398046511102ns
[    0.047519] Switching to timer-based delay loop, resolution 18ns
[    0.053723] Console: colour dummy device 80x30
[    0.058211] printk: console [tty0] enabled
[    0.062348] printk: bootconsole [bcm2835aux0] disabled
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 5.19.0-rc2 (florian@silverado) (arm-buildroot-linux-gnueabi-gcc.br_real (Buildroot 2022.05-448-g7ff22c698a0d) 11.3.0, GNU ld (GNU Binutils)
 2.37) #73 SMP Thu Aug 4 16:09:03 PDT 2022
[    0.000000] CPU: ARMv7 Processor [410fd083] revision 3 (ARMv7), cr=30c5383d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] OF: fdt: Machine model: Raspberry Pi 4 Model B Rev 1.1
[    0.000000] earlycon: bcm2835aux0 at MMIO32 0x00000000fe215040 (options '115200n8')
[    0.000000] printk: bootconsole [bcm2835aux0] enabled
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000037400000, size 64 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000000000-0x000000002fffffff]
[    0.000000]   Normal   empty
[    0.000000]   HighMem  [mem 0x0000000030000000-0x00000000fbffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000003b3fffff]
[    0.000000]   node   0: [mem 0x0000000040000000-0x00000000fbffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000fbffffff]
[    0.000000] ------------[ cut here ]------------
[    0.000000] WARNING: CPU: 0 PID: 0 at arch/arm/mm/physaddr.c:40 __virt_to_phys+0x84/0xbc
[    0.000000] virt_to_phys used for non-linear address: 00000000 (0x0)
[    0.000000] Modules linked in:
[    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.19.0-rc2 #73
[    0.000000] Hardware name: BCM2711
[    0.000000]  unwind_backtrace from show_stack+0x18/0x1c
[    0.000000]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.000000]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.000000]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.000000]  warn_slowpath_fmt from __virt_to_phys+0x84/0xbc
[    0.000000]  __virt_to_phys from pcpu_embed_first_chunk+0x588/0x7cc
[    0.000000]  pcpu_embed_first_chunk from setup_per_cpu_areas+0x24/0xa0
[    0.000000]  setup_per_cpu_areas from start_kernel+0x1a8/0x6b8
[    0.000000]  start_kernel from 0x0
[    0.000000] ---[ end trace 0000000000000000 ]---
[    0.000000] percpu: Embedded 16 pages/cpu s35860 r8192 d21484 u65536
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1011200
[    0.000000] Kernel command line:  dma.dmachans=0x71f5 bcm2709.boardrev=0xc03111 bcm2709.serial=0x4b11cb83 bcm2709.uart_clock=48000000 bcm2709.disk_led_gpio=42 bcm270
9.disk_led_active_low=0 smsc95xx.macaddr=DC:A6:32:1C:A0:82 vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000  earlycon earlyprintk
[    0.000000] Unknown kernel command line parameters "earlyprintk", will be passed to user space.
[    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] software IO TLB: mapped [mem 0x0000000029079000-0x000000002d079000] (64MB)
[    0.000000] Memory: 3851564K/4050944K available (10240K kernel code, 1703K rwdata, 3832K rodata, 16384K init, 478K bss, 133844K reserved, 65536K cma-reserved, 319897
6K highmem)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] ftrace: allocating 38049 entries in 112 pages
[    0.000000] ftrace: allocated 112 pages with 3 groups
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000]  Rude variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] GIC: Using split EOI/Deactivate mode
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483647500ns
[    0.008440] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
[    0.017863] bcm2835: system timer (irq = 25)
[    0.022380] arch_timer: cp15 timer(s) running at 54.00MHz (phys).
[    0.028537] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xc743ce346, max_idle_ns: 440795203123 ns
[    0.039433] sched_clock: 56 bits at 54MHz, resolution 18ns, wraps every 4398046511102ns
[    0.047519] Switching to timer-based delay loop, resolution 18ns
[    0.053723] Console: colour dummy device 80x30
[    0.058211] printk: console [tty0] enabled
[    0.062348] printk: bootconsole [bcm2835aux0] disabled
[    0.067561] Calibrating delay loop (skipped), value calculated using timer frequency.. 108.00 BogoMIPS (lpj=540000)
[    0.067576] pid_max: default: 32768 minimum: 301
[    0.067703] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[    0.067718] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[    0.068032] CPU: Testing write buffer coherency: ok
[    0.068062] CPU0: Spectre BHB: using loop workaround
[    0.068221] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.068560] cblist_init_generic: Setting adjustable number of callback queues.
[    0.068572] cblist_init_generic: Setting shift to 2 and lim to 1.
[    0.068627] cblist_init_generic: Setting shift to 2 and lim to 1.
[    0.068686] Setting up static identity map for 0x200000 - 0x200060
[    0.068786] rcu: Hierarchical SRCU implementation.
[    0.068824] printk: console [tty0] printing thread started
[    0.069344] smp: Bringing up secondary CPUs ...
[    0.069739] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.069747] CPU1: Spectre BHB: using loop workaround
[    0.070175] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[    0.070182] CPU2: Spectre BHB: using loop workaround
[    0.070588] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[    0.070595] CPU3: Spectre BHB: using loop workaround
[    0.070638] smp: Brought up 1 node, 4 CPUs
[    0.070642] SMP: Total of 4 processors activated (432.00 BogoMIPS).
[    0.070646] CPU: All CPU(s) started in HYP mode.
[    0.070648] CPU: Virtualization extensions available.
[    0.070978] devtmpfs: initialized
[    0.074304] VFP support v0.3: implementor 41 architecture 3 part 40 variant 8 rev 0
[    0.074372] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.074383] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[    0.075204] pinctrl core: initialized pinctrl subsystem
[    0.075812] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.076820] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.077337] thermal_sys: Registered thermal governor 'step_wise'
[    0.077608] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers.
[    0.077613] hw-breakpoint: maximum watchpoint size is 8 bytes.
[    0.077781] Serial: AMBA PL011 UART driver
[    0.088146] kprobes: kprobe jump-optimization is enabled. All kprobes are optimized if possible.
[    0.088988] SCSI subsystem initialized
[    0.089074] usbcore: registered new interface driver usbfs
[    0.089097] usbcore: registered new interface driver hub
[    0.089116] usbcore: registered new device driver usb
[    0.089199] usb_phy_generic phy: supply vcc not found, using dummy regulator
[    0.089266] usb_phy_generic phy: dummy supplies not allowed for exclusive requests
[    0.089354] mc: Linux media interface: v0.10
[    0.089368] videodev: Linux video capture interface: v2.00
[    0.089391] pps_core: LinuxPPS API ver. 1 registered
[    0.089394] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.089401] PTP clock support registered
[    0.089466] Advanced Linux Sound Architecture Driver Initialized.
[    0.089709] Bluetooth: Core ver 2.22
[    0.089725] NET: Registered PF_BLUETOOTH protocol family
[    0.089727] Bluetooth: HCI device and connection manager initialized
[    0.089733] Bluetooth: HCI socket layer initialized
[    0.089737] Bluetooth: L2CAP socket layer initialized
[    0.089746] Bluetooth: SCO socket layer initialized
[    0.089895] vgaarb: loaded
[    0.169619] clocksource: Switched to clocksource arch_sys_counter
[    0.182388] NET: Registered PF_INET protocol family
[    0.182578] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.183407] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.183422] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.183429] TCP established hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.183474] TCP bind bhash tables hash table entries: 8192 (order: 4, 98304 bytes, linear)
[    0.183569] TCP: Hash tables configured (established 8192 bind 8192)
[    0.183682] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
[    0.183706] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
[    0.183801] NET: Registered PF_UNIX/PF_LOCAL protocol family
[4044] RPC: Registered named UNIX socket transport module.
[    0.184048] RPC: Registered udp transport module.
[    0.184050] RPC: Registered tcp transport module.
[    0.184053] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.184463] PCI: CLS 0 bytes, default 64
[    0.185246] Initialise system trusted keyrings
[    0.185402] workingset: timestamp_bits=30 max_order=20 bucket_order=0
[    0.189236] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[    0.231660] Key type asymmetric registered
[    0.231668] Asymmetric key parser 'x509' registered
[    0.231774] bounce: pool size: 64 pages
[    0.231839] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
[    0.231843] io scheduler mq-deadline registered
[    0.231846] io scheduler kyber registered
[    0.232225] irq_brcmstb_l2: registered L2 intc (/soc/interrupt-controller@7ef00100, parent irq: 30)
[    0.232975] gpio gpiochip0: (pinctrl-bcm2711): not an immutable chip, please consider fixing it!
[    0.233624] brcm-pcie fd500000.pcie: host bridge /scb/pcie@7d500000 ranges:
[    0.233635] brcm-pcie fd500000.pcie:   No bus range found for /scb/pcie@7d500000, using [bus 00-ff]
[    0.233656] brcm-pcie fd500000.pcie:      MEM 0x0600000000..0x0603ffffff -> 0x00f8000000
[    0.233673] brcm-pcie fd500000.pcie:   IB MEM 0x0000000000..0x00bfffffff -> 0x0000000000
[    0.291709] brcm-pcie fd500000.pcie: link up, 5.0 GT/s PCIe x1 (SSC)
[    0.291861] brcm-pcie fd500000.pcie: PCI host bridge to bus 0000:00
[    0.291866] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.291873] pci_bus 0000:00: root bus resource [mem 0x600000000-0x603ffffff] (bus address [0xf8000000-0xfbffffff])
[    0.291899] pci 0000:00:00.0: [14e4:2711] type 01 class 0x060400
[    0.291949] pci 0000:00:00.0: PME# supported from D0 D3hot
[    0.292953] PCI: bus0: Fast back to back transfers disabled
[    0.293064] pci 0000:01:00.0: [1106:3483] type 00 class 0x0c0330
Starting[    0.293088] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00000fff 64bit]
 syslogd[    0.293179] pci 0000:01:00.0: PME# supported from D0 D3cold
: OK
St[    0.320529] PCI: bus1: Fast back to back transfers disabled
arting k[    0.320563] pci 0000:00:00.0: BAR 8: assigned [mem 0x600000000-0x6000fffff]
logd: OK[    0.320571] pci 0000:01:00.0: BAR 0: assigned [mem 0x600000000-0x600000fff 64bit]
[    0.320584] pci 0000:00:00.0: PCI bridge to [bus 01]
[    0.320589] pci 0000:00:00.0:   bridge window [mem 0x600000000-0x6000fffff]

[    0.320718] pcieport 0000:00:00.0: enabling device (0140 -> 0142)
[    0.320802] pcieport 0000:00:00.0: PME: Signaling with IRQ 35
Running [    0.320976] pcieport 0000:00:00.0: AER: enabled with IRQ 35
sysctl: [    0.323481] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    0.324299] fe215040.serial: ttyS1 at MMIO 0xfe215040 (irq = 43, base_baud = 62500001) is a 16550
OK[    0.324395] printk: console [ttyS1] enabled
[    0.324395] printk: console [ttyS1] printing thread started
[    0.326367] bcm2835-power bcm2835-power: Broadcom BCM2835 power domains driver

[    0.327573] bcmgenet fd580000.ethernet: GENET 5.0 EPHY: 0x0000
[    0.749654] unimac-mdio unimac-mdio.-19: Broadcom UniMAC MDIO bus
Saving r[    0.750155] usbcore: registered new interface driver zd1211rw
andom se[    0.750178] usbcore: registered new interface driver lan78xx
ed: [    0.750200] usbcore: registered new interface driver asix
[    0.750215] usbcore: registered new interface driver ax88179_178a
[    0.750229] usbcore: registered new interface driver cdc_ether
[    0.750249] usbcore: registered new interface driver smsc95xx
[    0.750263] usbcore: registered new interface driver net1080
[    0.750277] usbcore: registered new interface driver cdc_subset
[    0.750291] usbcore: registered new interface driver zaurus
[    0.750320] usbcore: registered new interface driver cdc_ncm
[    0.750568] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    0.750584] ehci-pci: EHCI PCI platform driver
[    0.750605] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    0.750610] ohci-pci: OHCI PCI platform driver
[    0.750627] ohci-platform: OHCI generic platform driver
[    0.750880] usbcore: registered new interface driver usb-storage
[    0.750944] i2c_dev: i2c /dev entries driver
[    0.751769] brcmstb-i2c fef04500.i2c:  @97500hz registered in polling mode
[    0.751939] brcmstb-i2c fef09500.i2c:  @97500hz registered in polling mode
[    0.752385] bcm2835-wdt bcm2835-wdt: Broadcom BCM2835 watchdog timer
[    0.752575] sdhci: Secure Digital Host Controller Interface driver
[    0.752577] sdhci: Copyright(c) Pierre Ossman
[    0.752627] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.757140] ledtrig-cpu: registered to indicate activity on CPUs
[    0.757265] usbcore: registered new interface driver usbhid
[    0.757267] usbhid: USB HID core driver
[    0.757359] bcm2835-mbox fe00b880.mailbox: mailbox enabled
[    0.758107] NET: Registered PF_INET6 protocol family
[    0.758697] Segment Routing with IPv6
[    0.758717] In-situ OAM (IOAM) with IPv6
[    0.758752] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    0.759032] NET: Registered PF_PACKET protocol family
[    0.759175] Registering SWP/SWPB emulation handler
[    0.759430] Loading compiled-in X.509 certificates
[    0.765045] fe201000.serial: ttyAMA0 at MMIO 0xfe201000 (irq = 49, base_baud = 0) is a PL011 rev2
[    0.765148] serial serial0: tty port ttyAMA0 registered
[    0.765477] raspberrypi-firmware soc:firmware: Attached to firmware from 2020-02-12T12:36:21
[    0.773871] raspberrypi-firmware soc:firmware: Request 0x00030066 returned status 0x80000001
[    0.773880] vc4-drm gpu: [drm] Couldn't stop firmware display driver: -22
[    0.773970] vc4-drm gpu: bound fe400000.hvs (ops vc4_hvs_ops)
[    0.774059] ------------[ cut here ]------------
[    0.774062] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:456 vc4_hdmi_write+0x38/0x9c
[    0.774075] Modules linked in:
[    0.774082] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.774088] Hardware name: BCM2711
[    0.774093] Workqueue: events_unbound deferred_probe_work_func
[    0.774107]  unwind_backtrace from show_stack+0x18/0x1c
[    0.774120]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.774131]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.774141]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.774149]  warn_slowpath_fmt from vc4_hdmi_write+0x38/0x9c
[    0.774158]  vc4_hdmi_write from vc5_hdmi_reset+0x3c/0x68
[    0.774165]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.774173]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.774182]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.774191]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.774202]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.774211]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.774219]  __component_add from platform_probe+0x60/0xb0
[    0.774228]  platform_probe from really_probe+0x1a0/0x3a4
[    0.774236]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.774243]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.774250]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.774258]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.774266]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.774272]  __device_attach from bus_probe_device+0x30/0x88
[    0.774279]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.774286]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.774299]  process_one_work from process_scheduled_works+0x30/0x34
[    0.774309]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.774320]  worker_thread from kthread+0xcc/0xd4
[    0.774332]  kthread from ret_from_fork+0x14/0x1c
[    0.774340] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.774345] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.774350] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.774355] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.774359] ---[ end trace 0000000000000000 ]---
[    0.774363] ------------[ cut here ]------------
[    0.774365] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:426 vc4_hdmi_read+0x34/0xac
[    0.774372] Modules linked in:
[    0.774378] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.774383] Hardware name: BCM2711
[    0.774386] Workqueue: events_unbound deferred_probe_work_func
[    0.774394]  unwind_backtrace from show_stack+0x18/0x1c
[    0.774403]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.774411]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.774419]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.774426]  warn_slowpath_fmt from vc4_hdmi_read+0x34/0xac
[    0.774433]  vc4_hdmi_read from vc5_hdmi_reset+0x48/0x68
[    0.774441]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.774448]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.774456]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.774464]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.774473]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.774483]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.774490]  __component_add from platform_probe+0x60/0xb0
[    0.774499]  platform_probe from really_probe+0x1a0/0x3a4
[    0.774506]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.774513]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.774520]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.774528]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.774534]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.774541]  __device_attach from bus_probe_device+0x30/0x88
[    0.774547]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.774554]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.774564]  process_one_work from process_scheduled_works+0x30/0x34
[    0.774574]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.774585]  worker_thread from kthread+0xcc/0xd4
[    0.774594]  kthread from ret_from_fork+0x14/0x1c
[    0.774601] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.774607] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.774612] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.774616] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.774620] ---[ end trace 0000000000000000 ]---
[    0.774624] ------------[ cut here ]------------
[    0.774625] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:456 vc4_hdmi_write+0x38/0x9c
[    0.774633] Modules linked in:
[    0.774637] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.774643] Hardware name: BCM2711
[    0.774646] Workqueue: events_unbound deferred_probe_work_func
[    0.774653]  unwind_backtrace from show_stack+0x18/0x1c
[    0.774662]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.774670]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.774678]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.774685]  warn_slowpath_fmt from vc4_hdmi_write+0x38/0x9c
[    0.774693]  vc4_hdmi_write from vc5_hdmi_reset+0x58/0x68
[    0.774700]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.774708]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.774716]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.774724]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.774733]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.774742]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.774750]  __component_add from platform_probe+0x60/0xb0
[    0.774758]  platform_probe from really_probe+0x1a0/0x3a4
[    0.774766]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.774773]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.774780]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.774788]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.774794]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.774801]  __device_attach from bus_probe_device+0x30/0x88
[    0.774808]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.774815]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.774824]  process_one_work from process_scheduled_works+0x30/0x34
[    0.774834]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.774845]  worker_thread from kthread+0xcc/0xd4
[    0.774855]  kthread from ret_from_fork+0x14/0x1c
[    0.774862] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.774867] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.774872] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.774876] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.774880] ---[ end trace 0000000000000000 ]---
[    0.785678] vc4-drm gpu: bound fef00700.hdmi (ops vc4_hdmi_ops)
[    0.785771] ------------[ cut here ]------------
[    0.785774] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:456 vc4_hdmi_write+0x38/0x9c
[    0.785785] Modules linked in:
[    0.785791] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.785798] Hardware name: BCM2711
[    0.785801] Workqueue: events_unbound deferred_probe_work_func
[    0.785812]  unwind_backtrace from show_stack+0x18/0x1c
[    0.785823]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.785833]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.785842]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.785850]  warn_slowpath_fmt from vc4_hdmi_write+0x38/0x9c
[    0.785858]  vc4_hdmi_write from vc5_hdmi_reset+0x3c/0x68
[    0.785865]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.785873]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.785881]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.785890]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.785900]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.785909]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.785916]  __component_add from platform_probe+0x60/0xb0
[    0.785926]  platform_probe from really_probe+0x1a0/0x3a4
[    0.785933]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.785940]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.785948]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.785955]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.785962]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.785968]  __device_attach from bus_probe_device+0x30/0x88
[    0.785975]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.785982]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.785993]  process_one_work from process_scheduled_works+0x30/0x34
[    0.786004]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.786014]  worker_thread from kthread+0xcc/0xd4
[    0.786025]  kthread from ret_from_fork+0x14/0x1c
[    0.786033] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.786038] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.786043] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.786048] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.786051] ---[ end trace 0000000000000000 ]---
[    0.786055] ------------[ cut here ]------------
[    0.786056] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:426 vc4_hdmi_read+0x34/0xac
[    0.786064] Modules linked in:
[    0.786069] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.786074] Hardware name: BCM2711
[    0.786077] Workqueue: events_unbound deferred_probe_work_func
[    0.786085]  unwind_backtrace from show_stack+0x18/0x1c
[    0.786094]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.786102]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.786110]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.786117]  warn_slowpath_fmt from vc4_hdmi_read+0x34/0xac
[    0.786124]  vc4_hdmi_read from vc5_hdmi_reset+0x48/0x68
[    0.786131]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.786139]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.786147]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.786155]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.786164]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.786173]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.786181]  __component_add from platform_probe+0x60/0xb0
[    0.786189]  platform_probe from really_probe+0x1a0/0x3a4
[    0.786197]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.786204]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.786211]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.786218]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.786225]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.786232]  __device_attach from bus_probe_device+0x30/0x88
[    0.786238]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.786245]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.786254]  process_one_work from process_scheduled_works+0x30/0x34
[    0.786265]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.786275]  worker_thread from kthread+0xcc/0xd4
[    0.786285]  kthread from ret_from_fork+0x14/0x1c
[    0.786292] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.786297] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.786302] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.786306] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.786310] ---[ end trace 0000000000000000 ]---
[    0.786313] ------------[ cut here ]------------
[    0.786315] WARNING: CPU: 0 PID: 38 at drivers/gpu/drm/vc4/vc4_hdmi_regs.h:456 vc4_hdmi_write+0x38/0x9c
[    0.786322] Modules linked in:
[    0.786327] CPU: 0 PID: 38 Comm: kworker/u8:1 Tainted: G        W         5.19.0-rc2 #73
[    0.786332] Hardware name: BCM2711
[    0.786335] Workqueue: events_unbound deferred_probe_work_func
[    0.786343]  unwind_backtrace from show_stack+0x18/0x1c
[    0.786352]  show_stack from dump_stack_lvl+0x40/0x4c
[    0.786360]  dump_stack_lvl from __warn+0xb0/0x12c
[    0.786367]  __warn from warn_slowpath_fmt+0x80/0xc0
[    0.786374]  warn_slowpath_fmt from vc4_hdmi_write+0x38/0x9c
[    0.786382]  vc4_hdmi_write from vc5_hdmi_reset+0x58/0x68
[    0.786389]  vc5_hdmi_reset from vc4_hdmi_runtime_resume+0x38/0x40
[    0.786397]  vc4_hdmi_runtime_resume from vc4_hdmi_bind+0x214/0x7b8
[    0.786405]  vc4_hdmi_bind from component_bind_all+0x138/0x22c
[    0.786413]  component_bind_all from vc4_drm_bind+0x1a0/0x240
[    0.786422]  vc4_drm_bind from try_to_bring_up_aggregate_device+0x78/0x278
[    0.786430]  try_to_bring_up_aggregate_device from __component_add+0xc0/0x11c
[    0.786438]  __component_add from platform_probe+0x60/0xb0
[    0.786446]  platform_probe from really_probe+0x1a0/0x3a4
[    0.786454]  really_probe from __driver_probe_device+0x1b4/0x1e4
[    0.786461]  __driver_probe_device from driver_probe_device+0x48/0xc8
[    0.786468]  driver_probe_device from __device_attach_driver+0xa4/0x104
[    0.786476]  __device_attach_driver from bus_for_each_drv+0xac/0xc4
[    0.786482]  bus_for_each_drv from __device_attach+0xf4/0x18c
[    0.786489]  __device_attach from bus_probe_device+0x30/0x88
[    0.786495]  bus_probe_device from deferred_probe_work_func+0xa4/0xc8
[    0.786502]  deferred_probe_work_func from process_one_work+0x1a0/0x26c
[    0.786511]  process_one_work from process_scheduled_works+0x30/0x34
[    0.786522]  process_scheduled_works from worker_thread+0x230/0x2c8
[    0.786532]  worker_thread from kthread+0xcc/0xd4
[    0.786542]  kthread from ret_from_fork+0x14/0x1c
[    0.786549] Exception stack(0xf0909fb0 to 0xf0909ff8)
[    0.786553] 9fa0:                                     00000000 00000000 00000000 00000000
[    0.786558] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    0.786563] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    0.786566] ---[ end trace 0000000000000000 ]---
[    0.793532] vc4-drm gpu: bound fef05700.hdmi (ops vc4_hdmi_ops)
[    0.793655] vc4-drm gpu: bound fe004000.txp (ops vc4_txp_ops)
[    0.793734] vc4-drm gpu: bound fe206000.pixelvalve (ops vc4_crtc_ops)
[    0.793815] vc4-drm gpu: bound fe207000.pixelvalve (ops vc4_crtc_ops)
[    0.793894] vc4-drm gpu: bound fe20a000.pixelvalve (ops vc4_crtc_ops)
[    0.793945] vc4-drm gpu: bound fe216000.pixelvalve (ops vc4_crtc_ops)
[    0.794903] [drm] Initialized vc4 0.0.0 20140616 for gpu on minor 0
[    0.820469] dwc2 fe980000.usb: supply vusb_d not found, using dummy regulator
[    0.820551] dwc2 fe980000.usb: supply vusb_a not found, using dummy regulator
[    0.920987] dwc2 fe980000.usb: EPs: 8, dedicated fifos, 4080 entries in SPRAM
[    0.922339] xhci_hcd 0000:01:00.0: enabling device (0140 -> 0142)
[    0.922381] xhci_hcd 0000:01:00.0: xHCI Host Controller
[    0.922392] xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 1
[    1.135176] xhci_hcd 0000:01:00.0: hcc params 0x002841eb hci version 0x100 quirks 0x0000040000000890
[    1.135598] xhci_hcd 0000:01:00.0: xHCI Host Controller
[    1.135606] xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 2
[    1.135613] xhci_hcd 0000:01:00.0: Host supports USB 3.0 SuperSpeed
[    1.136001] hub 1-0:1.0: USB hub found
[    1.136048] hub 1-0:1.0: 1 port detected
[    1.136576] hub 2-0:1.0: USB hub found
[    1.136594] hub 2-0:1.0: 4 ports detected
[    1.138801] sdhci-iproc fe300000.mmc: allocated mmc-pwrseq
[    1.144655] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    1.152749] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[    1.152858] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    1.152866] cfg80211: failed to load regulatory.db
[    1.152977] ALSA device list:
[    1.152980]   #0: vc4-hdmi-0
[    1.152983]   #1: vc4-hdmi-1
[    1.172135] mmc0: SDHCI controller on fe300000.mmc [fe300000.mmc] using PIO
[    1.184777] mmc1: SDHCI controller on fe340000.mmc [fe340000.mmc] using ADMA
[    1.204407] Freeing unused kernel image (initmem) memory: 16384K
[    1.266642] mmc0: new high speed SDIO card at address 0001
[    1.285431] mmc1: new ultra high speed DDR50 SDHC card at address 0001
[    1.285819] mmcblk1: mmc1:0001 EB1QT 29.8 GiB
[    1.287009]  mmcblk1: p1 p2
[    1.302551] Run /init as init process
[    1.459661] usb 1-1: new high-speed USB device number 2 using xhci_hcd
[    1.780495] hub 1-1:1.0: USB hub found
[    1.780810] hub 1-1:1.0: 4 ports detected
[    2.359623] usb 1-1.1: new high-speed USB device number 3 using xhci_hcd
OK
[    6.349623] random: crng init done
Starting network: OK
Starting dropbear sshd: OK

Welcome to Buildroot
buildroot login:

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Florian Fainelli]

On 8/4/22 16:11, Florian Fainelli wrote:
> On 6/13/22 07:47, Maxime Ripard wrote:
>> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>
>> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
>> attached to the HDMI block, handled in Linux through runtime_pm.
>>
>> That power domain is shared with the VEC block, so even if we put our
>> runtime_pm reference in the HDMI driver it would keep being on. If the
>> VEC is disabled though, the power domain would be disabled and we would
>> lose any initialization done in our bind implementation.
>>
>> That initialization involves calling the reset function and initializing
>> the CEC registers.
>>
>> Let's move the initialization to our runtime_resume implementation so
>> that we initialize everything properly if we ever need to.
>>
>> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to 
>> runtime_pm")
>> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> 
> After seeing the same warning as Stefan reported in the link below, but 
> on the Raspberry Pi 4B:
> 
> https://www.spinics.net/lists/dri-devel/msg354170.html
> 
> a separate bisection effort led me to this commit, before is fine, after 
> produces 4 warnings during boot, see attached log.
> 
> Is there a fix that we can try that would also cover the Raspberry Pi 
> 4B? Is it possible that this series precipitates the problem:
> 
> https://www.spinics.net/lists/arm-kernel/msg984638.html

Maxime, Dave, anything you would want me to try? Still seeing these 
warnings with net-next-6.0-11220-g15205c2829ca

Would be nice to see those fixes before 6.0 final, thanks!
-- 
Florian

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Stefan Wahren]

Hi Florian,

Am 05.08.22 um 01:11 schrieb Florian Fainelli:
> On 6/13/22 07:47, Maxime Ripard wrote:
>> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>
>> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
>> attached to the HDMI block, handled in Linux through runtime_pm.
>>
>> That power domain is shared with the VEC block, so even if we put our
>> runtime_pm reference in the HDMI driver it would keep being on. If the
>> VEC is disabled though, the power domain would be disabled and we would
>> lose any initialization done in our bind implementation.
>>
>> That initialization involves calling the reset function and initializing
>> the CEC registers.
>>
>> Let's move the initialization to our runtime_resume implementation so
>> that we initialize everything properly if we ever need to.
>>
>> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to 
>> runtime_pm")
>> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
>
> After seeing the same warning as Stefan reported in the link below, 
> but on the Raspberry Pi 4B:
>
> https://www.spinics.net/lists/dri-devel/msg354170.html
>
> a separate bisection effort led me to this commit, before is fine, 
> after produces 4 warnings during boot, see attached log.
Which config do you use (multi_v7_defconfig + LPAE or arm64/defconfig)?
>
> Is there a fix that we can try that would also cover the Raspberry Pi 
> 4B? Is it possible that this series precipitates the problem:
>
> https://www.spinics.net/lists/arm-kernel/msg984638.html

I don't think this is related because this is a different driver.

Best regards

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Florian Fainelli]

Hallo Stefan,

On 8/9/22 13:16, Stefan Wahren wrote:
> Hi Florian,
> 
> Am 05.08.22 um 01:11 schrieb Florian Fainelli:
>> On 6/13/22 07:47, Maxime Ripard wrote:
>>> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>>
>>> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
>>> attached to the HDMI block, handled in Linux through runtime_pm.
>>>
>>> That power domain is shared with the VEC block, so even if we put our
>>> runtime_pm reference in the HDMI driver it would keep being on. If the
>>> VEC is disabled though, the power domain would be disabled and we would
>>> lose any initialization done in our bind implementation.
>>>
>>> That initialization involves calling the reset function and initializing
>>> the CEC registers.
>>>
>>> Let's move the initialization to our runtime_resume implementation so
>>> that we initialize everything properly if we ever need to.
>>>
>>> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to 
>>> runtime_pm")
>>> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
>>
>> After seeing the same warning as Stefan reported in the link below, 
>> but on the Raspberry Pi 4B:
>>
>> https://www.spinics.net/lists/dri-devel/msg354170.html
>>
>> a separate bisection effort led me to this commit, before is fine, 
>> after produces 4 warnings during boot, see attached log.
> Which config do you use (multi_v7_defconfig + LPAE or arm64/defconfig)?

This was actually bcm2835_defconfig copied over to arch/arm64/configs/ 
and slightly modified to enable PCIe, here is it:

https://gist.github.com/481999edc11b823d0c3e87ecf1693d26

>>
>> Is there a fix that we can try that would also cover the Raspberry Pi 
>> 4B? Is it possible that this series precipitates the problem:
>>
>> https://www.spinics.net/lists/arm-kernel/msg984638.html
> 
> I don't think this is related because this is a different driver.
> 
> Best regards
> 


-- 
Florian

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Dave Stevenson]

Hi Florian

On Tue, 9 Aug 2022 at 20:02, Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> On 8/4/22 16:11, Florian Fainelli wrote:
> > On 6/13/22 07:47, Maxime Ripard wrote:
> >> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
> >>
> >> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
> >> attached to the HDMI block, handled in Linux through runtime_pm.
> >>
> >> That power domain is shared with the VEC block, so even if we put our
> >> runtime_pm reference in the HDMI driver it would keep being on. If the
> >> VEC is disabled though, the power domain would be disabled and we would
> >> lose any initialization done in our bind implementation.
> >>
> >> That initialization involves calling the reset function and initializing
> >> the CEC registers.
> >>
> >> Let's move the initialization to our runtime_resume implementation so
> >> that we initialize everything properly if we ever need to.
> >>
> >> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to
> >> runtime_pm")
> >> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> >> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> >
> > After seeing the same warning as Stefan reported in the link below, but
> > on the Raspberry Pi 4B:
> >
> > https://www.spinics.net/lists/dri-devel/msg354170.html
> >
> > a separate bisection effort led me to this commit, before is fine, after
> > produces 4 warnings during boot, see attached log.
> >
> > Is there a fix that we can try that would also cover the Raspberry Pi
> > 4B? Is it possible that this series precipitates the problem:
> >
> > https://www.spinics.net/lists/arm-kernel/msg984638.html
>
> Maxime, Dave, anything you would want me to try? Still seeing these
> warnings with net-next-6.0-11220-g15205c2829ca

Strange as we don't see this warning on the vendor kernel which is
doing exactly the same. We are largely still on 5.15 as LTS though, so
5.19 hasn't had much bashing in that regard.

Your callstack implies it's only sequencing.
vc4_hdmi_bind is manually calling vc4_hdmi_runtime_resume (and hence
initialising registers) before the call to pm_runtime_set_active and
pm_runtime_enable, hence the pm accounting check in vc4_hdmi_write
fails.

pm_runtime always seems like black magic to me :-/
Do we need to manually power up here, or can we call pm_runtime_enable
without touching the state, and then resume in the normal manner?
ie something simple like
pm_runtime_enable(dev);
pm_runtime_resume_and_get(dev);
The resume_and_get will call vc4_hdmi_runtime_resume and hence
initialise the block, but it will have sorted the pm accounting first.

Otherwise we mess with the order to be:
pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
ret = vc4_hdmi_runtime_resume(dev);
if (ret)
   goto err_put_ddc; //This error handling needs to be checked
pm_runtime_enable(dev);

I have no feel for which is the "correct" approach in terms of
pm_runtime, so will defer to others in that regard.

  Dave

> Would be nice to see those fixes before 6.0 final, thanks!
> --
> Florian

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Stefan Wahren]

Hi Florian,

Am 09.08.22 um 21:02 schrieb Florian Fainelli:
> On 8/4/22 16:11, Florian Fainelli wrote:
>> On 6/13/22 07:47, Maxime Ripard wrote:
>>> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>>
>>> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
>>> attached to the HDMI block, handled in Linux through runtime_pm.
>>>
>>> That power domain is shared with the VEC block, so even if we put our
>>> runtime_pm reference in the HDMI driver it would keep being on. If the
>>> VEC is disabled though, the power domain would be disabled and we would
>>> lose any initialization done in our bind implementation.
>>>
>>> That initialization involves calling the reset function and 
>>> initializing
>>> the CEC registers.
>>>
>>> Let's move the initialization to our runtime_resume implementation so
>>> that we initialize everything properly if we ever need to.
>>>
>>> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to 
>>> runtime_pm")
>>> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
>>
>> After seeing the same warning as Stefan reported in the link below, 
>> but on the Raspberry Pi 4B:
>>
>> https://www.spinics.net/lists/dri-devel/msg354170.html
>>
>> a separate bisection effort led me to this commit, before is fine, 
>> after produces 4 warnings during boot, see attached log.
>>
>> Is there a fix that we can try that would also cover the Raspberry Pi 
>> 4B? Is it possible that this series precipitates the problem:
>>
>> https://www.spinics.net/lists/arm-kernel/msg984638.html
>
> Maxime, Dave, anything you would want me to try? Still seeing these 
> warnings with net-next-6.0-11220-g15205c2829ca

At first this issue doesn't occur in Linux 5.19. So it's something new. 
I was able to reproduce with todays linux-next, but interestingly it 
doesn't occur in drm-misc-next.

>
> Would be nice to see those fixes before 6.0 final, thanks!

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2485 bytes --]

On Wed, Aug 10, 2022 at 10:33:48PM +0200, Stefan Wahren wrote:
> Hi Florian,
> 
> Am 09.08.22 um 21:02 schrieb Florian Fainelli:
> > On 8/4/22 16:11, Florian Fainelli wrote:
> > > On 6/13/22 07:47, Maxime Ripard wrote:
> > > > From: Dave Stevenson <dave.stevenson@raspberrypi.com>
> > > > 
> > > > The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
> > > > attached to the HDMI block, handled in Linux through runtime_pm.
> > > > 
> > > > That power domain is shared with the VEC block, so even if we put our
> > > > runtime_pm reference in the HDMI driver it would keep being on. If the
> > > > VEC is disabled though, the power domain would be disabled and we would
> > > > lose any initialization done in our bind implementation.
> > > > 
> > > > That initialization involves calling the reset function and
> > > > initializing
> > > > the CEC registers.
> > > > 
> > > > Let's move the initialization to our runtime_resume implementation so
> > > > that we initialize everything properly if we ever need to.
> > > > 
> > > > Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable
> > > > to runtime_pm")
> > > > Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > 
> > > After seeing the same warning as Stefan reported in the link below,
> > > but on the Raspberry Pi 4B:
> > > 
> > > https://www.spinics.net/lists/dri-devel/msg354170.html
> > > 
> > > a separate bisection effort led me to this commit, before is fine,
> > > after produces 4 warnings during boot, see attached log.
> > > 
> > > Is there a fix that we can try that would also cover the Raspberry
> > > Pi 4B? Is it possible that this series precipitates the problem:
> > > 
> > > https://www.spinics.net/lists/arm-kernel/msg984638.html
> > 
> > Maxime, Dave, anything you would want me to try? Still seeing these
> > warnings with net-next-6.0-11220-g15205c2829ca
> 
> At first this issue doesn't occur in Linux 5.19. So it's something new. I
> was able to reproduce with todays linux-next, but interestingly it doesn't
> occur in drm-misc-next.

Yeah, it should be fixed by
https://lore.kernel.org/all/20220629123510.1915022-38-maxime@cerno.tech/
https://lore.kernel.org/all/20220629123510.1915022-39-maxime@cerno.tech/

Both patches apparently didn't make the cut for the merge window, if it
works for you we can always queue them in drm-misc-fixes

Maxime

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Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Florian Fainelli]

On 8/15/22 07:12, Maxime Ripard wrote:
> On Wed, Aug 10, 2022 at 10:33:48PM +0200, Stefan Wahren wrote:
>> Hi Florian,
>>
>> Am 09.08.22 um 21:02 schrieb Florian Fainelli:
>>> On 8/4/22 16:11, Florian Fainelli wrote:
>>>> On 6/13/22 07:47, Maxime Ripard wrote:
>>>>> From: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>>>>
>>>>> The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
>>>>> attached to the HDMI block, handled in Linux through runtime_pm.
>>>>>
>>>>> That power domain is shared with the VEC block, so even if we put our
>>>>> runtime_pm reference in the HDMI driver it would keep being on. If the
>>>>> VEC is disabled though, the power domain would be disabled and we would
>>>>> lose any initialization done in our bind implementation.
>>>>>
>>>>> That initialization involves calling the reset function and
>>>>> initializing
>>>>> the CEC registers.
>>>>>
>>>>> Let's move the initialization to our runtime_resume implementation so
>>>>> that we initialize everything properly if we ever need to.
>>>>>
>>>>> Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable
>>>>> to runtime_pm")
>>>>> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
>>>>> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
>>>>
>>>> After seeing the same warning as Stefan reported in the link below,
>>>> but on the Raspberry Pi 4B:
>>>>
>>>> https://www.spinics.net/lists/dri-devel/msg354170.html
>>>>
>>>> a separate bisection effort led me to this commit, before is fine,
>>>> after produces 4 warnings during boot, see attached log.
>>>>
>>>> Is there a fix that we can try that would also cover the Raspberry
>>>> Pi 4B? Is it possible that this series precipitates the problem:
>>>>
>>>> https://www.spinics.net/lists/arm-kernel/msg984638.html
>>>
>>> Maxime, Dave, anything you would want me to try? Still seeing these
>>> warnings with net-next-6.0-11220-g15205c2829ca
>>
>> At first this issue doesn't occur in Linux 5.19. So it's something new. I
>> was able to reproduce with todays linux-next, but interestingly it doesn't
>> occur in drm-misc-next.
> 
> Yeah, it should be fixed by
> https://lore.kernel.org/all/20220629123510.1915022-38-maxime@cerno.tech/
> https://lore.kernel.org/all/20220629123510.1915022-39-maxime@cerno.tech/
> 
> Both patches apparently didn't make the cut for the merge window, if it
> works for you we can always queue them in drm-misc-fixes

Both of these patches eliminate the warning, I don't have a good set-up 
yet for ensuring that HDMI/V3dD is functional however:

Tested-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH 23/33] drm/vc4: hdmi: Move HDMI reset to pm_resume

[Maxime Ripard]

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On Mon, Aug 15, 2022 at 09:52:59AM -0700, Florian Fainelli wrote:
> On 8/15/22 07:12, Maxime Ripard wrote:
> > On Wed, Aug 10, 2022 at 10:33:48PM +0200, Stefan Wahren wrote:
> > > Hi Florian,
> > > 
> > > Am 09.08.22 um 21:02 schrieb Florian Fainelli:
> > > > On 8/4/22 16:11, Florian Fainelli wrote:
> > > > > On 6/13/22 07:47, Maxime Ripard wrote:
> > > > > > From: Dave Stevenson <dave.stevenson@raspberrypi.com>
> > > > > > 
> > > > > > The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain
> > > > > > attached to the HDMI block, handled in Linux through runtime_pm.
> > > > > > 
> > > > > > That power domain is shared with the VEC block, so even if we put our
> > > > > > runtime_pm reference in the HDMI driver it would keep being on. If the
> > > > > > VEC is disabled though, the power domain would be disabled and we would
> > > > > > lose any initialization done in our bind implementation.
> > > > > > 
> > > > > > That initialization involves calling the reset function and
> > > > > > initializing
> > > > > > the CEC registers.
> > > > > > 
> > > > > > Let's move the initialization to our runtime_resume implementation so
> > > > > > that we initialize everything properly if we ever need to.
> > > > > > 
> > > > > > Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable
> > > > > > to runtime_pm")
> > > > > > Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> > > > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > > > 
> > > > > After seeing the same warning as Stefan reported in the link below,
> > > > > but on the Raspberry Pi 4B:
> > > > > 
> > > > > https://www.spinics.net/lists/dri-devel/msg354170.html
> > > > > 
> > > > > a separate bisection effort led me to this commit, before is fine,
> > > > > after produces 4 warnings during boot, see attached log.
> > > > > 
> > > > > Is there a fix that we can try that would also cover the Raspberry
> > > > > Pi 4B? Is it possible that this series precipitates the problem:
> > > > > 
> > > > > https://www.spinics.net/lists/arm-kernel/msg984638.html
> > > > 
> > > > Maxime, Dave, anything you would want me to try? Still seeing these
> > > > warnings with net-next-6.0-11220-g15205c2829ca
> > > 
> > > At first this issue doesn't occur in Linux 5.19. So it's something new. I
> > > was able to reproduce with todays linux-next, but interestingly it doesn't
> > > occur in drm-misc-next.
> > 
> > Yeah, it should be fixed by
> > https://lore.kernel.org/all/20220629123510.1915022-38-maxime@cerno.tech/
> > https://lore.kernel.org/all/20220629123510.1915022-39-maxime@cerno.tech/
> > 
> > Both patches apparently didn't make the cut for the merge window, if it
> > works for you we can always queue them in drm-misc-fixes
> 
> Both of these patches eliminate the warning, I don't have a good set-up yet
> for ensuring that HDMI/V3dD is functional however:
> 
> Tested-by: Florian Fainelli <f.fainelli@gmail.com>

I ended up applying it today (without your Tested-by, since it was partial though)

Maxime

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