From: Mikko Perttunen <cyndis@kapsi.fi>
To: Thierry Reding <thierry.reding@gmail.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: devicetree@vger.kernel.org, Sameer Pujar <spujar@nvidia.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Mikko Perttunen <mperttunen@nvidia.com>,
linux-tegra@vger.kernel.org, Ashish Mhetre <amhetre@nvidia.com>
Subject: [PATCH 2/8] dt-bindings: Add headers for NVDEC on Tegra234
Date: Tue, 6 Sep 2022 16:28:17 +0300 [thread overview]
Message-ID: <20220906132823.2390953-3-cyndis@kapsi.fi> (raw)
In-Reply-To: <20220906132823.2390953-1-cyndis@kapsi.fi>
From: Mikko Perttunen <mperttunen@nvidia.com>
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
include/dt-bindings/clock/tegra234-clock.h | 4 ++++
include/dt-bindings/memory/tegra234-mc.h | 3 +++
include/dt-bindings/power/tegra234-powergate.h | 1 +
include/dt-bindings/reset/tegra234-reset.h | 1 +
4 files changed, 9 insertions(+)
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
index 173364a93381..25b4a3fb4588 100644
--- a/include/dt-bindings/clock/tegra234-clock.h
+++ b/include/dt-bindings/clock/tegra234-clock.h
@@ -82,6 +82,8 @@
#define TEGRA234_CLK_I2S6 66U
/** @brief clock recovered from I2S6 input */
#define TEGRA234_CLK_I2S6_SYNC_INPUT 67U
+/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC */
+#define TEGRA234_CLK_NVDEC 83U
/** PLL controlled by CLK_RST_CONTROLLER_PLLA_BASE for use by audio clocks */
#define TEGRA234_CLK_PLLA 93U
/** @brief PLLP clk output */
@@ -130,6 +132,8 @@
#define TEGRA234_CLK_SYNC_I2S5 149U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S6 */
#define TEGRA234_CLK_SYNC_I2S6 150U
+/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PKA */
+#define TEGRA234_CLK_TSEC_PKA 154U
/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
#define TEGRA234_CLK_UARTA 155U
/** @brief output of gate CLK_ENB_PEX1_CORE_6 */
diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 62987b47ce81..75f0bd30d365 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -32,6 +32,7 @@
#define TEGRA234_SID_PCIE10 0x0b
#define TEGRA234_SID_BPMP 0x10
#define TEGRA234_SID_HOST1X 0x27
+#define TEGRA234_SID_NVDEC 0x29
#define TEGRA234_SID_VIC 0x34
/*
@@ -91,6 +92,8 @@
#define TEGRA234_MEMORY_CLIENT_SDMMCWAB 0x67
#define TEGRA234_MEMORY_CLIENT_VICSRD 0x6c
#define TEGRA234_MEMORY_CLIENT_VICSWR 0x6d
+#define TEGRA234_MEMORY_CLIENT_NVDECSRD 0x78
+#define TEGRA234_MEMORY_CLIENT_NVDECSWR 0x79
/* BPMP read client */
#define TEGRA234_MEMORY_CLIENT_BPMPR 0x93
/* BPMP write client */
diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h
index ae9286cef85c..e5dc1e00be95 100644
--- a/include/dt-bindings/power/tegra234-powergate.h
+++ b/include/dt-bindings/power/tegra234-powergate.h
@@ -19,6 +19,7 @@
#define TEGRA234_POWER_DOMAIN_MGBEB 18U
#define TEGRA234_POWER_DOMAIN_MGBEC 19U
#define TEGRA234_POWER_DOMAIN_MGBED 20U
+#define TEGRA234_POWER_DOMAIN_NVDEC 23U
#define TEGRA234_POWER_DOMAIN_VIC 29U
#endif
diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h
index d48d22b2bc7f..17163019316c 100644
--- a/include/dt-bindings/reset/tegra234-reset.h
+++ b/include/dt-bindings/reset/tegra234-reset.h
@@ -30,6 +30,7 @@
#define TEGRA234_RESET_I2C7 33U
#define TEGRA234_RESET_I2C8 34U
#define TEGRA234_RESET_I2C9 35U
+#define TEGRA234_RESET_NVDEC 44U
#define TEGRA234_RESET_MGBE0_PCS 45U
#define TEGRA234_RESET_MGBE0_MAC 46U
#define TEGRA234_RESET_MGBE1_PCS 49U
--
2.37.0
next prev parent reply other threads:[~2022-09-06 13:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-06 13:28 [PATCH 0/8] Support for NVDEC on Tegra234 Mikko Perttunen
2022-09-06 13:28 ` [PATCH 1/8] memory: tegra: Add API for retrieving carveout bounds Mikko Perttunen
2022-09-06 15:25 ` kernel test robot
2022-09-06 22:44 ` kernel test robot
2022-09-06 13:28 ` Mikko Perttunen [this message]
2022-09-07 10:58 ` [PATCH 2/8] dt-bindings: Add headers for NVDEC on Tegra234 Krzysztof Kozlowski
2022-09-06 13:28 ` [PATCH 3/8] dt-bindings: Add bindings for Tegra234 NVDEC Mikko Perttunen
2022-09-07 11:02 ` Krzysztof Kozlowski
2022-09-06 13:28 ` [PATCH 4/8] arm64: tegra: Add NVDEC on Tegra234 Mikko Perttunen
2022-09-06 13:28 ` [PATCH 5/8] gpu: host1x: Add stream ID register data for " Mikko Perttunen
2022-09-06 13:28 ` [PATCH 6/8] drm/tegra: nvdec: Support multiple clocks Mikko Perttunen
2022-09-06 13:28 ` [PATCH 7/8] drm/tegra: Add code for booting RISC-V based engines Mikko Perttunen
2022-09-06 13:28 ` [PATCH 8/8] drm/tegra: Add Tegra234 support to NVDEC driver Mikko Perttunen
2022-09-06 17:50 ` [PATCH 0/8] Support for NVDEC on Tegra234 Krzysztof Kozlowski
2022-09-07 5:27 ` Mikko Perttunen
2022-09-07 10:58 ` Krzysztof Kozlowski
2022-09-07 11:05 ` Mikko Perttunen
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