From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2722C77B7C for ; Wed, 24 May 2023 17:46:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 62FA410E5BA; Wed, 24 May 2023 17:45:56 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 27D3610E542; Wed, 24 May 2023 17:45:43 +0000 (UTC) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34OH0ju4023940; Wed, 24 May 2023 17:45:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : references : in-reply-to : to : cc; s=qcppdkim1; bh=K6pvt/KXDAo8KSKc00MIS7L7Ff9MuWAaT2rYVyRHplw=; b=dMioQECxIW+ha7NCamXEG2txH0O7167ZeZVzz9bxAD2g6l7tMyc9U8lmZ5lM5kmSw8PA I8oNHWfsYiD4lNrhDCkXtta3ofCZGMoAKHj+WYE+0LRViCLGvHKMM6eijtIiXI1x4cEr SQ2uDVaPciu15A1SY4schouiK3iKMCtF+DLh1e6vV1fABaD7j6MGL5H84wjv+EH0htj0 fj2twjtB/DjfRBtWv0TqdPHWlvyvRlQlV9RyNKA7jEdOIeSVbqdvQX12g9lAEbLvCfUX TTngPRAxo79eIBEdfbDQgBHW0cJy4OUX3lzdLkaz6gt4VfNo9KK4fTH4yispM0D5u/yM 8g== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qs9wesy97-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 May 2023 17:45:37 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34OHjbOm031385 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 May 2023 17:45:37 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 24 May 2023 10:45:36 -0700 From: Jessica Zhang Date: Wed, 24 May 2023 10:45:20 -0700 Subject: [PATCH v14 7/9] drm/msm/dpu: Fix slice_last_group_size calculation MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20230329-rfc-msm-dsc-helper-v14-7-bafc7be95691@quicinc.com> References: <20230329-rfc-msm-dsc-helper-v14-0-bafc7be95691@quicinc.com> In-Reply-To: <20230329-rfc-msm-dsc-helper-v14-0-bafc7be95691@quicinc.com> To: X-Mailer: b4 0.13-dev-bfdf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684950334; l=1214; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=JS9YeZ/caONaWwAdUbJOH/08/BIFVmo1xGTyIpBgzyM=; b=pt0Kb/Ns/nIYtIMbhyFaCPmtyGpO91c4h1ydx+Smq02QEXqMNFziIHFkji5EgNgDP5xBS+8iM 4J4P4V2RKr+BO+wW4swoB5pISera8+RxfjZh3w35c08HL54Cdw15kxg X-Developer-Key: i=quic_jesszhan@quicinc.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2_jz_9jWWvF4_7xIaqkkuGPC2y27eQTy X-Proofpoint-GUID: 2_jz_9jWWvF4_7xIaqkkuGPC2y27eQTy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_11,2023-05-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=982 impostorscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 spamscore=0 clxscore=1015 adultscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305240146 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Abhinav Kumar , Kuogee Hsieh , Konrad Dybcio , dri-devel@lists.freedesktop.org, Jessica Zhang , Dmitry Baryshkov , Marijn Suijten , Sean Paul Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Correct the math for slice_last_group_size so that it matches the calculations downstream. Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC") Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Jessica Zhang --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c index 3cad6a80af97..ea7d828b8812 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c @@ -56,9 +56,10 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc, if (is_cmd_mode) initial_lines += 1; - slice_last_group_size = 3 - (dsc->slice_width % 3); + slice_last_group_size = (dsc->slice_width + 2) % 3; + data = (initial_lines << 20); - data |= ((slice_last_group_size - 1) << 18); + data |= (slice_last_group_size << 18); /* bpp is 6.4 format, 4 LSBs bits are for fractional part */ data |= (dsc->bits_per_pixel << 8); data |= (dsc->block_pred_enable << 7); -- 2.40.1