From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B981FEB64D7 for ; Mon, 26 Jun 2023 20:19:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B42B610E0C1; Mon, 26 Jun 2023 20:19:22 +0000 (UTC) Received: from mailrelay6-1.pub.mailoutpod2-cph3.one.com (mailrelay6-1.pub.mailoutpod2-cph3.one.com [IPv6:2a02:2350:5:405::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F79A10E0C1 for ; Mon, 26 Jun 2023 20:19:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ravnborg.org; s=rsa1; h=in-reply-to:content-type:mime-version:references:message-id:subject:cc:to: from:date:from; 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charset=us-ascii Content-Disposition: inline In-Reply-To: <20230613070426.467389-4-manikandan.m@microchip.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nayabbasha.Sayed@microchip.com, devicetree@vger.kernel.org, alexandre.belloni@bootlin.com, bbrezillon@kernel.org, linux-kernel@vger.kernel.org, Balamanikandan.Gunasundar@microchip.com, lee@kernel.org, conor+dt@kernel.org, dri-devel@lists.freedesktop.org, nicolas.ferre@microchip.com, Varshini.Rajendran@microchip.com, Dharma.B@microchip.com, robh+dt@kernel.org, Durai.ManickamKR@microchip.com, krzysztof.kozlowski+dt@linaro.org, Hari.PrasathGE@microchip.com, Balakrishnan.S@microchip.com, claudiu.beznea@microchip.com, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Manikandan, On Tue, Jun 13, 2023 at 12:34:20PM +0530, Manikandan Muralidharan wrote: > Add the LCD controller layer definition and descriptor structure for SAM9X7 > for the following layers, > - Base Layer > - Overlay1 Layer > - Overlay2 Layer > - High End Overlay > > Signed-off-by: Manikandan Muralidharan > --- > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 96 ++++++++++++++++++++ > 1 file changed, 96 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > index fa0f9a93d50d..d7ad828e9e8c 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c > @@ -462,6 +462,98 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sam9x60 = { > .layers = atmel_hlcdc_sam9x60_layers, > }; > > +static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sam9x7_layers[] = { > + { > + .name = "base", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x60, > + .id = 0, > + .type = ATMEL_HLCDC_BASE_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .xstride = { 2 }, > + .default_color = 3, > + .general_config = 4, > + .disc_pos = 5, > + .disc_size = 6, > + }, > + .clut_offset = 0x700, > + }, > + { > + .name = "overlay1", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x160, > + .id = 1, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .pos = 2, > + .size = 3, > + .xstride = { 4 }, > + .pstride = { 5 }, > + .default_color = 6, > + .chroma_key = 7, > + .chroma_key_mask = 8, > + .general_config = 9, > + }, > + .clut_offset = 0xb00, > + }, > + { > + .name = "overlay2", > + .formats = &atmel_hlcdc_plane_rgb_formats, > + .regs_offset = 0x260, > + .id = 2, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x1c, > + .layout = { > + .pos = 2, > + .size = 3, > + .xstride = { 4 }, > + .pstride = { 5 }, > + .default_color = 6, > + .chroma_key = 7, > + .chroma_key_mask = 8, > + .general_config = 9, > + }, > + .clut_offset = 0xf00, > + }, > + { > + .name = "high-end-overlay", > + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats, > + .regs_offset = 0x360, > + .id = 3, > + .type = ATMEL_HLCDC_OVERLAY_LAYER, > + .cfgs_offset = 0x30, > + .layout = { > + .pos = 2, > + .size = 3, > + .memsize = 4, > + .xstride = { 5, 7 }, > + .pstride = { 6, 8 }, > + .default_color = 9, > + .chroma_key = 10, > + .chroma_key_mask = 11, > + .general_config = 12, > + .csc = 16, > + .scaler_config = 23, > + }, > + .clut_offset = 0x1300, > + }, > +}; > + > +static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sam9x7 = { > + .min_width = 0, > + .min_height = 0, > + .max_width = 2048, > + .max_height = 2048, > + .max_spw = 0xff, > + .max_vpw = 0xff, > + .max_hpw = 0x3ff, > + .fixed_clksrc = true, > + .nlayers = ARRAY_SIZE(atmel_xlcdc_sam9x7_layers), > + .layers = atmel_xlcdc_sam9x7_layers, > +}; As already suggested by someone else, add is_xlcdc to struct atmel_hlcdc_dc_desc, so the check for the compatible can be dropped. It would be better to put it here. Sam