From: Rob Herring <robh@kernel.org>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: "Neil Armstrong" <neil.armstrong@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Nicolas Boichat" <drinkcat@chromium.org>,
kernel@collabora.com, "Daniel Stone" <daniels@collabora.com>,
devicetree@vger.kernel.org, "Liviu Dudau" <Liviu.Dudau@arm.com>,
dri-devel@lists.freedesktop.org,
"Steven Price" <steven.price@arm.com>,
"Clément Péron" <peron.clem@gmail.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Marty E . Plummer" <hanetzer@startmail.com>,
"Robin Murphy" <robin.murphy@arm.com>,
"Faith Ekstrand" <faith.ekstrand@collabora.com>
Subject: Re: [PATCH v3 13/14] dt-bindings: gpu: mali-valhall-csf: Add support for Arm Mali CSF GPUs
Date: Tue, 5 Dec 2023 14:48:27 -0600 [thread overview]
Message-ID: <20231205204827.GA3761421-robh@kernel.org> (raw)
In-Reply-To: <20231204173313.2098733-14-boris.brezillon@collabora.com>
On Mon, Dec 04, 2023 at 06:33:06PM +0100, Boris Brezillon wrote:
> From: Liviu Dudau <liviu.dudau@arm.com>
>
> Arm has introduced a new v10 GPU architecture that replaces the Job Manager
> interface with a new Command Stream Frontend. It adds firmware driven
> command stream queues that can be used by kernel and user space to submit
> jobs to the GPU.
>
> Add the initial schema for the device tree that is based on support for
> RK3588 SoC. The minimum number of clocks is one for the IP, but on Rockchip
> platforms they will tend to expose the semi-independent clocks for better
> power management.
>
> v3:
> - Cleanup commit message to remove redundant text
> - Added opp-table property and re-ordered entries
> - Clarified power-domains and power-domain-names requirements for RK3588.
> - Cleaned up example
>
> Note: power-domains and power-domain-names requirements for other platforms
> are still work in progress, hence the bindings are left incomplete here.
>
> v2:
> - New commit
>
> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> ---
> .../bindings/gpu/arm,mali-valhall-csf.yaml | 147 ++++++++++++++++++
> 1 file changed, 147 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> new file mode 100644
> index 000000000000..d72de094c8ea
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> @@ -0,0 +1,147 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Mali Valhall GPU
> +
> +maintainers:
> + - Liviu Dudau <liviu.dudau@arm.com>
> + - Boris Brezillon <boris.brezillon@collabora.com>
> +
> +properties:
> + $nodename:
> + pattern: '^gpu@[a-f0-9]+$'
> +
> + compatible:
> + oneOf:
Don't need oneOf.
> + - items:
> + - enum:
> + - rockchip,rk3588-mali
> + - const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Job interrupt
> + - description: MMU interrupt
> + - description: GPU interrupt
> +
> + interrupt-names:
> + items:
> + - const: job
> + - const: mmu
> + - const: gpu
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
The function of each clock based on just the names below aren't too
evident. 'core' is, but then what is 'stacks'? Please add some
descriptions.
I expect there is better visibility into what's correct here than we had
on earlier h/w. IOW, I don't want to see different clocks for every SoC.
Same applies to power-domains.
> +
> + clock-names:
> + minItems: 1
> + items:
> + - const: core
> + - const: coregroup
> + - const: stacks
> +
> + mali-supply: true
> +
> + operating-points-v2: true
> + opp-table:
> + type: object
> +
> + power-domains:
> + minItems: 1
> + maxItems: 5
> +
> + power-domain-names:
> + minItems: 1
> + maxItems: 5
> +
> + sram-supply: true
> +
> + "#cooling-cells":
> + const: 2
> +
> + dynamic-power-coefficient:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + A u32 value that represents the running time dynamic
> + power coefficient in units of uW/MHz/V^2. The
> + coefficient can either be calculated from power
> + measurements or derived by analysis.
> +
> + The dynamic power consumption of the GPU is
> + proportional to the square of the Voltage (V) and
> + the clock frequency (f). The coefficient is used to
> + calculate the dynamic power as below -
> +
> + Pdyn = dynamic-power-coefficient * V^2 * f
> +
> + where voltage is in V, frequency is in MHz.
> +
> + dma-coherent: true
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-names
> + - clocks
> + - mali-supply
> +
> +additionalProperties: false
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: rockchip,rk3588-mali
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + power-domains:
> + maxItems: 1
> + power-domain-names: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/rk3588-power.h>
> +
> + gpu: gpu@fb000000 {
> + compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
> + reg = <0xfb000000 0x200000>;
> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
> + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
> + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "job", "mmu", "gpu";
> + clock-names = "core", "coregroup", "stacks";
> + clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
> + <&cru CLK_GPU_STACKS>;
> + power-domains = <&power RK3588_PD_GPU>;
> + operating-points-v2 = <&gpu_opp_table>;
> + mali-supply = <&vdd_gpu_s0>;
> + sram-supply = <&vdd_gpu_mem_s0>;
> + };
> +
> + gpu_opp_table: opp-table {
> + compatible = "operating-points-v2";
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <675000 675000 850000>;
> + };
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <675000 675000 850000>;
> + };
> + };
> +
> +...
> --
> 2.43.0
>
next prev parent reply other threads:[~2023-12-05 20:48 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-04 17:32 [PATCH v3 00/14] drm: Add a driver for CSF-based Mali GPUs Boris Brezillon
2023-12-04 17:32 ` [PATCH v3 01/14] drm/panthor: Add uAPI Boris Brezillon
2023-12-06 16:17 ` Steven Price
2023-12-18 13:20 ` Chris Diamand
2024-01-15 11:18 ` Boris Brezillon
2023-12-04 17:32 ` [PATCH v3 02/14] drm/panthor: Add GPU register definitions Boris Brezillon
2023-12-06 16:23 ` Steven Price
2023-12-04 17:32 ` [PATCH v3 03/14] drm/panthor: Add the device logical block Boris Brezillon
2023-12-06 16:55 ` Steven Price
2023-12-07 8:12 ` Boris Brezillon
2023-12-07 8:56 ` Boris Brezillon
2023-12-07 10:23 ` Steven Price
2023-12-07 10:49 ` Boris Brezillon
2023-12-07 11:11 ` [EXTERNAL] " Donald Robson
2023-12-22 13:26 ` Liviu Dudau
2023-12-22 14:04 ` Boris Brezillon
2023-12-04 17:32 ` [PATCH v3 04/14] drm/panthor: Add the GPU " Boris Brezillon
2023-12-07 16:05 ` Steven Price
2023-12-04 17:32 ` [PATCH v3 05/14] drm/panthor: Add GEM " Boris Brezillon
2023-12-07 16:38 ` Steven Price
2024-01-15 10:29 ` Boris Brezillon
2023-12-04 17:32 ` [PATCH v3 06/14] drm/panthor: Add the devfreq " Boris Brezillon
2023-12-05 9:42 ` Clément Péron
2023-12-04 17:33 ` [PATCH v3 07/14] drm/panthor: Add the MMU/VM " Boris Brezillon
2023-12-08 14:28 ` Steven Price
2024-01-15 11:04 ` Boris Brezillon
2024-01-15 17:31 ` Boris Brezillon
2024-01-15 17:38 ` Boris Brezillon
2024-01-15 17:41 ` Boris Brezillon
2024-01-15 18:09 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 08/14] drm/panthor: Add the FW " Boris Brezillon
2023-12-08 15:39 ` Steven Price
2023-12-18 21:25 ` Chris Diamand
2024-01-15 11:37 ` Boris Brezillon
2024-01-22 16:34 ` Boris Brezillon
2024-01-22 21:14 ` Chris Diamand
2023-12-20 15:12 ` Liviu Dudau
2024-01-15 12:56 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 09/14] drm/panthor: Add the heap " Boris Brezillon
2023-12-08 16:27 ` Steven Price
2024-01-15 11:15 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 10/14] drm/panthor: Add the scheduler " Boris Brezillon
2023-12-11 16:27 ` Steven Price
2024-01-15 13:03 ` Boris Brezillon
2023-12-19 11:50 ` Ketil Johnsen
2024-01-15 13:05 ` Boris Brezillon
2023-12-20 19:59 ` Ketil Johnsen
2024-01-15 13:11 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 11/14] drm/panthor: Add the driver frontend block Boris Brezillon
2023-12-13 11:47 ` Steven Price
2023-12-20 16:24 ` Liviu Dudau
2024-01-15 12:59 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 12/14] drm/panthor: Allow driver compilation Boris Brezillon
2023-12-13 13:18 ` Steven Price
2023-12-04 17:33 ` [PATCH v3 13/14] dt-bindings: gpu: mali-valhall-csf: Add support for Arm Mali CSF GPUs Boris Brezillon
2023-12-04 19:29 ` Rob Herring
2023-12-05 8:46 ` Boris Brezillon
2023-12-05 20:48 ` Rob Herring [this message]
2023-12-06 10:59 ` Liviu Dudau
2024-01-22 16:37 ` Boris Brezillon
2023-12-04 17:33 ` [PATCH v3 14/14] drm/panthor: Add an entry to MAINTAINERS Boris Brezillon
2023-12-13 13:51 ` Steven Price
2023-12-04 18:09 ` [PATCH v3 00/14] drm: Add a driver for CSF-based Mali GPUs Clément Péron
2023-12-05 8:04 ` Boris Brezillon
2023-12-05 8:48 ` Boris Brezillon
2023-12-06 15:47 ` Steven Price
2023-12-06 16:28 ` Boris Brezillon
2023-12-10 4:58 ` Tatsuyuki Ishi
2023-12-11 8:52 ` Boris Brezillon
2023-12-11 18:18 ` Faith Ekstrand
2024-01-15 14:18 ` Boris Brezillon
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