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([2a01:e0a:982:cbb0:ca05:c15c:ee41:c8ab]) by smtp.gmail.com with ESMTPSA id r2-20020adfda42000000b002286231f479sm305722wrl.50.2022.09.09.04.30.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Sep 2022 04:30:52 -0700 (PDT) Message-ID: <326dedc2-0e83-55eb-fe74-84d10b7769ce@baylibre.com> Date: Fri, 9 Sep 2022 13:30:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH] drm/meson: Fix OSD1 RGB to YCbCr coefficient Content-Language: en-US To: Stuart Menefy , dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org References: <20220908155243.687143-1-stuart.menefy@mathembedded.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: <20220908155243.687143-1-stuart.menefy@mathembedded.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi ! On 08/09/2022 17:52, Stuart Menefy wrote: > VPP_WRAP_OSD1_MATRIX_COEF22.Coeff22 is documented as being bits 0-12, > not 16-28. Thanks, Good catch ! > > Without this the output tends to have a pink hue, changing it results > in better color accuracy. Indeed, it was a regular issue reported. > > The vendor kernel doesn't use this register. However the code which > sets VIU2_OSD1_MATRIX_COEF22 also uses bits 0-12. There is a slightly > different style of registers for configuring some of the other matrices, > which do use bits 16-28 for this coefficient, but those have names > ending in MATRIX_COEF22_30, and this is not one of those. > Fixes: 728883948b0d ("drm/meson: Add G12A Support for VIU setup") > Signed-off-by: Stuart Menefy > --- > drivers/gpu/drm/meson/meson_viu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c > index 51df4de..876ffe0 100644 > --- a/drivers/gpu/drm/meson/meson_viu.c > +++ b/drivers/gpu/drm/meson/meson_viu.c > @@ -94,7 +94,7 @@ static void meson_viu_set_g12a_osd1_matrix(struct meson_drm *priv, > priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF11_12)); > writel(((m[9] & 0x1fff) << 16) | (m[10] & 0x1fff), > priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF20_21)); > - writel((m[11] & 0x1fff) << 16, > + writel((m[11] & 0x1fff), > priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF22)); > > writel(((m[18] & 0xfff) << 16) | (m[19] & 0xfff), Reviewed-by: Neil Armstrong