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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ZFqJ0ez-j4AJ1SMO18aXAa17j3tqjVeD X-Proofpoint-ORIG-GUID: ZFqJ0ez-j4AJ1SMO18aXAa17j3tqjVeD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-04_09,2022-09-29_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 bulkscore=0 phishscore=0 mlxlogscore=999 suspectscore=0 spamscore=0 mlxscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210040132 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: freedreno@lists.freedesktop.org, Thomas Zimmermann , Jami Kettunen , Vladimir Lypak , linux-arm-msm@vger.kernel.org, Konrad Dybcio , Javier Martinez Canillas , dri-devel@lists.freedesktop.org, Douglas Anderson , David Airlie , Martin Botka , ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Alex Deucher , Sean Paul , linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 10/1/2022 12:08 PM, Marijn Suijten wrote: > msm's dsi_host specifies negative BPG offsets which fill the full 8 bits > of a char thanks to two's complement: this however results in those bits > bleeding into the next parameter when the field is only expected to > contain 6-bit wide values. > As a consequence random slices appear corrupted on-screen (tested on a > Sony Tama Akatsuki device with sdm845). > > Use AND operators to limit all values that constitute the RC Range > parameter fields to their expected size. > > Fixes: b9080324d6ca ("drm/msm/dsi: add support for dsc data") > Signed-off-by: Marijn Suijten > --- > drivers/gpu/drm/display/drm_dsc_helper.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/display/drm_dsc_helper.c b/drivers/gpu/drm/display/drm_dsc_helper.c > index c869c6e51e2b..2e7ef242685d 100644 > --- a/drivers/gpu/drm/display/drm_dsc_helper.c > +++ b/drivers/gpu/drm/display/drm_dsc_helper.c > @@ -243,11 +243,11 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, > */ > for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { > pps_payload->rc_range_parameters[i] = > - cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << > + cpu_to_be16(((dsc_cfg->rc_range_params[i].range_min_qp & 0x1f) << > DSC_PPS_RC_RANGE_MINQP_SHIFT) | > - (dsc_cfg->rc_range_params[i].range_max_qp << > + ((dsc_cfg->rc_range_params[i].range_max_qp & 0x1f) << > DSC_PPS_RC_RANGE_MAXQP_SHIFT) | > - (dsc_cfg->rc_range_params[i].range_bpg_offset)); > + (dsc_cfg->rc_range_params[i].range_bpg_offset & 0x3f)); > } > Looking at some examples of this for other vendors, they have managed to limit the value to 6 bits in their drivers: https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/i915/display/intel_vdsc.c#L532 https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c#L87 Perhaps, msm should do the same thing instead of the helper change. If you want to move to helper, other drivers need to be changed too to remove duplicate & 0x3f. FWIW, this too has already been fixed in the latest downstream driver too. Thanks Abhinav > /* PPS 88 */