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Fri, 23 Jul 2021 20:05:40 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 305ACC43144; Fri, 23 Jul 2021 20:05:40 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: abhinavk) by smtp.codeaurora.org (Postfix) with ESMTPSA id 179F8C433F1; Fri, 23 Jul 2021 20:05:39 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 23 Jul 2021 13:05:38 -0700 From: abhinavk@codeaurora.org To: Bjorn Andersson Subject: Re: [PATCH 1/5] dt-bindings: msm/dp: Change reg definition In-Reply-To: <20210722024227.3313096-2-bjorn.andersson@linaro.org> References: <20210722024227.3313096-1-bjorn.andersson@linaro.org> <20210722024227.3313096-2-bjorn.andersson@linaro.org> Message-ID: <6318d5abc7f1ed9622218bf29394ec64@codeaurora.org> X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Tanmay Shah , Stephen Boyd , Kuogee Hsieh , Rob Herring , dri-devel@lists.freedesktop.org, Sean Paul , Chandan Uddaraju Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 2021-07-21 19:42, Bjorn Andersson wrote: > reg was defined as one region covering the entire DP block, but the > memory map is actually split in 4 regions and obviously the size of > these regions differs between platforms. > > Switch the reg to require that all four regions are specified instead. > It is expected that the implementation will handle existing DTBs, even > though the schema defines the new layout. > > Signed-off-by: Bjorn Andersson > --- > .../bindings/display/msm/dp-controller.yaml | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git > a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > index 64d8d9e5e47a..a6e41be038fc 100644 > --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > @@ -19,7 +19,11 @@ properties: > - qcom,sc7180-dp > > reg: > - maxItems: 1 > + items: > + - description: ahb register block > + - description: aux register block > + - description: link register block > + - description: p0 register block Do you also want to add the p1 register block here? > > interrupts: > maxItems: 1 > @@ -100,7 +104,10 @@ examples: > > displayport-controller@ae90000 { > compatible = "qcom,sc7180-dp"; > - reg = <0xae90000 0x1400>; > + reg = <0xae90000 0x200>, > + <0xae90200 0x200>, > + <0xae90400 0xc00>, > + <0xae91000 0x400>; here too? > interrupt-parent = <&mdss>; > interrupts = <12>; > clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,