dri-devel.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Harry Wentland <harry.wentland@amd.com>
To: Melissa Wen <mwen@igalia.com>,
	amd-gfx@lists.freedesktop.org,
	Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
	sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>,
	dri-devel@lists.freedesktop.org, christian.koenig@amd.com,
	Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch
Cc: Sebastian Wick <sebastian.wick@redhat.com>,
	Pekka Paalanen <pekka.paalanen@collabora.com>,
	Shashank Sharma <Shashank.Sharma@amd.com>,
	Alex Hung <alex.hung@amd.com>, Xaver Hugl <xaver.hugl@gmail.com>,
	kernel-dev@igalia.com,
	Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
	Joshua Ashton <joshua@froggi.es>,
	sungjoon.kim@amd.com
Subject: Re: [PATCH 07/36] drm/amd/display: add plane driver-specific properties for degamma LUT
Date: Thu, 1 Jun 2023 15:24:22 -0400	[thread overview]
Message-ID: <717f0e53-4e38-7ffe-3ea7-84d4bb6c284e@amd.com> (raw)
In-Reply-To: <20230523221520.3115570-8-mwen@igalia.com>



On 5/23/23 18:14, Melissa Wen wrote:
> Create and attach driver-private properties for plane color management.
> First add plane degamma LUT properties that means user-blob and its
> size. We will add more plane color properties in the next commits. In
> addition, we keep these driver-private plane properties limited by
> defining AMD_PRIVATE_COLOR.
> 
> Co-developed-by: Joshua Ashton <joshua@froggi.es>
> Signed-off-by: Joshua Ashton <joshua@froggi.es>
> Signed-off-by: Melissa Wen <mwen@igalia.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 14 ++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h      |  8 ++
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  9 +++
>  .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   | 77 +++++++++++++++++++
>  4 files changed, 108 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 88af075e6c18..fa67c84f5994 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -1275,6 +1275,20 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev)
>  		return -ENOMEM;
>  	adev->mode_info.regamma_tf_property = prop;
>  
> +	prop = drm_property_create(adev_to_drm(adev),
> +				   DRM_MODE_PROP_BLOB,
> +				   "AMD_PLANE_DEGAMMA_LUT", 0);
> +	if (!prop)
> +		return -ENOMEM;
> +	adev->mode_info.plane_degamma_lut_property = prop;
> +
> +	prop = drm_property_create_range(adev_to_drm(adev),
> +					 DRM_MODE_PROP_IMMUTABLE,
> +					 "AMD_PLANE_DEGAMMA_LUT_SIZE", 0, UINT_MAX);
> +	if (!prop)
> +		return -ENOMEM;
> +	adev->mode_info.plane_degamma_lut_size_property = prop;
> +

Same as with previous patch and the following ones... Would be
great to have this sit in amdgpu_dm_color.c.

Harry

>  	return 0;
>  }
>  #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index 881446c51b36..6c165ad9bdf0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -352,6 +352,14 @@ struct amdgpu_mode_info {
>  	 * drm_transfer_function`.
>  	 */
>  	struct drm_property *regamma_tf_property;
> +	/* @plane_degamma_lut_property: Plane property to set a degamma LUT to
> +	 * convert color space before blending.
> +	 */
> +	struct drm_property *plane_degamma_lut_property;
> +	/* @plane_degamma_lut_size_property: Plane property to define the max
> +	 * size of degamma LUT as supported by the driver (read-only).
> +	 */
> +	struct drm_property *plane_degamma_lut_size_property;
>  };
>  
>  #define AMDGPU_MAX_BL_LEVEL 0xFF
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index ad5ee28b83dc..22e126654767 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -716,6 +716,15 @@ enum drm_transfer_function {
>  struct dm_plane_state {
>  	struct drm_plane_state base;
>  	struct dc_plane_state *dc_state;
> +
> +	/* Plane color mgmt */
> +	/**
> +	 * @degamma_lut:
> +	 *
> +	 * LUT for converting plane pixel data before going into plane merger.
> +	 * The blob (if not NULL) is an array of &struct drm_color_lut.
> +	 */
> +	struct drm_property_blob *degamma_lut;
>  };
>  
>  struct dm_crtc_state {
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 322668973747..e9cedc4068f1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -1338,6 +1338,9 @@ dm_drm_plane_duplicate_state(struct drm_plane *plane)
>  		dc_plane_state_retain(dm_plane_state->dc_state);
>  	}
>  
> +	if (dm_plane_state->degamma_lut)
> +		drm_property_blob_get(dm_plane_state->degamma_lut);
> +
>  	return &dm_plane_state->base;
>  }
>  
> @@ -1405,12 +1408,79 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane,
>  {
>  	struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
>  
> +	if (dm_plane_state->degamma_lut)
> +		drm_property_blob_put(dm_plane_state->degamma_lut);
> +
>  	if (dm_plane_state->dc_state)
>  		dc_plane_state_release(dm_plane_state->dc_state);
>  
>  	drm_atomic_helper_plane_destroy_state(plane, state);
>  }
>  
> +#ifdef AMD_PRIVATE_COLOR
> +static void
> +dm_atomic_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
> +					     struct drm_plane *plane)
> +{
> +	if (dm->dc->caps.color.dpp.dgam_ram || dm->dc->caps.color.dpp.gamma_corr ) {
> +		drm_object_attach_property(&plane->base,
> +					   dm->adev->mode_info.plane_degamma_lut_property, 0);
> +		drm_object_attach_property(&plane->base,
> +					   dm->adev->mode_info.plane_degamma_lut_size_property,
> +					   MAX_COLOR_LUT_ENTRIES);
> +	}
> +}
> +
> +static int
> +dm_atomic_plane_set_property(struct drm_plane *plane,
> +			     struct drm_plane_state *state,
> +			     struct drm_property *property,
> +			     uint64_t val)
> +{
> +	struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
> +	struct amdgpu_device *adev = drm_to_adev(plane->dev);
> +	bool replaced = false;
> +	int ret;
> +
> +	if (property == adev->mode_info.plane_degamma_lut_property) {
> +		ret = drm_property_replace_blob_from_id(plane->dev,
> +							&dm_plane_state->degamma_lut,
> +							val,
> +							-1, sizeof(struct drm_color_lut),
> +							&replaced);
> +		dm_plane_state->base.color_mgmt_changed |= replaced;
> +		return ret;
> +	} else {
> +		drm_dbg_atomic(plane->dev,
> +			       "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n",
> +			       plane->base.id, plane->name,
> +			       property->base.id, property->name);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +static int
> +dm_atomic_plane_get_property(struct drm_plane *plane,
> +			     const struct drm_plane_state *state,
> +			     struct drm_property *property,
> +			     uint64_t *val)
> +{
> +	struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
> +	struct amdgpu_device *adev = drm_to_adev(plane->dev);
> +
> +	if (property == adev->mode_info.plane_degamma_lut_property) {
> +		*val = (dm_plane_state->degamma_lut) ?
> +			dm_plane_state->degamma_lut->base.id : 0;
> +	} else {
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +#endif
> +
>  static const struct drm_plane_funcs dm_plane_funcs = {
>  	.update_plane	= drm_atomic_helper_update_plane,
>  	.disable_plane	= drm_atomic_helper_disable_plane,
> @@ -1419,6 +1489,10 @@ static const struct drm_plane_funcs dm_plane_funcs = {
>  	.atomic_duplicate_state = dm_drm_plane_duplicate_state,
>  	.atomic_destroy_state = dm_drm_plane_destroy_state,
>  	.format_mod_supported = dm_plane_format_mod_supported,
> +#ifdef AMD_PRIVATE_COLOR
> +	.atomic_set_property = dm_atomic_plane_set_property,
> +	.atomic_get_property = dm_atomic_plane_get_property,
> +#endif
>  };
>  
>  int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
> @@ -1489,6 +1563,9 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
>  
>  	drm_plane_helper_add(plane, &dm_plane_helper_funcs);
>  
> +#ifdef AMD_PRIVATE_COLOR
> +	dm_atomic_plane_attach_color_mgmt_properties(dm, plane);
> +#endif
>  	/* Create (reset) the plane state */
>  	if (plane->funcs->reset)
>  		plane->funcs->reset(plane);


  reply	other threads:[~2023-06-01 19:24 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-23 22:14 [PATCH 00/36] drm/amd/display: add AMD driver-specific properties for color mgmt Melissa Wen
2023-05-23 22:14 ` [PATCH 01/36] drm/drm_mode_object: increase max objects to accommodate new color props Melissa Wen
2023-05-23 22:21   ` Simon Ser
2023-05-23 22:14 ` [PATCH 02/36] drm/drm_property: make replace_property_blob_from_id a DRM helper Melissa Wen
2023-05-25 14:48   ` Liviu Dudau
2023-05-23 22:14 ` [PATCH 03/36] drm/drm_plane: track color mgmt changes per plane Melissa Wen
2023-05-23 22:14 ` [PATCH 04/36] drm/amd/display: fix segment distribution for linear LUTs Melissa Wen
2023-05-23 22:14 ` [PATCH 05/36] drm/amd/display: fix the delta clamping for shaper LUT Melissa Wen
2023-05-23 22:14 ` [PATCH 06/36] drm/amd/display: add CRTC driver-specific property for gamma TF Melissa Wen
2023-05-24  8:24   ` Pekka Paalanen
2023-05-25 15:32     ` Harry Wentland
2023-05-25 19:43   ` kernel test robot
2023-06-01 19:17   ` Harry Wentland
2023-06-06 16:18     ` Joshua Ashton
2023-06-06 16:26       ` Sebastian Wick
2023-06-06 16:57         ` Melissa Wen
2023-06-06 20:03           ` Harry Wentland
2023-06-06 17:14     ` Melissa Wen
2023-05-23 22:14 ` [PATCH 07/36] drm/amd/display: add plane driver-specific properties for degamma LUT Melissa Wen
2023-06-01 19:24   ` Harry Wentland [this message]
2023-06-06 17:15     ` Melissa Wen
2023-06-10  5:34       ` Joshua Ashton
2023-05-23 22:14 ` [PATCH 08/36] drm/amd/display: add plane degamma TF driver-specific property Melissa Wen
2023-05-26  2:57   ` kernel test robot
2023-05-23 22:14 ` [PATCH 09/36] drm/amd/display: add plane HDR multiplier " Melissa Wen
2023-06-01 19:33   ` Harry Wentland
2023-05-23 22:14 ` [PATCH 10/36] drm/amd/display: add plane 3D LUT driver-specific properties Melissa Wen
2023-05-23 22:14 ` [PATCH 11/36] drm/amd/display: add plane shaper " Melissa Wen
2023-05-23 22:14 ` [PATCH 12/36] drm/amd/display: add plane shaper TF driver-private property Melissa Wen
2023-05-23 22:14 ` [PATCH 13/36] drm/amd/display: add plane blend LUT and TF driver-specific properties Melissa Wen
2023-05-23 22:14 ` [PATCH 14/36] drm/amd/display: add comments to describe DM crtc color mgmt behavior Melissa Wen
2023-05-23 22:14 ` [PATCH 15/36] drm/amd/display: encapsulate atomic regamma operation Melissa Wen
2023-05-23 22:15 ` [PATCH 16/36] drm/amd/display: update lut3d and shaper lut to stream Melissa Wen
2023-05-23 22:15 ` [PATCH 17/36] drm/amd/display: copy 3D LUT settings from crtc state to stream_update Melissa Wen
2023-05-23 22:15 ` [PATCH 18/36] drm/amd/display: allow BYPASS 3D LUT but keep shaper LUT settings Melissa Wen
2023-05-23 22:15 ` [PATCH 19/36] drm/amd/display: handle MPC 3D LUT resources for a given context Melissa Wen
2023-05-23 22:15 ` [PATCH 20/36] drm/amd/display: dynamically acquire 3DLUT resources for color changes Melissa Wen
2023-05-23 22:15 ` [PATCH 21/36] drm/amd/display: add CRTC 3D LUT support Melissa Wen
2023-05-25  1:13   ` kernel test robot
2023-06-01 20:19   ` Harry Wentland
2023-06-06 17:03     ` Melissa Wen
2023-05-23 22:15 ` [PATCH 22/36] drm/amd/display: add CRTC shaper " Melissa Wen
2023-05-23 22:15 ` [PATCH 23/36] drm/amd/display: add CRTC regamma TF support Melissa Wen
2023-05-23 22:15 ` [PATCH 24/36] drm/amd/display: set sdr_ref_white_level to 80 for out_transfer_func Melissa Wen
2023-05-23 22:15 ` [PATCH 25/36] drm/amd/display: add CRTC shaper TF support Melissa Wen
2023-05-23 22:15 ` [PATCH 26/36] drm/amd/display: mark plane as needing reset if plane color mgmt changes Melissa Wen
2023-05-23 22:15 ` [PATCH 27/36] drm/amd/display: decouple steps for mapping CRTC degamma to DC plane Melissa Wen
2023-05-23 22:15 ` [PATCH 28/36] drm/amd/display: add support for plane degamma TF and LUT properties Melissa Wen
2023-05-23 22:15 ` [PATCH 29/36] drm/amd/display: reject atomic commit if setting both plane and CRTC degamma Melissa Wen
2023-05-23 22:15 ` [PATCH 30/36] drm/amd/display: add dc_fixpt_from_s3132 helper Melissa Wen
2023-05-23 22:15 ` [PATCH 31/36] drm/adm/display: add HDR multiplier support Melissa Wen
2023-05-23 22:15 ` [PATCH 32/36] drm/amd/display: program DPP shaper and 3D LUT if updated Melissa Wen
2023-05-23 22:15 ` [PATCH 33/36] drm/amd/display: add plane shaper/3D LUT and shaper TF support Melissa Wen
2023-05-23 22:15 ` [PATCH 34/36] drm/amd/display: handle empty LUTs in __set_input_tf Melissa Wen
2023-05-23 22:15 ` [PATCH 35/36] drm/amd/display: add DRM plane blend LUT and TF support Melissa Wen
2023-05-23 22:15 ` [PATCH 36/36] drm/amd/display: allow newer DC hardware to use degamma ROM for PQ/HLG Melissa Wen
2023-06-02 15:10   ` Harry Wentland
2023-05-29 22:55 ` [PATCH 00/36] drm/amd/display: add AMD driver-specific properties for color mgmt Dmitry Baryshkov
2023-05-30  7:22   ` Pekka Paalanen
2023-06-02 15:18 ` Harry Wentland
2023-06-06 17:22   ` Melissa Wen
2023-06-06 17:29     ` Melissa Wen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=717f0e53-4e38-7ffe-3ea7-84d4bb6c284e@amd.com \
    --to=harry.wentland@amd.com \
    --cc=Rodrigo.Siqueira@amd.com \
    --cc=Shashank.Sharma@amd.com \
    --cc=Xinhui.Pan@amd.com \
    --cc=airlied@gmail.com \
    --cc=alex.hung@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=christian.koenig@amd.com \
    --cc=daniel@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=joshua@froggi.es \
    --cc=kernel-dev@igalia.com \
    --cc=mwen@igalia.com \
    --cc=nicholas.kazlauskas@amd.com \
    --cc=pekka.paalanen@collabora.com \
    --cc=sebastian.wick@redhat.com \
    --cc=sungjoon.kim@amd.com \
    --cc=sunpeng.li@amd.com \
    --cc=xaver.hugl@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).