From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "Ye, Tony" <tony.ye@intel.com>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/huc: stall media submission until HuC is loaded
Date: Tue, 27 Sep 2022 18:54:44 +0000 [thread overview]
Message-ID: <7cdb86f1c1b3514257333b96407286369fca9a88.camel@intel.com> (raw)
In-Reply-To: <20220913232212.894826-1-daniele.ceraolospurio@intel.com>
On Tue, 2022-09-13 at 16:22 -0700, Ceraolo Spurio, Daniele wrote:
> Wait on the fence to be signalled to avoid the submissions finding HuC
> not yet loaded.
>
> v2: use dedicaded wait_queue_entry for waiting in HuC load, as submitq
> can't be re-used for it.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> #v1
> Acked-by: Tony Ye <tony.ye@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_huc.h | 6 ++++++
> drivers/gpu/drm/i915/i915_request.c | 24 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_request.h | 5 +++++
> 3 files changed, 35 insertions(+)
>
[snip]
> diff --git a/drivers/gpu/drm/i915/i915_request.h b/drivers/gpu/drm/i915/i915_request.h
> index 47041ec68df8..f5e1bb5e857a 100644
> --- a/drivers/gpu/drm/i915/i915_request.h
> +++ b/drivers/gpu/drm/i915/i915_request.h
> @@ -348,6 +348,11 @@ struct i915_request {
> #define GUC_PRIO_FINI 0xfe
> u8 guc_prio;
>
> + /**
> + * @hucq: wait queue entry used to wait on the HuC load to complete
> + */
> + wait_queue_entry_t hucq;
> +
>
>
I believe that in future if we have multiple engines that
requires a similiar stalled initialization wait, we should
have an array of ptrs here and a not-huc-specific-helper that
can sort out adding fence-signalled-waiters. But for now this is
a very rare race condition that only happens with HuC so
this hucq specific wait-entry will do fine. Thus:
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
next prev parent reply other threads:[~2022-09-27 18:54 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-13 0:57 [PATCH v5 00/15] drm/i915: HuC loading for DG2 Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 01/15] mei: add support to GSC extended header Daniele Ceraolo Spurio
2022-09-24 12:15 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 02/15] mei: bus: enable sending gsc commands Daniele Ceraolo Spurio
2022-09-24 12:15 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 03/15] mei: adjust extended header kdocs Daniele Ceraolo Spurio
2022-09-24 12:15 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 04/15] mei: bus: extend bus API to support command streamer API Daniele Ceraolo Spurio
2022-09-24 12:16 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 05/15] mei: pxp: add command streamer API to the PXP driver Daniele Ceraolo Spurio
2022-09-24 12:16 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 06/15] mei: pxp: support matching with a gfx discrete card Daniele Ceraolo Spurio
2022-09-24 12:16 ` Greg Kroah-Hartman
2022-09-13 0:57 ` [PATCH v5 07/15] drm/i915/pxp: load the pxp module when we have a gsc-loaded huc Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 08/15] drm/i915/pxp: implement function for sending tee stream command Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 09/15] drm/i915/pxp: add huc authentication and loading command Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 10/15] drm/i915/dg2: setup HuC loading via GSC Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 11/15] drm/i915/huc: track delayed HuC load with a fence Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 12/15] drm/i915/huc: stall media submission until HuC is loaded Daniele Ceraolo Spurio
2022-09-13 23:22 ` [PATCH] " Daniele Ceraolo Spurio
2022-09-27 18:54 ` Teres Alexis, Alan Previn [this message]
2022-09-13 0:57 ` [PATCH v5 13/15] drm/i915/huc: better define HuC status getparam possible return values Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 14/15] drm/i915/huc: define gsc-compatible HuC fw for DG2 Daniele Ceraolo Spurio
2022-09-13 0:57 ` [PATCH v5 15/15] HAX: drm/i915: force INTEL_MEI_GSC and INTEL_MEI_PXP on for CI Daniele Ceraolo Spurio
2022-09-14 16:51 ` [PATCH v5 00/15] drm/i915: HuC loading for DG2 Winkler, Tomas
2022-09-14 18:11 ` Greg Kroah-Hartman
2022-09-15 20:54 ` Winkler, Tomas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7cdb86f1c1b3514257333b96407286369fca9a88.camel@intel.com \
--to=alan.previn.teres.alexis@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=tony.ye@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).