From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBBACC433DB for ; Sat, 30 Jan 2021 11:28:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7F9764E0F for ; Sat, 30 Jan 2021 11:28:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A7F9764E0F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D7E516EC99; Sat, 30 Jan 2021 11:28:31 +0000 (UTC) Received: from m42-8.mailgun.net (m42-8.mailgun.net [69.72.42.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id F1BFF6E442 for ; Fri, 29 Jan 2021 08:53:41 +0000 (UTC) DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1611910423; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=STGozSZ37Si3ST7RDdvcPgDXokZS/m9htVu1Sw/iTbU=; b=dnY1clpZO7m0NK1IthX9SEpj5wydAvt1mCgcwd9gtHHU2dgiDmMcOpT1K5DLI4ZKLiA17r02 KpZ3bPuvLwcxV6u1SE/NU5OB1h34WiIo4g68ijDL4SKR8TsGelq9RHF/w4r6iTa42yFLQbqk kr5XipfYt5uuPevAbzoWFMbiOk4= X-Mailgun-Sending-Ip: 69.72.42.8 X-Mailgun-Sid: WyJkOTU5ZSIsICJkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 6013cd122d0fc4bcc5096d2a (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 29 Jan 2021 08:53:38 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id CE57FC43467; Fri, 29 Jan 2021 08:53:37 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id D7FEAC433CA; Fri, 29 Jan 2021 08:53:36 +0000 (UTC) MIME-Version: 1.0 Date: Fri, 29 Jan 2021 14:23:36 +0530 From: Sai Prakash Ranjan To: Will Deacon , Robin Murphy , Joerg Roedel , Jordan Crouse , Rob Clark , Akhil P Oommen , isaacm@codeaurora.org Subject: Re: [PATCH 0/3] iommu/drm/msm: Allow non-coherent masters to use system cache In-Reply-To: <3e6ec220c07bcf91fae0985e1798f7a1@codeaurora.org> References: <3e6ec220c07bcf91fae0985e1798f7a1@codeaurora.org> Message-ID: <92a5f6fde47ac1d26745920587256437@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-Mailman-Approved-At: Sat, 30 Jan 2021 11:28:30 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sean Paul , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, Kristian H Kristensen , freedreno , linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 2021-01-20 10:48, Sai Prakash Ranjan wrote: > On 2021-01-11 19:45, Sai Prakash Ranjan wrote: >> commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag") >> removed unused IOMMU_SYS_CACHE_ONLY prot flag and along with it went >> the memory type setting required for the non-coherent masters to use >> system cache. Now that system cache support for GPU is added, we will >> need to set the right PTE attribute for GPU buffers to be sys cached. >> Without this, the system cache lines are not allocated for GPU. >> >> So the patches in this series introduces a new prot flag IOMMU_LLC, >> renames IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to IO_PGTABLE_QUIRK_PTW_LLC >> and makes GPU the user of this protection flag. >> >> The series slightly depends on following 2 patches posted earlier and >> is based on msm-next branch: >> * https://lore.kernel.org/patchwork/patch/1363008/ >> * https://lore.kernel.org/patchwork/patch/1363010/ >> >> Sai Prakash Ranjan (3): >> iommu/io-pgtable: Rename last-level cache quirk to >> IO_PGTABLE_QUIRK_PTW_LLC >> iommu/io-pgtable-arm: Add IOMMU_LLC page protection flag >> drm/msm: Use IOMMU_LLC page protection flag to map gpu buffers >> >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 3 +++ >> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- >> drivers/gpu/drm/msm/msm_iommu.c | 3 +++ >> drivers/gpu/drm/msm/msm_mmu.h | 4 ++++ >> drivers/iommu/io-pgtable-arm.c | 9 ++++++--- >> include/linux/io-pgtable.h | 6 +++--- >> include/linux/iommu.h | 6 ++++++ >> 7 files changed, 26 insertions(+), 7 deletions(-) >> >> >> base-commit: 00fd44a1a4700718d5d962432b55c09820f7e709 > > > Gentle Ping! > Gentle Ping!! Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel