From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D03BCCA47B for ; Thu, 14 Jul 2022 12:07:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93259112A5F; Thu, 14 Jul 2022 12:06:48 +0000 (UTC) Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 311481128ED; Thu, 14 Jul 2022 12:06:35 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7C63AB824EA; Thu, 14 Jul 2022 12:06:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 839EEC385A5; Thu, 14 Jul 2022 12:06:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657800390; bh=TCn2BE8UOjLzz85mMENscMHAPS2S5x5CCbSBJJcL2SY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qDIDPFIKAa06CFQXPeXDhDEIEkNPFddIZ5kbIUee+PMNEJA/TMTOQe+J80u6deobr IbiBg2RB3t+lJQabyQsXL0pBF8bwCZQ69oEgWbfPnZ9tlvO42fuIvooVlIXjftixy7 7YMBEoyL8gfh9LWkLTgGRBABWAhukgzhTyrRnEHpB0pKt6OSZUhGPCM1IocVNLZt0G EXpx4FH7RJkuXpdmiY/2zQUvawQ+WD5X+N62+PeHjNail0XIFnn2w5KViy0y6BHz/o pDPtNlf9P8PJMO3npusciRowOV1hS4zWk1xXi6coemv42gCJvmzwjpVh6ZQw8a6Qgh D1333MEs8plHA== Received: from mchehab by mail.kernel.org with local (Exim 4.95) (envelope-from ) id 1oBxbw-0059tE-3l; Thu, 14 Jul 2022 13:06:28 +0100 From: Mauro Carvalho Chehab To: Subject: [PATCH v2 15/21] drm/i915: Add platform macro for selective tlb flush Date: Thu, 14 Jul 2022 13:06:20 +0100 Message-Id: <9dcb8fec5337905921dece7b802214dfd4d8a6ad.1657800199.git.mchehab@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tvrtko Ursulin , David Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi , Niranjana Vishwanathapura , Mauro Carvalho Chehab , Prathap Kumar Valsan Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Prathap Kumar Valsan Add support for selective TLB invalidation, which is a platform feature supported on XeHP. Signed-off-by: Prathap Kumar Valsan Cc: Niranjana Vishwanathapura Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@kernel.org/ drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + 3 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f1f70257dbe0..73494960a3a8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1312,6 +1312,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) +#define HAS_SELECTIVE_TLB_INVALIDATION(dev_priv) \ + (INTEL_INFO(dev_priv)->has_selective_tlb_invalidation) + #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu) #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index aacc10f2e73f..30d945fe384b 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -1022,6 +1022,7 @@ static const struct intel_device_info adl_p_info = { .has_reset_engine = 1, \ .has_rps = 1, \ .has_runtime_pm = 1, \ + .has_selective_tlb_invalidation = 1, \ .ppgtt_size = 48, \ .ppgtt_type = INTEL_PPGTT_FULL diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 23bf230aa104..92a38b8f7c47 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -170,6 +170,7 @@ enum intel_ppgtt_type { func(has_rc6p); \ func(has_rps); \ func(has_runtime_pm); \ + func(has_selective_tlb_invalidation); \ func(has_snoop); \ func(has_coherent_ggtt); \ func(unfenced_needs_alignment); \ -- 2.36.1